5 files changed, 47 insertions, 0 deletions
diff --git a/os/hal/ports/STM32/STM32H7xx/hal_lld.c b/os/hal/ports/STM32/STM32H7xx/hal_lld.c
index 73a9fe4ef..1a8bf7fbb 100644
--- a/os/hal/ports/STM32/STM32H7xx/hal_lld.c
+++ b/os/hal/ports/STM32/STM32H7xx/hal_lld.c
@@ -141,6 +141,9 @@ void hal_lld_init(void) {
   rccResetAPB4(~0);
 
   /* DMA subsystems initialization.*/
+#if defined(STM32_BDMA_REQUIRED)
+  bdmaInit();
+#endif
 #if defined(STM32_DMA_REQUIRED)
   dmaInit();
 #endif
diff --git a/os/hal/ports/STM32/STM32H7xx/hal_lld.h b/os/hal/ports/STM32/STM32H7xx/hal_lld.h
index 32bea6a0c..78cc6b7fc 100644
--- a/os/hal/ports/STM32/STM32H7xx/hal_lld.h
+++ b/os/hal/ports/STM32/STM32H7xx/hal_lld.h
@@ -2877,6 +2877,7 @@
 #include "mpu.h"
 #include "stm32_isr.h"
 #include "stm32_dma.h"
+#include "stm32_bdma.h"
 #include "stm32_rcc.h"
 
 #ifdef __cplusplus
diff --git a/os/hal/ports/STM32/STM32H7xx/platform.mk b/os/hal/ports/STM32/STM32H7xx/platform.mk
index ba282c449..fca4672b1 100644
--- a/os/hal/ports/STM32/STM32H7xx/platform.mk
+++ b/os/hal/ports/STM32/STM32H7xx/platform.mk
@@ -21,6 +21,7 @@ else
 endif
 
 # Drivers compatible with the platform.
+include $(CHIBIOS)/os/hal/ports/STM32/LLD/BDMAv1/driver.mk
 include $(CHIBIOS)/os/hal/ports/STM32/LLD/DMAv3/driver.mk
 include $(CHIBIOS)/os/hal/ports/STM32/LLD/GPIOv2/driver.mk
 include $(CHIBIOS)/os/hal/ports/STM32/LLD/SPIv3/driver.mk
diff --git a/os/hal/ports/STM32/STM32H7xx/stm32_rcc.h b/os/hal/ports/STM32/STM32H7xx/stm32_rcc.h
index 259272160..91084e5bc 100644
--- a/os/hal/ports/STM32/STM32H7xx/stm32_rcc.h
+++ b/os/hal/ports/STM32/STM32H7xx/stm32_rcc.h
@@ -500,6 +500,29 @@
  * @{
  */
 /**
+ * @brief   Enables the BDMA1 peripheral clock.
+ *
+ * @param[in] lp        low power enable flag
+ *
+ * @api
+ */
+#define rccEnableBDMA1(lp) rccEnableAHB4(RCC_AHB4ENR_BDMAEN, lp)
+
+/**
+ * @brief   Disables the BDMA1 peripheral clock.
+ *
+ * @api
+ */
+#define rccDisableBDMA1() rccDisableAHB4(RCC_AHB4ENR_BDMAEN)
+
+/**
+ * @brief   Resets the BDMA1 peripheral.
+ *
+ * @api
+ */
+#define rccResetBDMA1() rccEnableAHB4(RCC_AHB4RSTR_BDMARST)
+
+/**
  * @brief   Enables the DMA1 peripheral clock.
  *
  * @param[in] lp        low power enable flag
diff --git a/os/hal/ports/STM32/STM32H7xx/stm32_registry.h b/os/hal/ports/STM32/STM32H7xx/stm32_registry.h
index e0ddb5431..0a4af9460 100644
--- a/os/hal/ports/STM32/STM32H7xx/stm32_registry.h
+++ b/os/hal/ports/STM32/STM32H7xx/stm32_registry.h
@@ -67,6 +67,25 @@
 #define STM32_HAS_DAC2_CH1                  FALSE
 #define STM32_HAS_DAC2_CH2                  FALSE
 
+/* BDMA attributes.*/
+#define STM32_HAS_BDMA1                     TRUE
+#define STM32_BDMA1_CH0_HANDLER             Vector244
+#define STM32_BDMA1_CH1_HANDLER             Vector248
+#define STM32_BDMA1_CH2_HANDLER             Vector24C
+#define STM32_BDMA1_CH3_HANDLER             Vector250
+#define STM32_BDMA1_CH4_HANDLER             Vector254
+#define STM32_BDMA1_CH5_HANDLER             Vector258
+#define STM32_BDMA1_CH6_HANDLER             Vector25C
+#define STM32_BDMA1_CH7_HANDLER             Vector260
+#define STM32_BDMA1_CH0_NUMBER              129
+#define STM32_BDMA1_CH1_NUMBER              130
+#define STM32_BDMA1_CH2_NUMBER              131
+#define STM32_BDMA1_CH3_NUMBER              132
+#define STM32_BDMA1_CH4_NUMBER              133
+#define STM32_BDMA1_CH5_NUMBER              134
+#define STM32_BDMA1_CH6_NUMBER              135
+#define STM32_BDMA1_CH7_NUMBER              136
+
 /* DMA attributes.*/
 #define STM32_DMA_CACHE_HANDLING            TRUE