diff options
Diffstat (limited to 'os/hal/ports/STM32/STM32F7xx')
| -rw-r--r-- | os/hal/ports/STM32/STM32F7xx/hal_lld.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/os/hal/ports/STM32/STM32F7xx/hal_lld.h b/os/hal/ports/STM32/STM32F7xx/hal_lld.h index 8bce8bfbe..904617a64 100644 --- a/os/hal/ports/STM32/STM32F7xx/hal_lld.h +++ b/os/hal/ports/STM32/STM32F7xx/hal_lld.h @@ -1456,7 +1456,7 @@ #if (STM32_PLLI2SDIVQ_VALUE < 1) || (STM32_PLLI2SDIVQ_VALUE > 32)
#error "STM32_PLLI2SDIVQ_VALUE out of acceptable range"
#endif
-#define STM32_PLLI2SDIVQ (STM32_PLLI2SDIVQ_VALUE << 0)
+#define STM32_PLLI2SDIVQ ((STM32_PLLI2SDIVQ_VALUE - 1) << 0)
/**
* @brief PLLI2S Q output clock frequency after divisor.
@@ -1562,7 +1562,7 @@ #if (STM32_PLLSAIDIVQ_VALUE < 1) || (STM32_PLLSAIDIVQ_VALUE > 32)
#error "STM32_PLLSAIDIVQ_VALUE out of acceptable range"
#endif
-#define STM32_PLLSAIDIVQ (STM32_PLLSAIDIVQ_VALUE << 8)
+#define STM32_PLLSAIDIVQ ((STM32_PLLSAIDIVQ_VALUE - 1) << 8)
/**
* @brief PLLSAI Q output clock frequency after divisor.
|