1 files changed, 26 insertions, 0 deletions

diff --git a/os/hal/ports/STM32/STM32F4xx/stm32_registry.h b/os/hal/ports/STM32/STM32F4xx/stm32_registry.h
index 34183066d..c5b6a2e0b 100644
--- a/os/hal/ports/STM32/STM32F4xx/stm32_registry.h
+++ b/os/hal/ports/STM32/STM32F4xx/stm32_registry.h
@@ -214,6 +214,7 @@
 

 /* SPI attributes.*/

 #define STM32_HAS_SPI1                      TRUE

+#define STM32_SPI1_SUPPORTS_I2S             FALSE

 #define STM32_SPI1_RX_DMA_MSK               (STM32_DMA_STREAM_ID_MSK(2, 0) |\

                                              STM32_DMA_STREAM_ID_MSK(2, 2))

 #define STM32_SPI1_RX_DMA_CHN               0x00000303

@@ -222,12 +223,16 @@
 #define STM32_SPI1_TX_DMA_CHN               0x00303000

 

 #define STM32_HAS_SPI2                      TRUE

+#define STM32_SPI2_SUPPORTS_I2S             TRUE

+#define STM32_SPI2_I2S_FULLDUPLEX           TRUE

 #define STM32_SPI2_RX_DMA_MSK               STM32_DMA_STREAM_ID_MSK(1, 3)

 #define STM32_SPI2_RX_DMA_CHN               0x00000000

 #define STM32_SPI2_TX_DMA_MSK               STM32_DMA_STREAM_ID_MSK(1, 4)

 #define STM32_SPI2_TX_DMA_CHN               0x00000000

 

 #define STM32_HAS_SPI3                      TRUE

+#define STM32_SPI3_SUPPORTS_I2S             TRUE

+#define STM32_SPI3_I2S_FULLDUPLEX           TRUE

 #define STM32_SPI3_RX_DMA_MSK               (STM32_DMA_STREAM_ID_MSK(1, 0) |\

                                              STM32_DMA_STREAM_ID_MSK(1, 2))

 #define STM32_SPI3_RX_DMA_CHN               0x00000000

@@ -236,6 +241,7 @@
 #define STM32_SPI3_TX_DMA_CHN               0x00000000

 

 #define STM32_HAS_SPI4                      TRUE

+#define STM32_SPI4_SUPPORTS_I2S             FALSE

 #define STM32_SPI4_RX_DMA_MSK               (STM32_DMA_STREAM_ID_MSK(2, 0) |\

                                              STM32_DMA_STREAM_ID_MSK(2, 3))

 #define STM32_SPI4_RX_DMA_CHN               0x00005004

@@ -244,6 +250,7 @@
 #define STM32_SPI4_TX_DMA_CHN               0x00050040

 

 #define STM32_HAS_SPI5                      TRUE

+#define STM32_SPI5_SUPPORTS_I2S             FALSE

 #define STM32_SPI5_RX_DMA_MSK               (STM32_DMA_STREAM_ID_MSK(2, 3) |            \

                                              STM32_DMA_STREAM_ID_MSK(2, 5))

 #define STM32_SPI5_RX_DMA_CHN               0x00702000

@@ -252,6 +259,7 @@
 #define STM32_SPI5_TX_DMA_CHN               0x07020000

 

 #define STM32_HAS_SPI6                      TRUE

+#define STM32_SPI6_SUPPORTS_I2S             FALSE

 #define STM32_SPI6_RX_DMA_MSK               (STM32_DMA_STREAM_ID_MSK(2, 6))

 #define STM32_SPI6_RX_DMA_CHN               0x01000000

 #define STM32_SPI6_TX_DMA_MSK               (STM32_DMA_STREAM_ID_MSK(2, 5))

@@ -572,6 +580,7 @@
 

 /* SPI attributes.*/

 #define STM32_HAS_SPI1                      TRUE

+#define STM32_SPI1_SUPPORTS_I2S             FALSE

 #define STM32_SPI1_RX_DMA_MSK               (STM32_DMA_STREAM_ID_MSK(2, 0) |\

                                              STM32_DMA_STREAM_ID_MSK(2, 2))

 #define STM32_SPI1_RX_DMA_CHN               0x00000303

@@ -580,12 +589,16 @@
 #define STM32_SPI1_TX_DMA_CHN               0x00303000

 

 #define STM32_HAS_SPI2                      TRUE

+#define STM32_SPI2_SUPPORTS_I2S             TRUE

+#define STM32_SPI2_I2S_FULLDUPLEX           TRUE

 #define STM32_SPI2_RX_DMA_MSK               STM32_DMA_STREAM_ID_MSK(1, 3)

 #define STM32_SPI2_RX_DMA_CHN               0x00000000

 #define STM32_SPI2_TX_DMA_MSK               STM32_DMA_STREAM_ID_MSK(1, 4)

 #define STM32_SPI2_TX_DMA_CHN               0x00000000

 

 #define STM32_HAS_SPI3                      TRUE

+#define STM32_SPI3_SUPPORTS_I2S             TRUE

+#define STM32_SPI3_I2S_FULLDUPLEX           TRUE

 #define STM32_SPI3_RX_DMA_MSK               (STM32_DMA_STREAM_ID_MSK(1, 0) |\

                                              STM32_DMA_STREAM_ID_MSK(1, 2))

 #define STM32_SPI3_RX_DMA_CHN               0x00000000

@@ -882,6 +895,7 @@
 

 /* SPI attributes.*/

 #define STM32_HAS_SPI1                      TRUE

+#define STM32_SPI1_SUPPORTS_I2S             FALSE

 #define STM32_SPI1_RX_DMA_MSK               (STM32_DMA_STREAM_ID_MSK(2, 0) |\

                                              STM32_DMA_STREAM_ID_MSK(2, 2))

 #define STM32_SPI1_RX_DMA_CHN               0x00000303

@@ -890,12 +904,16 @@
 #define STM32_SPI1_TX_DMA_CHN               0x00303000

 

 #define STM32_HAS_SPI2                      TRUE

+#define STM32_SPI2_SUPPORTS_I2S             TRUE

+#define STM32_SPI2_I2S_FULLDUPLEX           TRUE

 #define STM32_SPI2_RX_DMA_MSK               STM32_DMA_STREAM_ID_MSK(1, 3)

 #define STM32_SPI2_RX_DMA_CHN               0x00000000

 #define STM32_SPI2_TX_DMA_MSK               STM32_DMA_STREAM_ID_MSK(1, 4)

 #define STM32_SPI2_TX_DMA_CHN               0x00000000

 

 #define STM32_HAS_SPI3                      TRUE

+#define STM32_SPI3_SUPPORTS_I2S             TRUE

+#define STM32_SPI3_I2S_FULLDUPLEX           TRUE

 #define STM32_SPI3_RX_DMA_MSK               (STM32_DMA_STREAM_ID_MSK(1, 0) |\

                                              STM32_DMA_STREAM_ID_MSK(1, 2))

 #define STM32_SPI3_RX_DMA_CHN               0x00000000

@@ -904,6 +922,7 @@
 #define STM32_SPI3_TX_DMA_CHN               0x00000000

 

 #define STM32_HAS_SPI4                      TRUE

+#define STM32_SPI4_SUPPORTS_I2S             FALSE

 #define STM32_SPI4_RX_DMA_MSK               (STM32_DMA_STREAM_ID_MSK(2, 0) |\

                                              STM32_DMA_STREAM_ID_MSK(2, 3))

 #define STM32_SPI4_RX_DMA_CHN               0x00005004

@@ -1149,6 +1168,7 @@
 

 /* SPI attributes.*/

 #define STM32_HAS_SPI1                      TRUE

+#define STM32_SPI1_SUPPORTS_I2S             FALSE

 #define STM32_SPI1_RX_DMA_MSK               (STM32_DMA_STREAM_ID_MSK(2, 0) |\

                                              STM32_DMA_STREAM_ID_MSK(2, 2))

 #define STM32_SPI1_RX_DMA_CHN               0x00000303

@@ -1157,12 +1177,16 @@
 #define STM32_SPI1_TX_DMA_CHN               0x00303000

 

 #define STM32_HAS_SPI2                      TRUE

+#define STM32_SPI2_SUPPORTS_I2S             TRUE

+#define STM32_SPI2_I2S_FULLDUPLEX           TRUE

 #define STM32_SPI2_RX_DMA_MSK               STM32_DMA_STREAM_ID_MSK(1, 3)

 #define STM32_SPI2_RX_DMA_CHN               0x00000000

 #define STM32_SPI2_TX_DMA_MSK               STM32_DMA_STREAM_ID_MSK(1, 4)

 #define STM32_SPI2_TX_DMA_CHN               0x00000000

 

 #define STM32_HAS_SPI3                      TRUE

+#define STM32_SPI3_SUPPORTS_I2S             TRUE

+#define STM32_SPI3_I2S_FULLDUPLEX           TRUE

 #define STM32_SPI3_RX_DMA_MSK               (STM32_DMA_STREAM_ID_MSK(1, 0) |\

                                              STM32_DMA_STREAM_ID_MSK(1, 2))

 #define STM32_SPI3_RX_DMA_CHN               0x00000000

@@ -1171,6 +1195,7 @@
 #define STM32_SPI3_TX_DMA_CHN               0x00000000

 

 #define STM32_HAS_SPI4                      TRUE

+#define STM32_SPI4_SUPPORTS_I2S             FALSE

 #define STM32_SPI4_RX_DMA_MSK               (STM32_DMA_STREAM_ID_MSK(2, 0) |\

                                              STM32_DMA_STREAM_ID_MSK(2, 3))

 #define STM32_SPI4_RX_DMA_CHN               0x00005004

@@ -1179,6 +1204,7 @@
 #define STM32_SPI4_TX_DMA_CHN               0x00050040

 

 #define STM32_HAS_SPI5                      TRUE

+#define STM32_SPI5_SUPPORTS_I2S             FALSE

 #define STM32_SPI5_RX_DMA_MSK               (STM32_DMA_STREAM_ID_MSK(2, 3) |\

                                              STM32_DMA_STREAM_ID_MSK(2, 5))

 #define STM32_SPI5_RX_DMA_CHN               0x00702000