diff options
Diffstat (limited to 'os/hal/ports/STM32/STM32F4xx/stm32_rcc.h')
| -rw-r--r-- | os/hal/ports/STM32/STM32F4xx/stm32_rcc.h | 288 |
1 files changed, 69 insertions, 219 deletions
diff --git a/os/hal/ports/STM32/STM32F4xx/stm32_rcc.h b/os/hal/ports/STM32/STM32F4xx/stm32_rcc.h index 480f69bee..0d0435c4d 100644 --- a/os/hal/ports/STM32/STM32F4xx/stm32_rcc.h +++ b/os/hal/ports/STM32/STM32F4xx/stm32_rcc.h @@ -23,8 +23,8 @@ * @addtogroup STM32F4xx_RCC
* @{
*/
-#ifndef _STM32_RCC_
-#define _STM32_RCC_
+#ifndef STM32_RCC_H
+#define STM32_RCC_H
/*===========================================================================*/
/* Driver constants. */
@@ -68,14 +68,12 @@ * @brief Disables the clock of one or more peripheral on the APB1 bus.
*
* @param[in] mask APB1 peripherals mask
- * @param[in] lp low power enable flag
*
* @api
*/
-#define rccDisableAPB1(mask, lp) { \
+#define rccDisableAPB1(mask) { \
RCC->APB1ENR &= ~(mask); \
- if (lp) \
- RCC->APB1LPENR &= ~(mask); \
+ RCC->APB1LPENR &= ~(mask); \
}
/**
@@ -94,28 +92,24 @@ * @brief Enables the clock of one or more peripheral on the APB2 bus.
*
* @param[in] mask APB2 peripherals mask
- * @param[in] lp low power enable flag
*
* @api
*/
#define rccEnableAPB2(mask, lp) { \
RCC->APB2ENR |= (mask); \
- if (lp) \
- RCC->APB2LPENR |= (mask); \
+ RCC->APB2LPENR |= (mask); \
}
/**
* @brief Disables the clock of one or more peripheral on the APB2 bus.
*
* @param[in] mask APB2 peripherals mask
- * @param[in] lp low power enable flag
*
* @api
*/
-#define rccDisableAPB2(mask, lp) { \
+#define rccDisableAPB2(mask) { \
RCC->APB2ENR &= ~(mask); \
- if (lp) \
- RCC->APB2LPENR &= ~(mask); \
+ RCC->APB2LPENR &= ~(mask); \
}
/**
@@ -140,22 +134,19 @@ */
#define rccEnableAHB1(mask, lp) { \
RCC->AHB1ENR |= (mask); \
- if (lp) \
- RCC->AHB1LPENR |= (mask); \
+ RCC->AHB1LPENR |= (mask); \
}
/**
* @brief Disables the clock of one or more peripheral on the AHB1 bus.
*
* @param[in] mask AHB1 peripherals mask
- * @param[in] lp low power enable flag
*
* @api
*/
-#define rccDisableAHB1(mask, lp) { \
+#define rccDisableAHB1(mask) { \
RCC->AHB1ENR &= ~(mask); \
- if (lp) \
- RCC->AHB1LPENR &= ~(mask); \
+ RCC->AHB1LPENR &= ~(mask); \
}
/**
@@ -188,14 +179,12 @@ * @brief Disables the clock of one or more peripheral on the AHB2 bus.
*
* @param[in] mask AHB2 peripherals mask
- * @param[in] lp low power enable flag
*
* @api
*/
-#define rccDisableAHB2(mask, lp) { \
+#define rccDisableAHB2(mask) { \
RCC->AHB2ENR &= ~(mask); \
- if (lp) \
- RCC->AHB2LPENR &= ~(mask); \
+ RCC->AHB2LPENR &= ~(mask); \
}
/**
@@ -228,14 +217,12 @@ * @brief Disables the clock of one or more peripheral on the AHB3 (FSMC) bus.
*
* @param[in] mask AHB3 peripherals mask
- * @param[in] lp low power enable flag
*
* @api
*/
-#define rccDisableAHB3(mask, lp) { \
+#define rccDisableAHB3(mask) { \
RCC->AHB3ENR &= ~(mask); \
- if (lp) \
- RCC->AHB3LPENR &= ~(mask); \
+ RCC->AHB3LPENR &= ~(mask); \
}
/**
@@ -267,11 +254,9 @@ /**
* @brief Disables the ADC1 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableADC1(lp) rccDisableAPB2(RCC_APB2ENR_ADC1EN, lp)
+#define rccDisableADC1() rccDisableAPB2(RCC_APB2ENR_ADC1EN)
/**
* @brief Resets the ADC1 peripheral.
@@ -292,11 +277,9 @@ /**
* @brief Disables the ADC2 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableADC2(lp) rccDisableAPB2(RCC_APB2ENR_ADC2EN, lp)
+#define rccDisableADC2() rccDisableAPB2(RCC_APB2ENR_ADC2EN)
/**
* @brief Resets the ADC2 peripheral.
@@ -317,11 +300,9 @@ /**
* @brief Disables the ADC3 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableADC3(lp) rccDisableAPB2(RCC_APB2ENR_ADC3EN, lp)
+#define rccDisableADC3() rccDisableAPB2(RCC_APB2ENR_ADC3EN)
/**
* @brief Resets the ADC3 peripheral.
@@ -347,11 +328,9 @@ /**
* @brief Disables the DAC1 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableDAC1(lp) rccDisableAPB1(RCC_APB1ENR_DACEN, lp)
+#define rccDisableDAC1() rccDisableAPB1(RCC_APB1ENR_DACEN)
/**
* @brief Resets the DAC1 peripheral.
@@ -377,11 +356,9 @@ /**
* @brief Disables the DMA1 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableDMA1(lp) rccDisableAHB1(RCC_AHB1ENR_DMA1EN, lp)
+#define rccDisableDMA1() rccDisableAHB1(RCC_AHB1ENR_DMA1EN)
/**
* @brief Resets the DMA1 peripheral.
@@ -402,11 +379,9 @@ /**
* @brief Disables the DMA2 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableDMA2(lp) rccDisableAHB1(RCC_AHB1ENR_DMA2EN, lp)
+#define rccDisableDMA2() rccDisableAHB1(RCC_AHB1ENR_DMA2EN)
/**
* @brief Resets the DMA2 peripheral.
@@ -432,11 +407,9 @@ /**
* @brief Disables the BKPSRAM peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableBKPSRAM(lp) rccDisableAHB1(RCC_AHB1ENR_BKPSRAMEN, lp)
+#define rccDisableBKPSRAM() rccDisableAHB1(RCC_AHB1ENR_BKPSRAMEN)
/** @} */
/**
@@ -455,11 +428,9 @@ /**
* @brief Disables PWR interface clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisablePWRInterface(lp) rccDisableAPB1(RCC_APB1ENR_PWREN, lp)
+#define rccDisablePWRInterface() rccDisableAPB1(RCC_APB1ENR_PWREN)
/**
* @brief Resets the PWR interface.
@@ -485,11 +456,9 @@ /**
* @brief Disables the CAN1 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableCAN1(lp) rccDisableAPB1(RCC_APB1ENR_CAN1EN, lp)
+#define rccDisableCAN1() rccDisableAPB1(RCC_APB1ENR_CAN1EN)
/**
* @brief Resets the CAN1 peripheral.
@@ -510,11 +479,9 @@ /**
* @brief Disables the CAN2 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableCAN2(lp) rccDisableAPB1(RCC_APB1ENR_CAN2EN, lp)
+#define rccDisableCAN2() rccDisableAPB1(RCC_APB1ENR_CAN2EN)
/**
* @brief Resets the CAN2 peripheral.
@@ -530,7 +497,6 @@ */
/**
* @brief Enables the ETH peripheral clock.
- * @note The @p lp parameter is ignored in this family.
*
* @param[in] lp low power enable flag
*
@@ -542,15 +508,12 @@ /**
* @brief Disables the ETH peripheral clock.
- * @note The @p lp parameter is ignored in this family.
- *
- * @param[in] lp low power enable flag
*
* @api
*/
-#define rccDisableETH(lp) rccDisableAHB1(RCC_AHB1ENR_ETHMACEN | \
- RCC_AHB1ENR_ETHMACTXEN | \
- RCC_AHB1ENR_ETHMACRXEN, lp)
+#define rccDisableETH() rccDisableAHB1(RCC_AHB1ENR_ETHMACEN | \
+ RCC_AHB1ENR_ETHMACTXEN | \
+ RCC_AHB1ENR_ETHMACRXEN)
/**
* @brief Resets the ETH peripheral.
@@ -576,11 +539,9 @@ /**
* @brief Disables the I2C1 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableI2C1(lp) rccDisableAPB1(RCC_APB1ENR_I2C1EN, lp)
+#define rccDisableI2C1() rccDisableAPB1(RCC_APB1ENR_I2C1EN)
/**
* @brief Resets the I2C1 peripheral.
@@ -601,11 +562,9 @@ /**
* @brief Disables the I2C2 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableI2C2(lp) rccDisableAPB1(RCC_APB1ENR_I2C2EN, lp)
+#define rccDisableI2C2() rccDisableAPB1(RCC_APB1ENR_I2C2EN)
/**
* @brief Resets the I2C2 peripheral.
@@ -626,11 +585,9 @@ /**
* @brief Disables the I2C3 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableI2C3(lp) rccDisableAPB1(RCC_APB1ENR_I2C3EN, lp)
+#define rccDisableI2C3() rccDisableAPB1(RCC_APB1ENR_I2C3EN)
/**
* @brief Resets the I2C3 peripheral.
@@ -656,11 +613,9 @@ /**
* @brief Disables the OTG_FS peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableOTG_FS(lp) rccDisableAHB2(RCC_AHB2ENR_OTGFSEN, lp)
+#define rccDisableOTG_FS() rccDisableAHB2(RCC_AHB2ENR_OTGFSEN)
/**
* @brief Resets the OTG_FS peripheral.
@@ -681,11 +636,9 @@ /**
* @brief Disables the OTG_HS peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableOTG_HS(lp) rccDisableAHB1(RCC_AHB1ENR_OTGHSEN, lp)
+#define rccDisableOTG_HS() rccDisableAHB1(RCC_AHB1ENR_OTGHSEN)
/**
* @brief Resets the OTG_HS peripheral.
@@ -706,11 +659,9 @@ /**
* @brief Disables the OTG_HS peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableOTG_HSULPI(lp) rccDisableAHB1(RCC_AHB1ENR_OTGHSULPIEN, lp)
+#define rccDisableOTG_HSULPI() rccDisableAHB1(RCC_AHB1ENR_OTGHSULPIEN)
/** @} */
/**
@@ -729,11 +680,9 @@ /**
* @brief Disables the QUADSPI1 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableQUADSPI1(lp) rccDisableAHB3(RCC_AHB3ENR_QSPIEN, lp)
+#define rccDisableQUADSPI1() rccDisableAHB3(RCC_AHB3ENR_QSPIEN)
/**
* @brief Resets the QUADSPI1 peripheral.
@@ -749,7 +698,6 @@ */
/**
* @brief Enables the SDIO peripheral clock.
- * @note The @p lp parameter is ignored in this family.
*
* @param[in] lp low power enable flag
*
@@ -759,17 +707,13 @@ /**
* @brief Disables the SDIO peripheral clock.
- * @note The @p lp parameter is ignored in this family.
- *
- * @param[in] lp low power enable flag
*
* @api
*/
-#define rccDisableSDIO(lp) rccDisableAPB2(RCC_APB2ENR_SDIOEN, lp)
+#define rccDisableSDIO() rccDisableAPB2(RCC_APB2ENR_SDIOEN)
/**
* @brief Resets the SDIO peripheral.
- * @note Not supported in this family, does nothing.
*
* @api
*/
@@ -792,11 +736,9 @@ /**
* @brief Disables the SPI1 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableSPI1(lp) rccDisableAPB2(RCC_APB2ENR_SPI1EN, lp)
+#define rccDisableSPI1() rccDisableAPB2(RCC_APB2ENR_SPI1EN)
/**
* @brief Resets the SPI1 peripheral.
@@ -817,11 +759,9 @@ /**
* @brief Disables the SPI2 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableSPI2(lp) rccDisableAPB1(RCC_APB1ENR_SPI2EN, lp)
+#define rccDisableSPI2() rccDisableAPB1(RCC_APB1ENR_SPI2EN)
/**
* @brief Resets the SPI2 peripheral.
@@ -842,11 +782,9 @@ /**
* @brief Disables the SPI3 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableSPI3(lp) rccDisableAPB1(RCC_APB1ENR_SPI3EN, lp)
+#define rccDisableSPI3() rccDisableAPB1(RCC_APB1ENR_SPI3EN)
/**
* @brief Resets the SPI3 peripheral.
@@ -867,11 +805,9 @@ /**
* @brief Disables the SPI4 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableSPI4(lp) rccDisableAPB2(RCC_APB2ENR_SPI4EN, lp)
+#define rccDisableSPI4() rccDisableAPB2(RCC_APB2ENR_SPI4EN)
/**
* @brief Resets the SPI4 peripheral.
@@ -892,11 +828,9 @@ /**
* @brief Disables the SPI5 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableSPI5(lp) rccDisableAPB2(RCC_APB2ENR_SPI5EN, lp)
+#define rccDisableSPI5() rccDisableAPB2(RCC_APB2ENR_SPI5EN)
/**
* @brief Resets the SPI5 peripheral.
@@ -917,11 +851,9 @@ /**
* @brief Disables the SPI6 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableSPI6(lp) rccDisableAPB2(RCC_APB2ENR_SPI6EN, lp)
+#define rccDisableSPI6() rccDisableAPB2(RCC_APB2ENR_SPI6EN)
/**
* @brief Resets the SPI6 peripheral.
@@ -937,7 +869,6 @@ */
/**
* @brief Enables the TIM1 peripheral clock.
- * @note The @p lp parameter is ignored in this family.
*
* @param[in] lp low power enable flag
*
@@ -947,13 +878,10 @@ /**
* @brief Disables the TIM1 peripheral clock.
- * @note The @p lp parameter is ignored in this family.
- *
- * @param[in] lp low power enable flag
*
* @api
*/
-#define rccDisableTIM1(lp) rccDisableAPB2(RCC_APB2ENR_TIM1EN, lp)
+#define rccDisableTIM1() rccDisableAPB2(RCC_APB2ENR_TIM1EN)
/**
* @brief Resets the TIM1 peripheral.
@@ -974,11 +902,9 @@ /**
* @brief Disables the TIM2 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableTIM2(lp) rccDisableAPB1(RCC_APB1ENR_TIM2EN, lp)
+#define rccDisableTIM2() rccDisableAPB1(RCC_APB1ENR_TIM2EN)
/**
* @brief Resets the TIM2 peripheral.
@@ -999,11 +925,9 @@ /**
* @brief Disables the TIM3 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableTIM3(lp) rccDisableAPB1(RCC_APB1ENR_TIM3EN, lp)
+#define rccDisableTIM3() rccDisableAPB1(RCC_APB1ENR_TIM3EN)
/**
* @brief Resets the TIM3 peripheral.
@@ -1024,11 +948,9 @@ /**
* @brief Disables the TIM4 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableTIM4(lp) rccDisableAPB1(RCC_APB1ENR_TIM4EN, lp)
+#define rccDisableTIM4() rccDisableAPB1(RCC_APB1ENR_TIM4EN)
/**
* @brief Resets the TIM4 peripheral.
@@ -1039,7 +961,6 @@ /**
* @brief Enables the TIM5 peripheral clock.
- * @note The @p lp parameter is ignored in this family.
*
* @param[in] lp low power enable flag
*
@@ -1049,13 +970,10 @@ /**
* @brief Disables the TIM5 peripheral clock.
- * @note The @p lp parameter is ignored in this family.
- *
- * @param[in] lp low power enable flag
*
* @api
*/
-#define rccDisableTIM5(lp) rccDisableAPB1(RCC_APB1ENR_TIM5EN, lp)
+#define rccDisableTIM5() rccDisableAPB1(RCC_APB1ENR_TIM5EN)
/**
* @brief Resets the TIM5 peripheral.
@@ -1066,7 +984,6 @@ /**
* @brief Enables the TIM6 peripheral clock.
- * @note The @p lp parameter is ignored in this family.
*
* @param[in] lp low power enable flag
*
@@ -1076,13 +993,10 @@ /**
* @brief Disables the TIM6 peripheral clock.
- * @note The @p lp parameter is ignored in this family.
- *
- * @param[in] lp low power enable flag
*
* @api
*/
-#define rccDisableTIM6(lp) rccDisableAPB1(RCC_APB1ENR_TIM6EN, lp)
+#define rccDisableTIM6() rccDisableAPB1(RCC_APB1ENR_TIM6EN)
/**
* @brief Resets the TIM6 peripheral.
@@ -1093,7 +1007,6 @@ /**
* @brief Enables the TIM7 peripheral clock.
- * @note The @p lp parameter is ignored in this family.
*
* @param[in] lp low power enable flag
*
@@ -1103,13 +1016,10 @@ /**
* @brief Disables the TIM7 peripheral clock.
- * @note The @p lp parameter is ignored in this family.
- *
- * @param[in] lp low power enable flag
*
* @api
*/
-#define rccDisableTIM7(lp) rccDisableAPB1(RCC_APB1ENR_TIM7EN, lp)
+#define rccDisableTIM7() rccDisableAPB1(RCC_APB1ENR_TIM7EN)
/**
* @brief Resets the TIM7 peripheral.
@@ -1120,7 +1030,6 @@ /**
* @brief Enables the TIM8 peripheral clock.
- * @note The @p lp parameter is ignored in this family.
*
* @param[in] lp low power enable flag
*
@@ -1130,13 +1039,10 @@ /**
* @brief Disables the TIM8 peripheral clock.
- * @note The @p lp parameter is ignored in this family.
- *
- * @param[in] lp low power enable flag
*
* @api
*/
-#define rccDisableTIM8(lp) rccDisableAPB2(RCC_APB2ENR_TIM8EN, lp)
+#define rccDisableTIM8() rccDisableAPB2(RCC_APB2ENR_TIM8EN)
/**
* @brief Resets the TIM8 peripheral.
@@ -1147,7 +1053,6 @@ /**
* @brief Enables the TIM9 peripheral clock.
- * @note The @p lp parameter is ignored in this family.
*
* @param[in] lp low power enable flag
*
@@ -1157,13 +1062,10 @@ /**
* @brief Disables the TIM9 peripheral clock.
- * @note The @p lp parameter is ignored in this family.
- *
- * @param[in] lp low power enable flag
*
* @api
*/
-#define rccDisableTIM9(lp) rccDisableAPB2(RCC_APB2ENR_TIM9EN, lp)
+#define rccDisableTIM9() rccDisableAPB2(RCC_APB2ENR_TIM9EN)
/**
* @brief Resets the TIM9 peripheral.
@@ -1174,7 +1076,6 @@ /**
* @brief Enables the TIM10 peripheral clock.
- * @note The @p lp parameter is ignored in this family.
*
* @param[in] lp low power enable flag
*
@@ -1184,13 +1085,10 @@ /**
* @brief Disables the TIM10 peripheral clock.
- * @note The @p lp parameter is ignored in this family.
- *
- * @param[in] lp low power enable flag
*
* @api
*/
-#define rccDisableTIM10(lp) rccDisableAPB2(RCC_APB2ENR_TIM10EN, lp)
+#define rccDisableTIM10() rccDisableAPB2(RCC_APB2ENR_TIM10EN)
/**
* @brief Resets the TIM10 peripheral.
@@ -1201,7 +1099,6 @@ /**
* @brief Enables the TIM11 peripheral clock.
- * @note The @p lp parameter is ignored in this family.
*
* @param[in] lp low power enable flag
*
@@ -1211,13 +1108,10 @@ /**
* @brief Disables the TIM11 peripheral clock.
- * @note The @p lp parameter is ignored in this family.
- *
- * @param[in] lp low power enable flag
*
* @api
*/
-#define rccDisableTIM11(lp) rccDisableAPB2(RCC_APB2ENR_TIM11EN, lp)
+#define rccDisableTIM11() rccDisableAPB2(RCC_APB2ENR_TIM11EN)
/**
* @brief Resets the TIM11 peripheral.
@@ -1228,7 +1122,6 @@ /**
* @brief Enables the TIM12 peripheral clock.
- * @note The @p lp parameter is ignored in this family.
*
* @param[in] lp low power enable flag
*
@@ -1238,13 +1131,10 @@ /**
* @brief Disables the TIM12 peripheral clock.
- * @note The @p lp parameter is ignored in this family.
- *
- * @param[in] lp low power enable flag
*
* @api
*/
-#define rccDisableTIM12(lp) rccDisableAPB1(RCC_APB1ENR_TIM12EN, lp)
+#define rccDisableTIM12() rccDisableAPB1(RCC_APB1ENR_TIM12EN)
/**
* @brief Resets the TIM12 peripheral.
@@ -1255,7 +1145,6 @@ /**
* @brief Enables the TIM13 peripheral clock.
- * @note The @p lp parameter is ignored in this family.
*
* @param[in] lp low power enable flag
*
@@ -1265,13 +1154,10 @@ /**
* @brief Disables the TIM13 peripheral clock.
- * @note The @p lp parameter is ignored in this family.
- *
- * @param[in] lp low power enable flag
*
* @api
*/
-#define rccDisableTIM13(lp) rccDisableAPB1(RCC_APB1ENR_TIM13EN, lp)
+#define rccDisableTIM13() rccDisableAPB1(RCC_APB1ENR_TIM13EN)
/**
* @brief Resets the TIM13 peripheral.
@@ -1282,7 +1168,6 @@ /**
* @brief Enables the TIM14 peripheral clock.
- * @note The @p lp parameter is ignored in this family.
*
* @param[in] lp low power enable flag
*
@@ -1292,13 +1177,10 @@ /**
* @brief Disables the TIM14 peripheral clock.
- * @note The @p lp parameter is ignored in this family.
- *
- * @param[in] lp low power enable flag
*
* @api
*/
-#define rccDisableTIM14(lp) rccDisableAPB1(RCC_APB1ENR_TIM14EN, lp)
+#define rccDisableTIM14() rccDisableAPB1(RCC_APB1ENR_TIM14EN)
/**
* @brief Resets the TIM14 peripheral.
@@ -1324,11 +1206,9 @@ /**
* @brief Disables the USART1 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableUSART1(lp) rccDisableAPB2(RCC_APB2ENR_USART1EN, lp)
+#define rccDisableUSART1() rccDisableAPB2(RCC_APB2ENR_USART1EN)
/**
* @brief Resets the USART1 peripheral.
@@ -1349,11 +1229,9 @@ /**
* @brief Disables the USART2 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableUSART2(lp) rccDisableAPB1(RCC_APB1ENR_USART2EN, lp)
+#define rccDisableUSART2() rccDisableAPB1(RCC_APB1ENR_USART2EN)
/**
* @brief Resets the USART2 peripheral.
@@ -1374,11 +1252,9 @@ /**
* @brief Disables the USART3 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableUSART3(lp) rccDisableAPB1(RCC_APB1ENR_USART3EN, lp)
+#define rccDisableUSART3() rccDisableAPB1(RCC_APB1ENR_USART3EN)
/**
* @brief Resets the USART3 peripheral.
@@ -1389,7 +1265,6 @@ /**
* @brief Enables the UART4 peripheral clock.
- * @note The @p lp parameter is ignored in this family.
*
* @param[in] lp low power enable flag
*
@@ -1399,13 +1274,10 @@ /**
* @brief Disables the UART4 peripheral clock.
- * @note The @p lp parameter is ignored in this family.
- *
- * @param[in] lp low power enable flag
*
* @api
*/
-#define rccDisableUART4(lp) rccDisableAPB1(RCC_APB1ENR_UART4EN, lp)
+#define rccDisableUART4() rccDisableAPB1(RCC_APB1ENR_UART4EN)
/**
* @brief Resets the UART4 peripheral.
@@ -1416,7 +1288,6 @@ /**
* @brief Enables the UART5 peripheral clock.
- * @note The @p lp parameter is ignored in this family.
*
* @param[in] lp low power enable flag
*
@@ -1426,13 +1297,10 @@ /**
* @brief Disables the UART5 peripheral clock.
- * @note The @p lp parameter is ignored in this family.
- *
- * @param[in] lp low power enable flag
*
* @api
*/
-#define rccDisableUART5(lp) rccDisableAPB1(RCC_APB1ENR_UART5EN, lp)
+#define rccDisableUART5() rccDisableAPB1(RCC_APB1ENR_UART5EN)
/**
* @brief Resets the UART5 peripheral.
@@ -1453,11 +1321,9 @@ /**
* @brief Disables the USART6 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableUSART6(lp) rccDisableAPB2(RCC_APB2ENR_USART6EN, lp)
+#define rccDisableUSART6() rccDisableAPB2(RCC_APB2ENR_USART6EN)
/**
* @brief Resets the USART6 peripheral.
@@ -1468,7 +1334,6 @@ /**
* @brief Enables the UART7 peripheral clock.
- * @note The @p lp parameter is ignored in this family.
*
* @param[in] lp low power enable flag
*
@@ -1478,13 +1343,10 @@ /**
* @brief Disables the UART7 peripheral clock.
- * @note The @p lp parameter is ignored in this family.
- *
- * @param[in] lp low power enable flag
*
* @api
*/
-#define rccDisableUART7(lp) rccDisableAPB1(RCC_APB1ENR_UART7EN, lp)
+#define rccDisableUART7() rccDisableAPB1(RCC_APB1ENR_UART7EN)
/**
* @brief Resets the UART7 peripheral.
@@ -1495,7 +1357,6 @@ /**
* @brief Enables the UART8 peripheral clock.
- * @note The @p lp parameter is ignored in this family.
*
* @param[in] lp low power enable flag
*
@@ -1505,13 +1366,10 @@ /**
* @brief Disables the UART8 peripheral clock.
- * @note The @p lp parameter is ignored in this family.
- *
- * @param[in] lp low power enable flag
*
* @api
*/
-#define rccDisableUART8(lp) rccDisableAPB1(RCC_APB1ENR_UART8EN, lp)
+#define rccDisableUART8() rccDisableAPB1(RCC_APB1ENR_UART8EN)
/**
* @brief Resets the UART8 peripheral.
@@ -1537,11 +1395,9 @@ /**
* @brief Disables the LTDC peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableLTDC(lp) rccDisableAPB2(RCC_APB2ENR_LTDCEN, lp)
+#define rccDisableLTDC() rccDisableAPB2(RCC_APB2ENR_LTDCEN)
/**
* @brief Resets the LTDC peripheral.
@@ -1566,11 +1422,9 @@ /**
* @brief Disables the DMA2D peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableDMA2D(lp) rccDisableAHB1(RCC_AHB1ENR_DMA2DEN, lp)
+#define rccDisableDMA2D() rccDisableAHB1(RCC_AHB1ENR_DMA2DEN)
/**
* @brief Resets the DMA2D peripheral.
@@ -1596,11 +1450,9 @@ /**
* @brief Disables the CRC peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableCRC(lp) rccDisableAHB1(RCC_AHB1ENR_CRCEN, lp)
+#define rccDisableCRC() rccDisableAHB1(RCC_AHB1ENR_CRCEN)
/**
* @brief Resets the CRC peripheral.
@@ -1632,15 +1484,13 @@ /**
* @brief Disables the FSMC peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
#if STM32_HAS_FSMC || defined(__DOXYGEN__)
#if STM32_FSMC_IS_FMC || defined(__DOXYGEN__)
- #define rccDisableFSMC(lp) rccDisableAHB3(RCC_AHB3ENR_FMCEN, lp)
+ #define rccDisableFSMC() rccDisableAHB3(RCC_AHB3ENR_FMCEN)
#else
- #define rccDisableFSMC(lp) rccDisableAHB3(RCC_AHB3ENR_FSMCEN, lp)
+ #define rccDisableFSMC() rccDisableAHB3(RCC_AHB3ENR_FSMCEN)
#endif
#endif
@@ -1669,6 +1519,6 @@ extern "C" { }
#endif
-#endif /* _STM32_RCC_ */
+#endif /* STM32_RCC_H */
/** @} */
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