aboutsummaryrefslogtreecommitdiffstats
path: root/os/hal/ports/STM32/STM32F37x/stm32_rcc.h
diff options
context:
space:
mode:
Diffstat (limited to 'os/hal/ports/STM32/STM32F37x/stm32_rcc.h')
-rw-r--r--os/hal/ports/STM32/STM32F37x/stm32_rcc.h150
1 files changed, 39 insertions, 111 deletions
diff --git a/os/hal/ports/STM32/STM32F37x/stm32_rcc.h b/os/hal/ports/STM32/STM32F37x/stm32_rcc.h
index 5310ab103..c043a57c0 100644
--- a/os/hal/ports/STM32/STM32F37x/stm32_rcc.h
+++ b/os/hal/ports/STM32/STM32F37x/stm32_rcc.h
@@ -24,8 +24,8 @@
* @{
*/
-#ifndef _STM32_RCC_
-#define _STM32_RCC_
+#ifndef STM32_RCC_H
+#define STM32_RCC_H
/*===========================================================================*/
/* Driver constants. */
@@ -67,11 +67,10 @@
* @brief Disables the clock of one or more peripheral on the APB1 bus.
*
* @param[in] mask APB1 peripherals mask
- * @param[in] lp low power enable flag
*
* @api
*/
-#define rccDisableAPB1(mask, lp) { \
+#define rccDisableAPB1(mask) { \
RCC->APB1ENR &= ~(mask); \
}
@@ -103,11 +102,10 @@
* @brief Disables the clock of one or more peripheral on the APB2 bus.
*
* @param[in] mask APB2 peripherals mask
- * @param[in] lp low power enable flag
*
* @api
*/
-#define rccDisableAPB2(mask, lp) { \
+#define rccDisableAPB2(mask) { \
RCC->APB2ENR &= ~(mask); \
}
@@ -139,11 +137,10 @@
* @brief Disables the clock of one or more peripheral on the AHB bus.
*
* @param[in] mask AHB peripherals mask
- * @param[in] lp low power enable flag
*
* @api
*/
-#define rccDisableAHB(mask, lp) { \
+#define rccDisableAHB(mask) { \
RCC->AHBENR &= ~(mask); \
}
@@ -176,11 +173,9 @@
/**
* @brief Disables the ADC1 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableADC1(lp) rccDisableAPB2(RCC_APB2ENR_ADC1EN, lp)
+#define rccDisableADC1() rccDisableAPB2(RCC_APB2ENR_ADC1EN)
/**
* @brief Resets the ADC1 peripheral.
@@ -206,11 +201,9 @@
/**
* @brief Disables the DAC1 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableDAC1(lp) rccDisableAPB1(RCC_APB1ENR_DAC1EN, lp)
+#define rccDisableDAC1() rccDisableAPB1(RCC_APB1ENR_DAC1EN)
/**
* @brief Resets the DAC1 peripheral.
@@ -231,11 +224,9 @@
/**
* @brief Disables the DAC1 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableDAC2(lp) rccDisableAPB1(RCC_APB1ENR_DAC2EN, lp)
+#define rccDisableDAC2() rccDisableAPB1(RCC_APB1ENR_DAC2EN)
/**
* @brief Resets the DAC1 peripheral.
@@ -261,13 +252,10 @@
/**
* @brief Disables the CAN1 peripheral clock.
- * @note The @p lp parameter is ignored in this family.
- *
- * @param[in] lp low power enable flag
*
* @api
*/
-#define rccDisableCAN1(lp) rccDisableAPB1(RCC_APB1ENR_CANEN, lp)
+#define rccDisableCAN1() rccDisableAPB1(RCC_APB1ENR_CANEN)
/**
* @brief Resets the CAN1 peripheral.
@@ -293,11 +281,9 @@
/**
* @brief Disables the DMA1 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableDMA1(lp) rccDisableAHB(RCC_AHBENR_DMA1EN, lp)
+#define rccDisableDMA1() rccDisableAHB(RCC_AHBENR_DMA1EN)
/**
* @brief Resets the DMA1 peripheral.
@@ -318,11 +304,9 @@
/**
* @brief Disables the DMA2 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableDMA2(lp) rccDisableAHB(RCC_AHBENR_DMA2EN, lp)
+#define rccDisableDMA2() rccDisableAHB(RCC_AHBENR_DMA2EN)
/**
* @brief Resets the DMA2 peripheral.
@@ -348,13 +332,10 @@
/**
* @brief Disables PWR interface clock.
- * @note The @p lp parameter is ignored in this family.
- *
- * @param[in] lp low power enable flag
*
* @api
*/
-#define rccDisablePWRInterface(lp) rccDisableAPB1(RCC_APB1ENR_PWREN, lp)
+#define rccDisablePWRInterface() rccDisableAPB1(RCC_APB1ENR_PWREN)
/**
* @brief Resets the PWR interface.
@@ -380,11 +361,9 @@
/**
* @brief Disables the I2C1 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableI2C1(lp) rccDisableAPB1(RCC_APB1ENR_I2C1EN, lp)
+#define rccDisableI2C1() rccDisableAPB1(RCC_APB1ENR_I2C1EN)
/**
* @brief Resets the I2C1 peripheral.
@@ -405,11 +384,9 @@
/**
* @brief Disables the I2C2 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableI2C2(lp) rccDisableAPB1(RCC_APB1ENR_I2C2EN, lp)
+#define rccDisableI2C2() rccDisableAPB1(RCC_APB1ENR_I2C2EN)
/**
* @brief Resets the I2C2 peripheral.
@@ -435,11 +412,9 @@
/**
* @brief Disables the SDADC1 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableSDADC1(lp) rccDisableAPB2(RCC_APB2ENR_SDADC1EN, lp)
+#define rccDisableSDADC1() rccDisableAPB2(RCC_APB2ENR_SDADC1EN)
/**
* @brief Resets the SDADC1 peripheral.
@@ -460,11 +435,9 @@
/**
* @brief Disables the SDADC2 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableSDADC2(lp) rccDisableAPB2(RCC_APB2ENR_SDADC2EN, lp)
+#define rccDisableSDADC2() rccDisableAPB2(RCC_APB2ENR_SDADC2EN)
/**
* @brief Resets the SDADC2 peripheral.
@@ -485,11 +458,9 @@
/**
* @brief Disables the SDADC3 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableSDADC3(lp) rccDisableAPB2(RCC_APB2ENR_SDADC3EN, lp)
+#define rccDisableSDADC3() rccDisableAPB2(RCC_APB2ENR_SDADC3EN)
/**
* @brief Resets the SDADC3 peripheral.
@@ -515,11 +486,9 @@
/**
* @brief Disables the SPI1 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableSPI1(lp) rccDisableAPB2(RCC_APB2ENR_SPI1EN, lp)
+#define rccDisableSPI1() rccDisableAPB2(RCC_APB2ENR_SPI1EN)
/**
* @brief Resets the SPI1 peripheral.
@@ -540,11 +509,9 @@
/**
* @brief Disables the SPI2 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableSPI2(lp) rccDisableAPB1(RCC_APB1ENR_SPI2EN, lp)
+#define rccDisableSPI2() rccDisableAPB1(RCC_APB1ENR_SPI2EN)
/**
* @brief Resets the SPI2 peripheral.
@@ -565,13 +532,10 @@
/**
* @brief Disables the SPI3 peripheral clock.
- * @note The @p lp parameter is ignored in this family.
- *
- * @param[in] lp low power enable flag
*
* @api
*/
-#define rccDisableSPI3(lp) rccDisableAPB1(RCC_APB1ENR_SPI3EN, lp)
+#define rccDisableSPI3() rccDisableAPB1(RCC_APB1ENR_SPI3EN)
/**
* @brief Resets the SPI3 peripheral.
@@ -597,11 +561,9 @@
/**
* @brief Disables the TIM2 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableTIM2(lp) rccDisableAPB1(RCC_APB1ENR_TIM2EN, lp)
+#define rccDisableTIM2() rccDisableAPB1(RCC_APB1ENR_TIM2EN)
/**
* @brief Resets the TIM2 peripheral.
@@ -622,11 +584,9 @@
/**
* @brief Disables the TIM3 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableTIM3(lp) rccDisableAPB1(RCC_APB1ENR_TIM3EN, lp)
+#define rccDisableTIM3() rccDisableAPB1(RCC_APB1ENR_TIM3EN)
/**
* @brief Resets the TIM3 peripheral.
@@ -647,11 +607,9 @@
/**
* @brief Disables the TIM4 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableTIM4(lp) rccDisableAPB1(RCC_APB1ENR_TIM4EN, lp)
+#define rccDisableTIM4() rccDisableAPB1(RCC_APB1ENR_TIM4EN)
/**
* @brief Resets the TIM4 peripheral.
@@ -672,11 +630,9 @@
/**
* @brief Disables the TIM5 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableTIM5(lp) rccDisableAPB1(RCC_APB1ENR_TIM5EN, lp)
+#define rccDisableTIM5() rccDisableAPB1(RCC_APB1ENR_TIM5EN)
/**
* @brief Resets the TIM5 peripheral.
@@ -697,11 +653,9 @@
/**
* @brief Disables the TIM6 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableTIM6(lp) rccDisableAPB1(RCC_APB1ENR_TIM6EN, lp)
+#define rccDisableTIM6() rccDisableAPB1(RCC_APB1ENR_TIM6EN)
/**
* @brief Resets the TIM6 peripheral.
@@ -722,11 +676,9 @@
/**
* @brief Disables the TIM7 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableTIM7(lp) rccDisableAPB1(RCC_APB1ENR_TIM7EN, lp)
+#define rccDisableTIM7() rccDisableAPB1(RCC_APB1ENR_TIM7EN)
/**
* @brief Resets the TIM7 peripheral.
@@ -747,11 +699,9 @@
/**
* @brief Disables the TIM12 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableTIM12(lp) rccDisableAPB1(RCC_APB1ENR_TIM12EN, lp)
+#define rccDisableTIM12() rccDisableAPB1(RCC_APB1ENR_TIM12EN)
/**
* @brief Resets the TIM12 peripheral.
@@ -772,11 +722,9 @@
/**
* @brief Disables the TIM13 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableTIM13(lp) rccDisableAPB1(RCC_APB1ENR_TIM13EN, lp)
+#define rccDisableTIM13() rccDisableAPB1(RCC_APB1ENR_TIM13EN)
/**
* @brief Resets the TIM13 peripheral.
@@ -798,11 +746,9 @@
/**
* @brief Disables the TIM14 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableTIM14(lp) rccDisableAPB1(RCC_APB1ENR_TIM14EN, lp)
+#define rccDisableTIM14() rccDisableAPB1(RCC_APB1ENR_TIM14EN)
/**
* @brief Resets the TIM14 peripheral.
@@ -823,11 +769,9 @@
/**
* @brief Disables the TIM15 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableTIM15(lp) rccDisableAPB2(RCC_APB2ENR_TIM15EN, lp)
+#define rccDisableTIM15() rccDisableAPB2(RCC_APB2ENR_TIM15EN)
/**
* @brief Resets the TIM15 peripheral.
@@ -848,11 +792,9 @@
/**
* @brief Disables the TIM16 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableTIM16(lp) rccDisableAPB2(RCC_APB2ENR_TIM16EN, lp)
+#define rccDisableTIM16() rccDisableAPB2(RCC_APB2ENR_TIM16EN)
/**
* @brief Resets the TIM16 peripheral.
@@ -873,11 +815,9 @@
/**
* @brief Disables the TIM17 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableTIM17(lp) rccDisableAPB2(RCC_APB2ENR_TIM17EN, lp)
+#define rccDisableTIM17() rccDisableAPB2(RCC_APB2ENR_TIM17EN)
/**
* @brief Resets the TIM17 peripheral.
@@ -898,11 +838,9 @@
/**
* @brief Disables the TIM18 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableTIM18(lp) rccDisableAPB1(RCC_APB1ENR_TIM18EN, lp)
+#define rccDisableTIM18() rccDisableAPB1(RCC_APB1ENR_TIM18EN)
/**
* @brief Resets the TIM18 peripheral.
@@ -923,11 +861,9 @@
/**
* @brief Disables the TIM19 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableTIM19(lp) rccDisableAPB2(RCC_APB2ENR_TIM19EN, lp)
+#define rccDisableTIM19() rccDisableAPB2(RCC_APB2ENR_TIM19EN)
/**
* @brief Resets the TIM19 peripheral.
@@ -953,11 +889,9 @@
/**
* @brief Disables the USART1 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableUSART1(lp) rccDisableAPB2(RCC_APB2ENR_USART1EN, lp)
+#define rccDisableUSART1() rccDisableAPB2(RCC_APB2ENR_USART1EN)
/**
* @brief Resets the USART1 peripheral.
@@ -978,11 +912,9 @@
/**
* @brief Disables the USART2 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableUSART2(lp) rccDisableAPB1(RCC_APB1ENR_USART2EN, lp)
+#define rccDisableUSART2() rccDisableAPB1(RCC_APB1ENR_USART2EN)
/**
* @brief Resets the USART2 peripheral.
@@ -1003,11 +935,9 @@
/**
* @brief Disables the USART3 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableUSART3(lp) rccDisableAPB1(RCC_APB1ENR_USART3EN, lp)
+#define rccDisableUSART3() rccDisableAPB1(RCC_APB1ENR_USART3EN)
/**
* @brief Resets the USART3 peripheral.
@@ -1033,11 +963,9 @@
/**
* @brief Disables the USB peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableUSB(lp) rccDisableAPB1(RCC_APB1ENR_USBEN, lp)
+#define rccDisableUSB() rccDisableAPB1(RCC_APB1ENR_USBEN)
/**
* @brief Resets the USB peripheral.
@@ -1058,6 +986,6 @@ extern "C" {
}
#endif
-#endif /* _STM32_RCC_ */
+#endif /* STM32_RCC_H */
/** @} */