diff options
Diffstat (limited to 'os/hal/ports/STM32/LLD')
34 files changed, 388 insertions, 270 deletions
diff --git a/os/hal/ports/STM32/LLD/ADCv1/hal_adc_lld.c b/os/hal/ports/STM32/LLD/ADCv1/hal_adc_lld.c index 9968adabd..a7a6c63ee 100644 --- a/os/hal/ports/STM32/LLD/ADCv1/hal_adc_lld.c +++ b/os/hal/ports/STM32/LLD/ADCv1/hal_adc_lld.c @@ -153,7 +153,7 @@ void adc_lld_init(void) { #endif
/* Calibration procedure.*/
- rccEnableADC1(FALSE);
+ rccEnableADC1(false);
/* CCR setup.*/
#if STM32_ADC_SUPPORTS_PRESCALER
@@ -167,7 +167,7 @@ void adc_lld_init(void) { osalDbgAssert(ADC1->CR != 0, "invalid register state");
while (ADC1->CR & ADC_CR_ADCAL)
;
- rccDisableADC1(FALSE);
+ rccDisableADC1();
}
/**
@@ -190,7 +190,7 @@ void adc_lld_start(ADCDriver *adcp) { (void *)adcp);
osalDbgAssert(!b, "stream already allocated");
dmaStreamSetPeripheral(adcp->dmastp, &ADC1->DR);
- rccEnableADC1(FALSE);
+ rccEnableADC1(false);
/* Clock settings.*/
adcp->adc->CFGR2 = STM32_ADC_ADC1_CKMODE;
@@ -236,7 +236,7 @@ void adc_lld_stop(ADCDriver *adcp) { #if STM32_ADC_USE_ADC1
if (&ADCD1 == adcp)
- rccDisableADC1(FALSE);
+ rccDisableADC1();
#endif
}
}
diff --git a/os/hal/ports/STM32/LLD/ADCv2/hal_adc_lld.c b/os/hal/ports/STM32/LLD/ADCv2/hal_adc_lld.c index b2e651eb2..7c4695522 100644 --- a/os/hal/ports/STM32/LLD/ADCv2/hal_adc_lld.c +++ b/os/hal/ports/STM32/LLD/ADCv2/hal_adc_lld.c @@ -243,7 +243,7 @@ void adc_lld_start(ADCDriver *adcp) { (void *)adcp);
osalDbgAssert(!b, "stream already allocated");
dmaStreamSetPeripheral(adcp->dmastp, &ADC1->DR);
- rccEnableADC1(FALSE);
+ rccEnableADC1(false);
}
#endif /* STM32_ADC_USE_ADC1 */
@@ -256,7 +256,7 @@ void adc_lld_start(ADCDriver *adcp) { (void *)adcp);
osalDbgAssert(!b, "stream already allocated");
dmaStreamSetPeripheral(adcp->dmastp, &ADC2->DR);
- rccEnableADC2(FALSE);
+ rccEnableADC2(false);
}
#endif /* STM32_ADC_USE_ADC2 */
@@ -269,7 +269,7 @@ void adc_lld_start(ADCDriver *adcp) { (void *)adcp);
osalDbgAssert(!b, "stream already allocated");
dmaStreamSetPeripheral(adcp->dmastp, &ADC3->DR);
- rccEnableADC3(FALSE);
+ rccEnableADC3(false);
}
#endif /* STM32_ADC_USE_ADC3 */
@@ -303,17 +303,17 @@ void adc_lld_stop(ADCDriver *adcp) { #if STM32_ADC_USE_ADC1
if (&ADCD1 == adcp)
- rccDisableADC1(FALSE);
+ rccDisableADC1();
#endif
#if STM32_ADC_USE_ADC2
if (&ADCD2 == adcp)
- rccDisableADC2(FALSE);
+ rccDisableADC2();
#endif
#if STM32_ADC_USE_ADC3
if (&ADCD3 == adcp)
- rccDisableADC3(FALSE);
+ rccDisableADC3();
#endif
}
}
diff --git a/os/hal/ports/STM32/LLD/ADCv3/hal_adc_lld.c b/os/hal/ports/STM32/LLD/ADCv3/hal_adc_lld.c index 4ffae09a2..f6a2748b3 100644 --- a/os/hal/ports/STM32/LLD/ADCv3/hal_adc_lld.c +++ b/os/hal/ports/STM32/LLD/ADCv3/hal_adc_lld.c @@ -535,29 +535,29 @@ void adc_lld_init(void) { #if defined(STM32F3XX)
#if STM32_HAS_ADC1 && STM32_HAS_ADC2
#if STM32_ADC_USE_ADC1 || STM32_ADC_USE_ADC2
- rccEnableADC12(FALSE);
+ rccEnableADC12(false);
rccResetADC12();
ADC1_2_COMMON->CCR = STM32_ADC_ADC12_CLOCK_MODE | ADC_DMA_MDMA;
- rccDisableADC12(FALSE);
+ rccDisableADC12();
#endif
#else
#if STM32_ADC_USE_ADC1
- rccEnableADC12(FALSE);
+ rccEnableADC12(false);
rccResetADC12();
ADC1_COMMON->CCR = STM32_ADC_ADC12_CLOCK_MODE | ADC_DMA_MDMA;
- rccDisableADC12(FALSE);
+ rccDisableADC12();
#endif
#endif
#if STM32_ADC_USE_ADC3 || STM32_ADC_USE_ADC4
- rccEnableADC34(FALSE);
+ rccEnableADC34(false);
rccResetADC34();
ADC3_4_COMMON->CCR = STM32_ADC_ADC34_CLOCK_MODE | ADC_DMA_MDMA;
- rccDisableADC34(FALSE);
+ rccDisableADC34();
#endif
#endif
#if defined(STM32L4XX)
- rccEnableADC123(FALSE);
+ rccEnableADC123(false);
rccResetADC123();
#if defined(ADC1_2_COMMON)
@@ -568,7 +568,7 @@ void adc_lld_init(void) { ADC1_COMMON->CCR = STM32_ADC_ADC123_CLOCK_MODE | ADC_DMA_MDMA;
#endif
- rccDisableADC123(FALSE);
+ rccDisableADC123();
#endif
}
@@ -599,10 +599,10 @@ void adc_lld_start(ADCDriver *adcp) { clkmask |= (1 << 0);
#if defined(STM32F3XX)
- rccEnableADC12(FALSE);
+ rccEnableADC12(false);
#endif
#if defined(STM32L4XX)
- rccEnableADC123(FALSE);
+ rccEnableADC123(false);
#endif
}
#endif /* STM32_ADC_USE_ADC1 */
@@ -618,10 +618,10 @@ void adc_lld_start(ADCDriver *adcp) { clkmask |= (1 << 1);
#if defined(STM32F3XX)
- rccEnableADC12(FALSE);
+ rccEnableADC12(false);
#endif
#if defined(STM32L4XX)
- rccEnableADC123(FALSE);
+ rccEnableADC123(false);
#endif
}
#endif /* STM32_ADC_USE_ADC2 */
@@ -637,10 +637,10 @@ void adc_lld_start(ADCDriver *adcp) { clkmask |= (1 << 2);
#if defined(STM32F3XX)
- rccEnableADC34(FALSE);
+ rccEnableADC34(false);
#endif
#if defined(STM32L4XX)
- rccEnableADC123(FALSE);
+ rccEnableADC123(false);
#endif
}
#endif /* STM32_ADC_USE_ADC3 */
@@ -656,10 +656,10 @@ void adc_lld_start(ADCDriver *adcp) { clkmask |= (1 << 3);
#if defined(STM32F3XX)
- rccEnableADC34(FALSE);
+ rccEnableADC34(false);
#endif
#if defined(STM32L4XX)
- rccEnableADC123(FALSE);
+ rccEnableADC123(false);
#endif
}
#endif /* STM32_ADC_USE_ADC4 */
@@ -758,20 +758,20 @@ void adc_lld_stop(ADCDriver *adcp) { #if defined(STM32F3XX)
#if STM32_HAS_ADC1 || STM32_HAS_ADC2
if ((clkmask & 0x3) == 0) {
- rccDisableADC12(FALSE);
+ rccDisableADC12();
}
#endif
#if STM32_HAS_ADC3 || STM32_HAS_ADC4
if ((clkmask & 0xC) == 0) {
- rccDisableADC34(FALSE);
+ rccDisableADC34();
}
#endif
#endif
#if defined(STM32L4XX)
if ((clkmask & 0x7) == 0) {
- rccDisableADC123(FALSE);
+ rccDisableADC123();
}
#endif
}
diff --git a/os/hal/ports/STM32/LLD/CANv1/hal_can_lld.c b/os/hal/ports/STM32/LLD/CANv1/hal_can_lld.c index 064e4d3b0..31c1bf480 100644 --- a/os/hal/ports/STM32/LLD/CANv1/hal_can_lld.c +++ b/os/hal/ports/STM32/LLD/CANv1/hal_can_lld.c @@ -92,7 +92,7 @@ static void can_lld_set_filters(CANDriver* canp, /* Temporarily enabling CAN clock.*/
#if STM32_CAN_USE_CAN1
if(canp == &CAND1) {
- rccEnableCAN1(FALSE);
+ rccEnableCAN1(false);
/* Filters initialization.*/
canp->can->FMR = (canp->can->FMR & 0xFFFF0000) | CAN_FMR_FINIT;
canp->can->FMR = (canp->can->FMR & 0xFFFF0000) | (can2sb << 8) | CAN_FMR_FINIT;
@@ -101,7 +101,7 @@ static void can_lld_set_filters(CANDriver* canp, #if STM32_CAN_USE_CAN3
if(canp == &CAND3) {
- rccEnableCAN3(FALSE);
+ rccEnableCAN3(false);
/* Filters initialization.*/
canp->can->FMR = (canp->can->FMR & 0xFFFF0000) | CAN_FMR_FINIT;
}
@@ -177,12 +177,12 @@ static void can_lld_set_filters(CANDriver* canp, /* Temporarily enabling CAN clock.*/
#if STM32_CAN_USE_CAN1
if(canp == &CAND1) {
- rccDisableCAN1(FALSE);
+ rccDisableCAN1();
}
#endif
#if STM32_CAN_USE_CAN3
if(canp == &CAND3) {
- rccDisableCAN3(FALSE);
+ rccDisableCAN3();
}
#endif
}
@@ -682,7 +682,7 @@ void can_lld_start(CANDriver *canp) { /* Clock activation.*/
#if STM32_CAN_USE_CAN1
if (&CAND1 == canp) {
- rccEnableCAN1(FALSE);
+ rccEnableCAN1(false);
}
#endif
@@ -691,13 +691,13 @@ void can_lld_start(CANDriver *canp) { osalDbgAssert(CAND1.state != CAN_STOP, "CAN1 must be started");
- rccEnableCAN2(FALSE);
+ rccEnableCAN2(false);
}
#endif
#if STM32_CAN_USE_CAN3
if (&CAND3 == canp) {
- rccEnableCAN3(FALSE);
+ rccEnableCAN3(false);
}
#endif
@@ -742,7 +742,7 @@ void can_lld_stop(CANDriver *canp) { CAN1->MCR = 0x00010002; /* Register reset value. */
CAN1->IER = 0x00000000; /* All sources disabled. */
- rccDisableCAN1(FALSE);
+ rccDisableCAN1();
}
#endif
@@ -750,7 +750,7 @@ void can_lld_stop(CANDriver *canp) { if (&CAND2 == canp) {
CAN2->MCR = 0x00010002; /* Register reset value. */
CAN2->IER = 0x00000000; /* All sources disabled. */
- rccDisableCAN2(FALSE);
+ rccDisableCAN2();
}
#endif
@@ -758,7 +758,7 @@ void can_lld_stop(CANDriver *canp) { if (&CAND3 == canp) {
CAN3->MCR = 0x00010002; /* Register reset value. */
CAN3->IER = 0x00000000; /* All sources disabled. */
- rccDisableCAN3(FALSE);
+ rccDisableCAN3();
}
#endif
}
@@ -771,8 +771,8 @@ void can_lld_stop(CANDriver *canp) { * @param[in] mailbox mailbox number, @p CAN_ANY_MAILBOX for any mailbox
*
* @return The queue space availability.
- * @retval FALSE no space in the transmit queue.
- * @retval TRUE transmit slot available.
+ * @retval false no space in the transmit queue.
+ * @retval true transmit slot available.
*
* @notapi
*/
@@ -788,7 +788,7 @@ bool can_lld_is_tx_empty(CANDriver *canp, canmbx_t mailbox) { case 3:
return (canp->can->TSR & CAN_TSR_TME2) != 0;
default:
- return FALSE;
+ return false;
}
}
@@ -844,8 +844,8 @@ void can_lld_transmit(CANDriver *canp, * @param[in] mailbox mailbox number, @p CAN_ANY_MAILBOX for any mailbox
*
* @return The queue space availability.
- * @retval FALSE no space in the transmit queue.
- * @retval TRUE transmit slot available.
+ * @retval false no space in the transmit queue.
+ * @retval true transmit slot available.
*
* @notapi
*/
@@ -860,7 +860,7 @@ bool can_lld_is_rx_nonempty(CANDriver *canp, canmbx_t mailbox) { case 2:
return (canp->can->RF1R & CAN_RF1R_FMP1) != 0;
default:
- return FALSE;
+ return false;
}
}
diff --git a/os/hal/ports/STM32/LLD/DACv1/hal_dac_lld.c b/os/hal/ports/STM32/LLD/DACv1/hal_dac_lld.c index ec6111fd6..de2f6104b 100644 --- a/os/hal/ports/STM32/LLD/DACv1/hal_dac_lld.c +++ b/os/hal/ports/STM32/LLD/DACv1/hal_dac_lld.c @@ -288,7 +288,7 @@ void dac_lld_stop(DACDriver *dacp) { #if STM32_DAC_USE_DAC1_CH1
if (&DACD1 == dacp) {
if ((dacp->params->dac->CR & DAC_CR_EN1) == 0U) {
- rccDisableDAC1(false);
+ rccDisableDAC1();
}
}
#endif
@@ -296,7 +296,7 @@ void dac_lld_stop(DACDriver *dacp) { #if STM32_DAC_USE_DAC1_CH2
if (&DACD2 == dacp) {
if ((dacp->params->dac->CR & DAC_CR_EN2) == 0U) {
- rccDisableDAC1(false);
+ rccDisableDAC1();
}
}
#endif
@@ -304,7 +304,7 @@ void dac_lld_stop(DACDriver *dacp) { #if STM32_DAC_USE_DAC2_CH1
if (&DACD3 == dacp) {
if ((dacp->params->dac->CR & DAC_CR_EN1) == 0U) {
- rccDisableDAC2(false);
+ rccDisableDAC2();
}
}
#endif
@@ -312,7 +312,7 @@ void dac_lld_stop(DACDriver *dacp) { #if STM32_DAC_USE_DAC2_CH2
if (&DACD4 == dacp) {
if ((dacp->params->dac->CR & DAC_CR_EN2) == 0U) {
- rccDisableDAC2(false);
+ rccDisableDAC2();
}
}
#endif
diff --git a/os/hal/ports/STM32/LLD/DMAv1/stm32_dma.c b/os/hal/ports/STM32/LLD/DMAv1/stm32_dma.c index 8fa292bf3..bd11353fc 100644 --- a/os/hal/ports/STM32/LLD/DMAv1/stm32_dma.c +++ b/os/hal/ports/STM32/LLD/DMAv1/stm32_dma.c @@ -556,11 +556,11 @@ void dmaStreamRelease(const stm32_dma_stream_t *dmastp) { /* Shutting down clocks that are no more required, if any.*/
if ((dma.streams_mask & STM32_DMA1_STREAMS_MASK) == 0U) {
- rccDisableDMA1(false);
+ rccDisableDMA1();
}
#if STM32_DMA2_NUM_CHANNELS > 0
if ((dma.streams_mask & STM32_DMA2_STREAMS_MASK) == 0U) {
- rccDisableDMA2(false);
+ rccDisableDMA2();
}
#endif
}
diff --git a/os/hal/ports/STM32/LLD/DMAv2/stm32_dma.c b/os/hal/ports/STM32/LLD/DMAv2/stm32_dma.c index 779c8b395..ac1d71964 100644 --- a/os/hal/ports/STM32/LLD/DMAv2/stm32_dma.c +++ b/os/hal/ports/STM32/LLD/DMAv2/stm32_dma.c @@ -510,10 +510,10 @@ void dmaStreamRelease(const stm32_dma_stream_t *dmastp) { /* Shutting down clocks that are no more required, if any.*/
if ((dma_streams_mask & STM32_DMA1_STREAMS_MASK) == 0U) {
- rccDisableDMA1(false);
+ rccDisableDMA1();
}
if ((dma_streams_mask & STM32_DMA2_STREAMS_MASK) == 0U) {
- rccDisableDMA2(false);
+ rccDisableDMA2();
}
}
diff --git a/os/hal/ports/STM32/LLD/GPIOv1/hal_pal_lld.c b/os/hal/ports/STM32/LLD/GPIOv1/hal_pal_lld.c index b112a9e07..3e73ad3a6 100644 --- a/os/hal/ports/STM32/LLD/GPIOv1/hal_pal_lld.c +++ b/os/hal/ports/STM32/LLD/GPIOv1/hal_pal_lld.c @@ -91,7 +91,7 @@ void _pal_lld_init(const PALConfig *config) { /*
* Enables the GPIO related clocks.
*/
- rccEnableAPB2(APB2_EN_MASK, FALSE);
+ rccEnableAPB2(APB2_EN_MASK, false);
/*
* Initial GPIO setup.
diff --git a/os/hal/ports/STM32/LLD/I2Cv1/hal_i2c_lld.c b/os/hal/ports/STM32/LLD/I2Cv1/hal_i2c_lld.c index 98046021a..6b1b05919 100644 --- a/os/hal/ports/STM32/LLD/I2Cv1/hal_i2c_lld.c +++ b/os/hal/ports/STM32/LLD/I2Cv1/hal_i2c_lld.c @@ -564,7 +564,7 @@ void i2c_lld_start(I2CDriver *i2cp) { (stm32_dmaisr_t)i2c_lld_serve_tx_end_irq,
(void *)i2cp);
osalDbgAssert(!b, "stream already allocated");
- rccEnableI2C1(FALSE);
+ rccEnableI2C1(false);
nvicEnableVector(I2C1_EV_IRQn, STM32_I2C_I2C1_IRQ_PRIORITY);
nvicEnableVector(I2C1_ER_IRQn, STM32_I2C_I2C1_IRQ_PRIORITY);
@@ -590,7 +590,7 @@ void i2c_lld_start(I2CDriver *i2cp) { (stm32_dmaisr_t)i2c_lld_serve_tx_end_irq,
(void *)i2cp);
osalDbgAssert(!b, "stream already allocated");
- rccEnableI2C2(FALSE);
+ rccEnableI2C2(false);
nvicEnableVector(I2C2_EV_IRQn, STM32_I2C_I2C2_IRQ_PRIORITY);
nvicEnableVector(I2C2_ER_IRQn, STM32_I2C_I2C2_IRQ_PRIORITY);
@@ -616,7 +616,7 @@ void i2c_lld_start(I2CDriver *i2cp) { (stm32_dmaisr_t)i2c_lld_serve_tx_end_irq,
(void *)i2cp);
osalDbgAssert(!b, "stream already allocated");
- rccEnableI2C3(FALSE);
+ rccEnableI2C3(false);
nvicEnableVector(I2C3_EV_IRQn, STM32_I2C_I2C3_IRQ_PRIORITY);
nvicEnableVector(I2C3_ER_IRQn, STM32_I2C_I2C3_IRQ_PRIORITY);
@@ -666,7 +666,7 @@ void i2c_lld_stop(I2CDriver *i2cp) { if (&I2CD1 == i2cp) {
nvicDisableVector(I2C1_EV_IRQn);
nvicDisableVector(I2C1_ER_IRQn);
- rccDisableI2C1(FALSE);
+ rccDisableI2C1();
}
#endif
@@ -674,7 +674,7 @@ void i2c_lld_stop(I2CDriver *i2cp) { if (&I2CD2 == i2cp) {
nvicDisableVector(I2C2_EV_IRQn);
nvicDisableVector(I2C2_ER_IRQn);
- rccDisableI2C2(FALSE);
+ rccDisableI2C2();
}
#endif
@@ -682,7 +682,7 @@ void i2c_lld_stop(I2CDriver *i2cp) { if (&I2CD3 == i2cp) {
nvicDisableVector(I2C3_EV_IRQn);
nvicDisableVector(I2C3_ER_IRQn);
- rccDisableI2C3(FALSE);
+ rccDisableI2C3();
}
#endif
}
diff --git a/os/hal/ports/STM32/LLD/I2Cv2/hal_i2c_lld.c b/os/hal/ports/STM32/LLD/I2Cv2/hal_i2c_lld.c index 724c5dbdb..f2f0d8043 100644 --- a/os/hal/ports/STM32/LLD/I2Cv2/hal_i2c_lld.c +++ b/os/hal/ports/STM32/LLD/I2Cv2/hal_i2c_lld.c @@ -688,7 +688,7 @@ void i2c_lld_start(I2CDriver *i2cp) { if (&I2CD1 == i2cp) {
rccResetI2C1();
- rccEnableI2C1(FALSE);
+ rccEnableI2C1(false);
#if STM32_I2C_USE_DMA == TRUE
{
bool b;
@@ -726,7 +726,7 @@ void i2c_lld_start(I2CDriver *i2cp) { if (&I2CD2 == i2cp) {
rccResetI2C2();
- rccEnableI2C2(FALSE);
+ rccEnableI2C2(false);
#if STM32_I2C_USE_DMA == TRUE
{
bool b;
@@ -764,7 +764,7 @@ void i2c_lld_start(I2CDriver *i2cp) { if (&I2CD3 == i2cp) {
rccResetI2C3();
- rccEnableI2C3(FALSE);
+ rccEnableI2C3(false);
#if STM32_I2C_USE_DMA == TRUE
{
bool b;
@@ -802,7 +802,7 @@ void i2c_lld_start(I2CDriver *i2cp) { if (&I2CD4 == i2cp) {
rccResetI2C4();
- rccEnableI2C4(FALSE);
+ rccEnableI2C4(false);
#if STM32_I2C_USE_DMA == TRUE
{
bool b;
@@ -887,7 +887,7 @@ void i2c_lld_stop(I2CDriver *i2cp) { #error "I2C1 interrupt numbers not defined"
#endif
- rccDisableI2C1(FALSE);
+ rccDisableI2C1();
}
#endif
@@ -902,7 +902,7 @@ void i2c_lld_stop(I2CDriver *i2cp) { #error "I2C2 interrupt numbers not defined"
#endif
- rccDisableI2C2(FALSE);
+ rccDisableI2C2();
}
#endif
@@ -917,7 +917,7 @@ void i2c_lld_stop(I2CDriver *i2cp) { #error "I2C3 interrupt numbers not defined"
#endif
- rccDisableI2C3(FALSE);
+ rccDisableI2C3();
}
#endif
@@ -932,7 +932,7 @@ void i2c_lld_stop(I2CDriver *i2cp) { #error "I2C4 interrupt numbers not defined"
#endif
- rccDisableI2C4(FALSE);
+ rccDisableI2C4();
}
#endif
}
diff --git a/os/hal/ports/STM32/LLD/MACv1/hal_mac_lld.c b/os/hal/ports/STM32/LLD/MACv1/hal_mac_lld.c index 84b71ce5d..d305af56e 100644 --- a/os/hal/ports/STM32/LLD/MACv1/hal_mac_lld.c +++ b/os/hal/ports/STM32/LLD/MACv1/hal_mac_lld.c @@ -295,7 +295,7 @@ void mac_lld_init(void) { #endif
/* MAC clocks stopped again.*/
- rccDisableETH(false);
+ rccDisableETH();
}
/**
@@ -396,7 +396,7 @@ void mac_lld_stop(MACDriver *macp) { ETH->DMASR = ETH->DMASR;
/* MAC clocks stopped.*/
- rccDisableETH(false);
+ rccDisableETH();
/* ISR vector disabled.*/
nvicDisableVector(STM32_ETH_NUMBER);
diff --git a/os/hal/ports/STM32/LLD/OTGv1/hal_usb_lld.c b/os/hal/ports/STM32/LLD/OTGv1/hal_usb_lld.c index 591c5f0c8..98b7fd74e 100644 --- a/os/hal/ports/STM32/LLD/OTGv1/hal_usb_lld.c +++ b/os/hal/ports/STM32/LLD/OTGv1/hal_usb_lld.c @@ -844,7 +844,7 @@ void usb_lld_start(USBDriver *usbp) { #else
/* Workaround for the problem described here:
http://forum.chibios.org/phpbb/viewtopic.php?f=16&t=1798.*/
- rccDisableOTG_HSULPI(true);
+ rccDisableOTG_HSULPI();
#endif
/* Enables IRQ vector.*/
@@ -979,16 +979,16 @@ void usb_lld_stop(USBDriver *usbp) { #if STM32_USB_USE_OTG1
if (&USBD1 == usbp) {
nvicDisableVector(STM32_OTG1_NUMBER);
- rccDisableOTG_FS(false);
+ rccDisableOTG_FS();
}
#endif
#if STM32_USB_USE_OTG2
if (&USBD2 == usbp) {
nvicDisableVector(STM32_OTG2_NUMBER);
- rccDisableOTG_HS(false);
+ rccDisableOTG_HS();
#if defined(BOARD_OTG2_USES_ULPI)
- rccDisableOTG_HSULPI(true)
+ rccDisableOTG_HSULPI()
#endif
}
#endif
diff --git a/os/hal/ports/STM32/LLD/OTGv1/hal_usb_lld_alt.c b/os/hal/ports/STM32/LLD/OTGv1/hal_usb_lld_alt.c index 77793b3aa..4fb1ff111 100644 --- a/os/hal/ports/STM32/LLD/OTGv1/hal_usb_lld_alt.c +++ b/os/hal/ports/STM32/LLD/OTGv1/hal_usb_lld_alt.c @@ -842,7 +842,7 @@ void usb_lld_start(USBDriver *usbp) { #else
/* Workaround for the problem described here:
http://forum.chibios.org/phpbb/viewtopic.php?f=16&t=1798.*/
- rccDisableOTG_HSULPI(true);
+ rccDisableOTG_HSULPI();
#endif
/* Enables IRQ vector.*/
@@ -977,16 +977,16 @@ void usb_lld_stop(USBDriver *usbp) { #if STM32_USB_USE_OTG1
if (&USBD1 == usbp) {
nvicDisableVector(STM32_OTG1_NUMBER);
- rccDisableOTG_FS(false);
+ rccDisableOTG_FS();
}
#endif
#if STM32_USB_USE_OTG2
if (&USBD2 == usbp) {
nvicDisableVector(STM32_OTG2_NUMBER);
- rccDisableOTG_HS(false);
+ rccDisableOTG_HS();
#if defined(BOARD_OTG2_USES_ULPI)
- rccDisableOTG_HSULPI(true)
+ rccDisableOTG_HSULPI()
#endif
}
#endif
diff --git a/os/hal/ports/STM32/LLD/QUADSPIv1/hal_qspi_lld.c b/os/hal/ports/STM32/LLD/QUADSPIv1/hal_qspi_lld.c index f3a889b57..529bb9b95 100644 --- a/os/hal/ports/STM32/LLD/QUADSPIv1/hal_qspi_lld.c +++ b/os/hal/ports/STM32/LLD/QUADSPIv1/hal_qspi_lld.c @@ -194,7 +194,7 @@ void qspi_lld_stop(QSPIDriver *qspip) { /* Stopping involved clocks.*/
#if STM32_QSPI_USE_QUADSPI1
if (&QSPID1 == qspip) {
- rccDisableQUADSPI1(FALSE);
+ rccDisableQUADSPI1();
}
#endif
}
diff --git a/os/hal/ports/STM32/LLD/SDIOv1/hal_sdc_lld.c b/os/hal/ports/STM32/LLD/SDIOv1/hal_sdc_lld.c index 3b6807e30..f3ef0b753 100644 --- a/os/hal/ports/STM32/LLD/SDIOv1/hal_sdc_lld.c +++ b/os/hal/ports/STM32/LLD/SDIOv1/hal_sdc_lld.c @@ -386,7 +386,7 @@ void sdc_lld_start(SDCDriver *sdcp) { dmaStreamSetFIFO(sdcp->dma, STM32_DMA_FCR_DMDIS | STM32_DMA_FCR_FTH_FULL);
#endif
nvicEnableVector(STM32_SDIO_NUMBER, STM32_SDC_SDIO_IRQ_PRIORITY);
- rccEnableSDIO(FALSE);
+ rccEnableSDIO(false);
}
/* Configuration, card clock is initially stopped.*/
@@ -416,7 +416,7 @@ void sdc_lld_stop(SDCDriver *sdcp) { /* Clock deactivation.*/
nvicDisableVector(STM32_SDIO_NUMBER);
dmaStreamRelease(sdcp->dma);
- rccDisableSDIO(FALSE);
+ rccDisableSDIO();
}
}
@@ -708,10 +708,10 @@ bool sdc_lld_read_aligned(SDCDriver *sdcp, uint32_t startblk, SDIO_DCTRL_DMAEN |
SDIO_DCTRL_DTEN;
- if (sdc_lld_prepare_read(sdcp, startblk, blocks, resp) == TRUE)
+ if (sdc_lld_prepare_read(sdcp, startblk, blocks, resp) == true)
goto error;
- if (sdc_lld_wait_transaction_end(sdcp, blocks, resp) == TRUE)
+ if (sdc_lld_wait_transaction_end(sdcp, blocks, resp) == true)
goto error;
return HAL_SUCCESS;
@@ -764,7 +764,7 @@ bool sdc_lld_write_aligned(SDCDriver *sdcp, uint32_t startblk, sdcp->sdio->DLEN = blocks * MMCSD_BLOCK_SIZE;
/* Talk to card what we want from it.*/
- if (sdc_lld_prepare_write(sdcp, startblk, blocks, resp) == TRUE)
+ if (sdc_lld_prepare_write(sdcp, startblk, blocks, resp) == true)
goto error;
/* Transaction starts just after DTEN bit setting.*/
@@ -773,7 +773,7 @@ bool sdc_lld_write_aligned(SDCDriver *sdcp, uint32_t startblk, SDIO_DCTRL_DMAEN |
SDIO_DCTRL_DTEN;
- if (sdc_lld_wait_transaction_end(sdcp, blocks, resp) == TRUE)
+ if (sdc_lld_wait_transaction_end(sdcp, blocks, resp) == true)
goto error;
return HAL_SUCCESS;
diff --git a/os/hal/ports/STM32/LLD/SDMMCv1/hal_sdc_lld.c b/os/hal/ports/STM32/LLD/SDMMCv1/hal_sdc_lld.c index 60127598a..0fe6fe032 100644 --- a/os/hal/ports/STM32/LLD/SDMMCv1/hal_sdc_lld.c +++ b/os/hal/ports/STM32/LLD/SDMMCv1/hal_sdc_lld.c @@ -450,7 +450,7 @@ void sdc_lld_start(SDCDriver *sdcp) { dmaStreamSetFIFO(sdcp->dma, STM32_DMA_FCR_DMDIS |
STM32_DMA_FCR_FTH_FULL);
#endif
- rccEnableSDMMC1(FALSE);
+ rccEnableSDMMC1(false);
}
#endif /* STM32_SDC_USE_SDMMC1 */
@@ -466,7 +466,7 @@ void sdc_lld_start(SDCDriver *sdcp) { dmaStreamSetFIFO(sdcp->dma, STM32_DMA_FCR_DMDIS |
STM32_DMA_FCR_FTH_FULL);
#endif
- rccEnableSDMMC2(FALSE);
+ rccEnableSDMMC2(false);
}
#endif /* STM32_SDC_USE_SDMMC2 */
}
@@ -501,13 +501,13 @@ void sdc_lld_stop(SDCDriver *sdcp) { /* Clock deactivation.*/
#if STM32_SDC_USE_SDMMC1
if (&SDCD1 == sdcp) {
- rccDisableSDMMC1(FALSE);
+ rccDisableSDMMC1();
}
#endif
#if STM32_SDC_USE_SDMMC2
if (&SDCD2 == sdcp) {
- rccDisableSDMMC2(FALSE);
+ rccDisableSDMMC2();
}
#endif
}
@@ -816,10 +816,10 @@ bool sdc_lld_read_aligned(SDCDriver *sdcp, uint32_t startblk, SDMMC_DCTRL_DMAEN |
SDMMC_DCTRL_DTEN;
- if (sdc_lld_prepare_read(sdcp, startblk, blocks, resp) == TRUE)
+ if (sdc_lld_prepare_read(sdcp, startblk, blocks, resp) == true)
goto error;
- if (sdc_lld_wait_transaction_end(sdcp, blocks, resp) == TRUE)
+ if (sdc_lld_wait_transaction_end(sdcp, blocks, resp) == true)
goto error;
return HAL_SUCCESS;
@@ -871,7 +871,7 @@ bool sdc_lld_write_aligned(SDCDriver *sdcp, uint32_t startblk, sdcp->sdmmc->DLEN = blocks * MMCSD_BLOCK_SIZE;
/* Talk to card what we want from it.*/
- if (sdc_lld_prepare_write(sdcp, startblk, blocks, resp) == TRUE)
+ if (sdc_lld_prepare_write(sdcp, startblk, blocks, resp) == true)
goto error;
/* Transaction starts just after DTEN bit setting.*/
@@ -880,7 +880,7 @@ bool sdc_lld_write_aligned(SDCDriver *sdcp, uint32_t startblk, SDMMC_DCTRL_DMAEN |
SDMMC_DCTRL_DTEN;
- if (sdc_lld_wait_transaction_end(sdcp, blocks, resp) == TRUE)
+ if (sdc_lld_wait_transaction_end(sdcp, blocks, resp) == true)
goto error;
return HAL_SUCCESS;
diff --git a/os/hal/ports/STM32/LLD/SPIv1/hal_i2s_lld.c b/os/hal/ports/STM32/LLD/SPIv1/hal_i2s_lld.c index c1132cfdb..9d1dd219d 100644 --- a/os/hal/ports/STM32/LLD/SPIv1/hal_i2s_lld.c +++ b/os/hal/ports/STM32/LLD/SPIv1/hal_i2s_lld.c @@ -360,7 +360,7 @@ void i2s_lld_start(I2SDriver *i2sp) { bool b;
/* Enabling I2S unit clock.*/
- rccEnableSPI1(FALSE);
+ rccEnableSPI1(false);
#if STM32_I2S_RX_ENABLED(STM32_I2S_SPI1_MODE)
b = dmaStreamAllocate(i2sp->dmarx,
@@ -394,7 +394,7 @@ void i2s_lld_start(I2SDriver *i2sp) { bool b;
/* Enabling I2S unit clock.*/
- rccEnableSPI2(FALSE);
+ rccEnableSPI2(false);
#if STM32_I2S_RX_ENABLED(STM32_I2S_SPI2_MODE)
b = dmaStreamAllocate(i2sp->dmarx,
@@ -428,7 +428,7 @@ void i2s_lld_start(I2SDriver *i2sp) { bool b;
/* Enabling I2S unit clock.*/
- rccEnableSPI3(FALSE);
+ rccEnableSPI3(false);
#if STM32_I2S_RX_ENABLED(STM32_I2S_SPI3_MODE)
b = dmaStreamAllocate(i2sp->dmarx,
@@ -484,17 +484,17 @@ void i2s_lld_stop(I2SDriver *i2sp) { #if STM32_I2S_USE_SPI1
if (&I2SD1 == i2sp)
- rccDisableSPI1(FALSE);
+ rccDisableSPI1();
#endif
#if STM32_I2S_USE_SPI2
if (&I2SD2 == i2sp)
- rccDisableSPI2(FALSE);
+ rccDisableSPI2();
#endif
#if STM32_I2S_USE_SPI3
if (&I2SD3 == i2sp)
- rccDisableSPI3(FALSE);
+ rccDisableSPI3();
#endif
}
}
diff --git a/os/hal/ports/STM32/LLD/SPIv1/hal_spi_lld.c b/os/hal/ports/STM32/LLD/SPIv1/hal_spi_lld.c index 3cae1a9e7..ed64010ec 100644 --- a/os/hal/ports/STM32/LLD/SPIv1/hal_spi_lld.c +++ b/os/hal/ports/STM32/LLD/SPIv1/hal_spi_lld.c @@ -140,13 +140,25 @@ static void spi_lld_serve_rx_interrupt(SPIDriver *spip, uint32_t flags) { (void)flags;
#endif
- /* Stop everything.*/
- dmaStreamDisable(spip->dmatx);
- dmaStreamDisable(spip->dmarx);
+ if (spip->config->circular) {
+ if ((flags & STM32_DMA_ISR_HTIF) != 0U) {
+ /* Half buffer interrupt.*/
+ _spi_isr_code_half1(spip);
+ }
+ else {
+ /* End buffer interrupt.*/
+ _spi_isr_code_half2(spip);
+ }
+ }
+ else {
+ /* Stopping DMAs.*/
+ dmaStreamDisable(spip->dmatx);
+ dmaStreamDisable(spip->dmarx);
- /* Portable SPI ISR code defined in the high level driver, note, it is
- a macro.*/
- _spi_isr_code(spip);
+ /* Portable SPI ISR code defined in the high level driver, note, it is
+ a macro.*/
+ _spi_isr_code(spip);
+ }
}
/**
@@ -317,7 +329,7 @@ void spi_lld_start(SPIDriver *spip) { (stm32_dmaisr_t)spi_lld_serve_tx_interrupt,
(void *)spip);
osalDbgAssert(!b, "stream already allocated");
- rccEnableSPI1(FALSE);
+ rccEnableSPI1(false);
}
#endif
#if STM32_SPI_USE_SPI2
@@ -333,7 +345,7 @@ void spi_lld_start(SPIDriver *spip) { (stm32_dmaisr_t)spi_lld_serve_tx_interrupt,
(void *)spip);
osalDbgAssert(!b, "stream already allocated");
- rccEnableSPI2(FALSE);
+ rccEnableSPI2(false);
}
#endif
#if STM32_SPI_USE_SPI3
@@ -349,7 +361,7 @@ void spi_lld_start(SPIDriver *spip) { (stm32_dmaisr_t)spi_lld_serve_tx_interrupt,
(void *)spip);
osalDbgAssert(!b, "stream already allocated");
- rccEnableSPI3(FALSE);
+ rccEnableSPI3(false);
}
#endif
#if STM32_SPI_USE_SPI4
@@ -365,7 +377,7 @@ void spi_lld_start(SPIDriver *spip) { (stm32_dmaisr_t)spi_lld_serve_tx_interrupt,
(void *)spip);
osalDbgAssert(!b, "stream already allocated");
- rccEnableSPI4(FALSE);
+ rccEnableSPI4(false);
}
#endif
#if STM32_SPI_USE_SPI5
@@ -381,7 +393,7 @@ void spi_lld_start(SPIDriver *spip) { (stm32_dmaisr_t)spi_lld_serve_tx_interrupt,
(void *)spip);
osalDbgAssert(!b, "stream already allocated");
- rccEnableSPI5(FALSE);
+ rccEnableSPI5(false);
}
#endif
#if STM32_SPI_USE_SPI6
@@ -397,7 +409,7 @@ void spi_lld_start(SPIDriver *spip) { (stm32_dmaisr_t)spi_lld_serve_tx_interrupt,
(void *)spip);
osalDbgAssert(!b, "stream already allocated");
- rccEnableSPI6(FALSE);
+ rccEnableSPI6(false);
}
#endif
@@ -421,6 +433,16 @@ void spi_lld_start(SPIDriver *spip) { spip->txdmamode = (spip->txdmamode & ~STM32_DMA_CR_SIZE_MASK) |
STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MSIZE_HWORD;
}
+
+ if (spip->config->circular) {
+ spip->rxdmamode |= (STM32_DMA_CR_CIRC | STM32_DMA_CR_HTIE);
+ spip->txdmamode |= (STM32_DMA_CR_CIRC | STM32_DMA_CR_HTIE);
+ }
+ else {
+ spip->rxdmamode &= ~(STM32_DMA_CR_CIRC | STM32_DMA_CR_HTIE);
+ spip->txdmamode &= ~(STM32_DMA_CR_CIRC | STM32_DMA_CR_HTIE);
+ }
+
/* SPI setup and enable.*/
spip->spi->CR1 &= ~SPI_CR1_SPE;
spip->spi->CR1 = spip->config->cr1 | SPI_CR1_MSTR | SPI_CR1_SSM |
@@ -451,27 +473,27 @@ void spi_lld_stop(SPIDriver *spip) { #if STM32_SPI_USE_SPI1
if (&SPID1 == spip)
- rccDisableSPI1(FALSE);
+ rccDisableSPI1();
#endif
#if STM32_SPI_USE_SPI2
if (&SPID2 == spip)
- rccDisableSPI2(FALSE);
+ rccDisableSPI2();
#endif
#if STM32_SPI_USE_SPI3
if (&SPID3 == spip)
- rccDisableSPI3(FALSE);
+ rccDisableSPI3();
#endif
#if STM32_SPI_USE_SPI4
if (&SPID4 == spip)
- rccDisableSPI4(FALSE);
+ rccDisableSPI4();
#endif
#if STM32_SPI_USE_SPI5
if (&SPID5 == spip)
- rccDisableSPI5(FALSE);
+ rccDisableSPI5();
#endif
#if STM32_SPI_USE_SPI6
if (&SPID6 == spip)
- rccDisableSPI6(FALSE);
+ rccDisableSPI6();
#endif
}
}
@@ -620,6 +642,22 @@ void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf) { dmaStreamEnable(spip->dmatx);
}
+#if (SPI_SUPPORTS_CIRCULAR == TRUE) || defined(__DOXYGEN__)
+/**
+ * @brief Aborts the ongoing SPI operation, if any.
+ *
+ * @param[in] spip pointer to the @p SPIDriver object
+ *
+ * @notapi
+ */
+void spi_lld_abort(SPIDriver *spip) {
+
+ /* Stopping DMAs.*/
+ dmaStreamDisable(spip->dmatx);
+ dmaStreamDisable(spip->dmarx);
+}
+#endif /* SPI_SUPPORTS_CIRCULAR == TRUE */
+
/**
* @brief Exchanges one frame using a polled wait.
* @details This synchronous function exchanges one frame using a polled
diff --git a/os/hal/ports/STM32/LLD/SPIv1/hal_spi_lld.h b/os/hal/ports/STM32/LLD/SPIv1/hal_spi_lld.h index c237bca4b..421484355 100644 --- a/os/hal/ports/STM32/LLD/SPIv1/hal_spi_lld.h +++ b/os/hal/ports/STM32/LLD/SPIv1/hal_spi_lld.h @@ -31,6 +31,11 @@ /* Driver constants. */
/*===========================================================================*/
+/**
+ * @brief Circular mode support flag.
+ */
+#define SPI_SUPPORTS_CIRCULAR TRUE
+
/*===========================================================================*/
/* Driver pre-compile time settings. */
/*===========================================================================*/
@@ -421,6 +426,12 @@ typedef void (*spicallback_t)(SPIDriver *spip); * @brief Driver configuration structure.
*/
typedef struct {
+#if (SPI_SUPPORTS_CIRCULAR == TRUE) || defined(__DOXYGEN__)
+ /**
+ * @brief Enables the circular buffer mode.
+ */
+ bool circular;
+#endif
/**
* @brief Operation complete callback or @p NULL.
*/
@@ -559,6 +570,9 @@ extern "C" { const void *txbuf, void *rxbuf);
void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf);
void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf);
+#if (SPI_SUPPORTS_CIRCULAR == TRUE) || defined(__DOXYGEN__)
+ void spi_lld_abort(SPIDriver *spip);
+#endif
uint16_t spi_lld_polled_exchange(SPIDriver *spip, uint16_t frame);
#ifdef __cplusplus
}
diff --git a/os/hal/ports/STM32/LLD/SPIv2/hal_i2s_lld.c b/os/hal/ports/STM32/LLD/SPIv2/hal_i2s_lld.c index 33fe22ca5..54f6dd984 100644 --- a/os/hal/ports/STM32/LLD/SPIv2/hal_i2s_lld.c +++ b/os/hal/ports/STM32/LLD/SPIv2/hal_i2s_lld.c @@ -360,7 +360,7 @@ void i2s_lld_start(I2SDriver *i2sp) { bool b;
/* Enabling I2S unit clock.*/
- rccEnableSPI1(FALSE);
+ rccEnableSPI1(false);
#if STM32_I2S_RX_ENABLED(STM32_I2S_SPI1_MODE)
b = dmaStreamAllocate(i2sp->dmarx,
@@ -394,7 +394,7 @@ void i2s_lld_start(I2SDriver *i2sp) { bool b;
/* Enabling I2S unit clock.*/
- rccEnableSPI2(FALSE);
+ rccEnableSPI2(false);
#if STM32_I2S_RX_ENABLED(STM32_I2S_SPI2_MODE)
b = dmaStreamAllocate(i2sp->dmarx,
@@ -428,7 +428,7 @@ void i2s_lld_start(I2SDriver *i2sp) { bool b;
/* Enabling I2S unit clock.*/
- rccEnableSPI3(FALSE);
+ rccEnableSPI3(false);
#if STM32_I2S_RX_ENABLED(STM32_I2S_SPI3_MODE)
b = dmaStreamAllocate(i2sp->dmarx,
@@ -484,17 +484,17 @@ void i2s_lld_stop(I2SDriver *i2sp) { #if STM32_I2S_USE_SPI1
if (&I2SD1 == i2sp)
- rccDisableSPI1(FALSE);
+ rccDisableSPI1();
#endif
#if STM32_I2S_USE_SPI2
if (&I2SD2 == i2sp)
- rccDisableSPI2(FALSE);
+ rccDisableSPI2();
#endif
#if STM32_I2S_USE_SPI3
if (&I2SD3 == i2sp)
- rccDisableSPI3(FALSE);
+ rccDisableSPI3();
#endif
}
}
diff --git a/os/hal/ports/STM32/LLD/SPIv2/hal_spi_lld.c b/os/hal/ports/STM32/LLD/SPIv2/hal_spi_lld.c index 6adc0b920..3d91bac46 100644 --- a/os/hal/ports/STM32/LLD/SPIv2/hal_spi_lld.c +++ b/os/hal/ports/STM32/LLD/SPIv2/hal_spi_lld.c @@ -140,13 +140,25 @@ static void spi_lld_serve_rx_interrupt(SPIDriver *spip, uint32_t flags) { (void)flags;
#endif
- /* Stop everything.*/
- dmaStreamDisable(spip->dmatx);
- dmaStreamDisable(spip->dmarx);
+ if (spip->config->circular) {
+ if ((flags & STM32_DMA_ISR_HTIF) != 0U) {
+ /* Half buffer interrupt.*/
+ _spi_isr_code_half1(spip);
+ }
+ else {
+ /* End buffer interrupt.*/
+ _spi_isr_code_half2(spip);
+ }
+ }
+ else {
+ /* Stopping DMAs.*/
+ dmaStreamDisable(spip->dmatx);
+ dmaStreamDisable(spip->dmarx);
- /* Portable SPI ISR code defined in the high level driver, note, it is
- a macro.*/
- _spi_isr_code(spip);
+ /* Portable SPI ISR code defined in the high level driver, note, it is
+ a macro.*/
+ _spi_isr_code(spip);
+ }
}
/**
@@ -318,7 +330,7 @@ void spi_lld_start(SPIDriver *spip) { (stm32_dmaisr_t)spi_lld_serve_tx_interrupt,
(void *)spip);
osalDbgAssert(!b, "stream already allocated");
- rccEnableSPI1(FALSE);
+ rccEnableSPI1(false);
}
#endif
#if STM32_SPI_USE_SPI2
@@ -334,7 +346,7 @@ void spi_lld_start(SPIDriver *spip) { (stm32_dmaisr_t)spi_lld_serve_tx_interrupt,
(void *)spip);
osalDbgAssert(!b, "stream already allocated");
- rccEnableSPI2(FALSE);
+ rccEnableSPI2(false);
}
#endif
#if STM32_SPI_USE_SPI3
@@ -350,7 +362,7 @@ void spi_lld_start(SPIDriver *spip) { (stm32_dmaisr_t)spi_lld_serve_tx_interrupt,
(void *)spip);
osalDbgAssert(!b, "stream already allocated");
- rccEnableSPI3(FALSE);
+ rccEnableSPI3(false);
}
#endif
#if STM32_SPI_USE_SPI4
@@ -366,7 +378,7 @@ void spi_lld_start(SPIDriver *spip) { (stm32_dmaisr_t)spi_lld_serve_tx_interrupt,
(void *)spip);
osalDbgAssert(!b, "stream already allocated");
- rccEnableSPI4(FALSE);
+ rccEnableSPI4(false);
}
#endif
#if STM32_SPI_USE_SPI5
@@ -382,7 +394,7 @@ void spi_lld_start(SPIDriver *spip) { (stm32_dmaisr_t)spi_lld_serve_tx_interrupt,
(void *)spip);
osalDbgAssert(!b, "stream already allocated");
- rccEnableSPI5(FALSE);
+ rccEnableSPI5(false);
}
#endif
#if STM32_SPI_USE_SPI6
@@ -398,7 +410,7 @@ void spi_lld_start(SPIDriver *spip) { (stm32_dmaisr_t)spi_lld_serve_tx_interrupt,
(void *)spip);
osalDbgAssert(!b, "stream already allocated");
- rccEnableSPI6(FALSE);
+ rccEnableSPI6(false);
}
#endif
@@ -424,6 +436,15 @@ void spi_lld_start(SPIDriver *spip) { STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MSIZE_HWORD;
}
+ if (spip->config->circular) {
+ spip->rxdmamode |= (STM32_DMA_CR_CIRC | STM32_DMA_CR_HTIE);
+ spip->txdmamode |= (STM32_DMA_CR_CIRC | STM32_DMA_CR_HTIE);
+ }
+ else {
+ spip->rxdmamode &= ~(STM32_DMA_CR_CIRC | STM32_DMA_CR_HTIE);
+ spip->txdmamode &= ~(STM32_DMA_CR_CIRC | STM32_DMA_CR_HTIE);
+ }
+
/* SPI setup and enable.*/
spip->spi->CR1 &= ~SPI_CR1_SPE;
spip->spi->CR1 = spip->config->cr1 | SPI_CR1_MSTR;
@@ -453,27 +474,27 @@ void spi_lld_stop(SPIDriver *spip) { #if STM32_SPI_USE_SPI1
if (&SPID1 == spip)
- rccDisableSPI1(FALSE);
+ rccDisableSPI1();
#endif
#if STM32_SPI_USE_SPI2
if (&SPID2 == spip)
- rccDisableSPI2(FALSE);
+ rccDisableSPI2();
#endif
#if STM32_SPI_USE_SPI3
if (&SPID3 == spip)
- rccDisableSPI3(FALSE);
+ rccDisableSPI3();
#endif
#if STM32_SPI_USE_SPI4
if (&SPID4 == spip)
- rccDisableSPI4(FALSE);
+ rccDisableSPI4();
#endif
#if STM32_SPI_USE_SPI5
if (&SPID5 == spip)
- rccDisableSPI5(FALSE);
+ rccDisableSPI5();
#endif
#if STM32_SPI_USE_SPI6
if (&SPID6 == spip)
- rccDisableSPI6(FALSE);
+ rccDisableSPI6();
#endif
}
}
@@ -622,6 +643,22 @@ void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf) { dmaStreamEnable(spip->dmatx);
}
+#if (SPI_SUPPORTS_CIRCULAR == TRUE) || defined(__DOXYGEN__)
+/**
+ * @brief Aborts the ongoing SPI operation, if any.
+ *
+ * @param[in] spip pointer to the @p SPIDriver object
+ *
+ * @notapi
+ */
+void spi_lld_abort(SPIDriver *spip) {
+
+ /* Stopping DMAs.*/
+ dmaStreamDisable(spip->dmatx);
+ dmaStreamDisable(spip->dmarx);
+}
+#endif /* SPI_SUPPORTS_CIRCULAR == TRUE */
+
/**
* @brief Exchanges one frame using a polled wait.
* @details This synchronous function exchanges one frame using a polled
diff --git a/os/hal/ports/STM32/LLD/SPIv2/hal_spi_lld.h b/os/hal/ports/STM32/LLD/SPIv2/hal_spi_lld.h index 1c7a5f4b4..de194f521 100644 --- a/os/hal/ports/STM32/LLD/SPIv2/hal_spi_lld.h +++ b/os/hal/ports/STM32/LLD/SPIv2/hal_spi_lld.h @@ -31,6 +31,11 @@ /* Driver constants. */
/*===========================================================================*/
+/**
+ * @brief Circular mode support flag.
+ */
+#define SPI_SUPPORTS_CIRCULAR TRUE
+
/*===========================================================================*/
/* Driver pre-compile time settings. */
/*===========================================================================*/
@@ -421,6 +426,12 @@ typedef void (*spicallback_t)(SPIDriver *spip); * @brief Driver configuration structure.
*/
typedef struct {
+#if (SPI_SUPPORTS_CIRCULAR == TRUE) || defined(__DOXYGEN__)
+ /**
+ * @brief Enables the circular buffer mode.
+ */
+ bool circular;
+#endif
/**
* @brief Operation complete callback or @p NULL.
*/
@@ -550,11 +561,18 @@ extern "C" { void spi_lld_init(void);
void spi_lld_start(SPIDriver *spip);
void spi_lld_stop(SPIDriver *spip);
+#if (SPI_SELECT_MODE == SPI_SELECT_MODE_LLD) || defined(__DOXYGEN__)
+ void spi_lld_select(SPIDriver *spip);
+ void spi_lld_unselect(SPIDriver *spip);
+#endif
void spi_lld_ignore(SPIDriver *spip, size_t n);
void spi_lld_exchange(SPIDriver *spip, size_t n,
const void *txbuf, void *rxbuf);
void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf);
void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf);
+#if (SPI_SUPPORTS_CIRCULAR == TRUE) || defined(__DOXYGEN__)
+ void spi_lld_abort(SPIDriver *spip);
+#endif
uint16_t spi_lld_polled_exchange(SPIDriver *spip, uint16_t frame);
#ifdef __cplusplus
}
diff --git a/os/hal/ports/STM32/LLD/SPIv3/hal_i2s_lld.c b/os/hal/ports/STM32/LLD/SPIv3/hal_i2s_lld.c index 33fe22ca5..54f6dd984 100644 --- a/os/hal/ports/STM32/LLD/SPIv3/hal_i2s_lld.c +++ b/os/hal/ports/STM32/LLD/SPIv3/hal_i2s_lld.c @@ -360,7 +360,7 @@ void i2s_lld_start(I2SDriver *i2sp) { bool b;
/* Enabling I2S unit clock.*/
- rccEnableSPI1(FALSE);
+ rccEnableSPI1(false);
#if STM32_I2S_RX_ENABLED(STM32_I2S_SPI1_MODE)
b = dmaStreamAllocate(i2sp->dmarx,
@@ -394,7 +394,7 @@ void i2s_lld_start(I2SDriver *i2sp) { bool b;
/* Enabling I2S unit clock.*/
- rccEnableSPI2(FALSE);
+ rccEnableSPI2(false);
#if STM32_I2S_RX_ENABLED(STM32_I2S_SPI2_MODE)
b = dmaStreamAllocate(i2sp->dmarx,
@@ -428,7 +428,7 @@ void i2s_lld_start(I2SDriver *i2sp) { bool b;
/* Enabling I2S unit clock.*/
- rccEnableSPI3(FALSE);
+ rccEnableSPI3(false);
#if STM32_I2S_RX_ENABLED(STM32_I2S_SPI3_MODE)
b = dmaStreamAllocate(i2sp->dmarx,
@@ -484,17 +484,17 @@ void i2s_lld_stop(I2SDriver *i2sp) { #if STM32_I2S_USE_SPI1
if (&I2SD1 == i2sp)
- rccDisableSPI1(FALSE);
+ rccDisableSPI1();
#endif
#if STM32_I2S_USE_SPI2
if (&I2SD2 == i2sp)
- rccDisableSPI2(FALSE);
+ rccDisableSPI2();
#endif
#if STM32_I2S_USE_SPI3
if (&I2SD3 == i2sp)
- rccDisableSPI3(FALSE);
+ rccDisableSPI3();
#endif
}
}
diff --git a/os/hal/ports/STM32/LLD/SPIv3/hal_spi_lld.c b/os/hal/ports/STM32/LLD/SPIv3/hal_spi_lld.c index 175a22cf3..df4c5685c 100644 --- a/os/hal/ports/STM32/LLD/SPIv3/hal_spi_lld.c +++ b/os/hal/ports/STM32/LLD/SPIv3/hal_spi_lld.c @@ -1031,12 +1031,14 @@ void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf) { spip->spi->CR1 |= SPI_CR1_CSTART;
}
+
+#if (SPI_SUPPORTS_CIRCULAR == TRUE) || defined(__DOXYGEN__)
/**
* @brief Aborts the ongoing SPI operation, if any.
*
* @param[in] spip pointer to the @p SPIDriver object
*
- * @api
+ * @notapi
*/
void spi_lld_abort(SPIDriver *spip) {
@@ -1063,6 +1065,7 @@ void spi_lld_abort(SPIDriver *spip) { }
#endif
}
+#endif /* SPI_SUPPORTS_CIRCULAR == TRUE */
/**
* @brief Exchanges one frame using a polled wait.
@@ -1075,6 +1078,8 @@ void spi_lld_abort(SPIDriver *spip) { * @param[in] spip pointer to the @p SPIDriver object
* @param[in] frame the data frame to send over the SPI bus
* @return The received data frame from the SPI bus.
+ *
+ * @notapi
*/
uint32_t spi_lld_polled_exchange(SPIDriver *spip, uint32_t frame) {
uint32_t dsize = (spip->spi->CFG1 & SPI_CFG1_DSIZE_Msk) + 1U;
diff --git a/os/hal/ports/STM32/LLD/SPIv3/hal_spi_lld.h b/os/hal/ports/STM32/LLD/SPIv3/hal_spi_lld.h index 742631e43..de499399e 100644 --- a/os/hal/ports/STM32/LLD/SPIv3/hal_spi_lld.h +++ b/os/hal/ports/STM32/LLD/SPIv3/hal_spi_lld.h @@ -688,12 +688,18 @@ extern "C" { void spi_lld_init(void);
void spi_lld_start(SPIDriver *spip);
void spi_lld_stop(SPIDriver *spip);
+#if (SPI_SELECT_MODE == SPI_SELECT_MODE_LLD) || defined(__DOXYGEN__)
+ void spi_lld_select(SPIDriver *spip);
+ void spi_lld_unselect(SPIDriver *spip);
+#endif
void spi_lld_ignore(SPIDriver *spip, size_t n);
void spi_lld_exchange(SPIDriver *spip, size_t n,
const void *txbuf, void *rxbuf);
void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf);
void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf);
+#if (SPI_SUPPORTS_CIRCULAR == TRUE) || defined(__DOXYGEN__)
void spi_lld_abort(SPIDriver *spip);
+#endif
uint32_t spi_lld_polled_exchange(SPIDriver *spip, uint32_t frame);
#ifdef __cplusplus
}
diff --git a/os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.c b/os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.c index 778698114..ce36ce224 100644 --- a/os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.c +++ b/os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.c @@ -492,7 +492,7 @@ void gpt_lld_start(GPTDriver *gptp) { /* Clock activation.*/
#if STM32_GPT_USE_TIM1
if (&GPTD1 == gptp) {
- rccEnableTIM1(FALSE);
+ rccEnableTIM1(false);
rccResetTIM1();
#if !defined(STM32_TIM1_SUPPRESS_ISR)
nvicEnableVector(STM32_TIM1_UP_NUMBER, STM32_GPT_TIM1_IRQ_PRIORITY);
@@ -507,7 +507,7 @@ void gpt_lld_start(GPTDriver *gptp) { #if STM32_GPT_USE_TIM2
if (&GPTD2 == gptp) {
- rccEnableTIM2(FALSE);
+ rccEnableTIM2(false);
rccResetTIM2();
#if !defined(STM32_TIM2_SUPPRESS_ISR)
nvicEnableVector(STM32_TIM2_NUMBER, STM32_GPT_TIM2_IRQ_PRIORITY);
@@ -522,7 +522,7 @@ void gpt_lld_start(GPTDriver *gptp) { #if STM32_GPT_USE_TIM3
if (&GPTD3 == gptp) {
- rccEnableTIM3(FALSE);
+ rccEnableTIM3(false);
rccResetTIM3();
#if !defined(STM32_TIM3_SUPPRESS_ISR)
nvicEnableVector(STM32_TIM3_NUMBER, STM32_GPT_TIM3_IRQ_PRIORITY);
@@ -537,7 +537,7 @@ void gpt_lld_start(GPTDriver *gptp) { #if STM32_GPT_USE_TIM4
if (&GPTD4 == gptp) {
- rccEnableTIM4(FALSE);
+ rccEnableTIM4(false);
rccResetTIM4();
#if !defined(STM32_TIM4_SUPPRESS_ISR)
nvicEnableVector(STM32_TIM4_NUMBER, STM32_GPT_TIM4_IRQ_PRIORITY);
@@ -552,7 +552,7 @@ void gpt_lld_start(GPTDriver *gptp) { #if STM32_GPT_USE_TIM5
if (&GPTD5 == gptp) {
- rccEnableTIM5(FALSE);
+ rccEnableTIM5(false);
rccResetTIM5();
#if !defined(STM32_TIM5_SUPPRESS_ISR)
nvicEnableVector(STM32_TIM5_NUMBER, STM32_GPT_TIM5_IRQ_PRIORITY);
@@ -567,7 +567,7 @@ void gpt_lld_start(GPTDriver *gptp) { #if STM32_GPT_USE_TIM6
if (&GPTD6 == gptp) {
- rccEnableTIM6(FALSE);
+ rccEnableTIM6(false);
rccResetTIM6();
#if !defined(STM32_TIM6_SUPPRESS_ISR)
nvicEnableVector(STM32_TIM6_NUMBER, STM32_GPT_TIM6_IRQ_PRIORITY);
@@ -582,7 +582,7 @@ void gpt_lld_start(GPTDriver *gptp) { #if STM32_GPT_USE_TIM7
if (&GPTD7 == gptp) {
- rccEnableTIM7(FALSE);
+ rccEnableTIM7(false);
rccResetTIM7();
#if !defined(STM32_TIM7_SUPPRESS_ISR)
nvicEnableVector(STM32_TIM7_NUMBER, STM32_GPT_TIM7_IRQ_PRIORITY);
@@ -597,7 +597,7 @@ void gpt_lld_start(GPTDriver *gptp) { #if STM32_GPT_USE_TIM8
if (&GPTD8 == gptp) {
- rccEnableTIM8(FALSE);
+ rccEnableTIM8(false);
rccResetTIM8();
#if !defined(STM32_TIM8_SUPPRESS_ISR)
nvicEnableVector(STM32_TIM8_UP_NUMBER, STM32_GPT_TIM8_IRQ_PRIORITY);
@@ -612,7 +612,7 @@ void gpt_lld_start(GPTDriver *gptp) { #if STM32_GPT_USE_TIM9
if (&GPTD9 == gptp) {
- rccEnableTIM9(FALSE);
+ rccEnableTIM9(false);
rccResetTIM9();
#if !defined(STM32_TIM9_SUPPRESS_ISR)
nvicEnableVector(STM32_TIM9_NUMBER, STM32_GPT_TIM9_IRQ_PRIORITY);
@@ -627,7 +627,7 @@ void gpt_lld_start(GPTDriver *gptp) { #if STM32_GPT_USE_TIM11
if (&GPTD11 == gptp) {
- rccEnableTIM11(FALSE);
+ rccEnableTIM11(false);
rccResetTIM11();
#if !defined(STM32_TIM11_SUPPRESS_ISR)
nvicEnableVector(STM32_TIM11_NUMBER, STM32_GPT_TIM11_IRQ_PRIORITY);
@@ -642,7 +642,7 @@ void gpt_lld_start(GPTDriver *gptp) { #if STM32_GPT_USE_TIM12
if (&GPTD12 == gptp) {
- rccEnableTIM12(FALSE);
+ rccEnableTIM12(false);
rccResetTIM12();
#if !defined(STM32_TIM12_SUPPRESS_ISR)
nvicEnableVector(STM32_TIM12_NUMBER, STM32_GPT_TIM12_IRQ_PRIORITY);
@@ -657,7 +657,7 @@ void gpt_lld_start(GPTDriver *gptp) { #if STM32_GPT_USE_TIM14
if (&GPTD14 == gptp) {
- rccEnableTIM14(FALSE);
+ rccEnableTIM14(false);
rccResetTIM14();
#if !defined(STM32_TIM14_SUPPRESS_ISR)
nvicEnableVector(STM32_TIM14_NUMBER, STM32_GPT_TIM14_IRQ_PRIORITY);
@@ -704,7 +704,7 @@ void gpt_lld_stop(GPTDriver *gptp) { #if !defined(STM32_TIM1_SUPPRESS_ISR)
nvicDisableVector(STM32_TIM1_UP_NUMBER);
#endif
- rccDisableTIM1(FALSE);
+ rccDisableTIM1();
}
#endif
@@ -713,7 +713,7 @@ void gpt_lld_stop(GPTDriver *gptp) { #if !defined(STM32_TIM2_SUPPRESS_ISR)
nvicDisableVector(STM32_TIM2_NUMBER);
#endif
- rccDisableTIM2(FALSE);
+ rccDisableTIM2();
}
#endif
@@ -722,7 +722,7 @@ void gpt_lld_stop(GPTDriver *gptp) { #if !defined(STM32_TIM3_SUPPRESS_ISR)
nvicDisableVector(STM32_TIM3_NUMBER);
#endif
- rccDisableTIM3(FALSE);
+ rccDisableTIM3();
}
#endif
@@ -731,7 +731,7 @@ void gpt_lld_stop(GPTDriver *gptp) { #if !defined(STM32_TIM4_SUPPRESS_ISR)
nvicDisableVector(STM32_TIM4_NUMBER);
#endif
- rccDisableTIM4(FALSE);
+ rccDisableTIM4();
}
#endif
@@ -740,7 +740,7 @@ void gpt_lld_stop(GPTDriver *gptp) { #if !defined(STM32_TIM5_SUPPRESS_ISR)
nvicDisableVector(STM32_TIM5_NUMBER);
#endif
- rccDisableTIM5(FALSE);
+ rccDisableTIM5();
}
#endif
@@ -749,7 +749,7 @@ void gpt_lld_stop(GPTDriver *gptp) { #if !defined(STM32_TIM6_SUPPRESS_ISR)
nvicDisableVector(STM32_TIM6_NUMBER);
#endif
- rccDisableTIM6(FALSE);
+ rccDisableTIM6();
}
#endif
@@ -758,7 +758,7 @@ void gpt_lld_stop(GPTDriver *gptp) { #if !defined(STM32_TIM7_SUPPRESS_ISR)
nvicDisableVector(STM32_TIM7_NUMBER);
#endif
- rccDisableTIM7(FALSE);
+ rccDisableTIM7();
}
#endif
@@ -767,7 +767,7 @@ void gpt_lld_stop(GPTDriver *gptp) { #if !defined(STM32_TIM8_SUPPRESS_ISR)
nvicDisableVector(STM32_TIM8_UP_NUMBER);
#endif
- rccDisableTIM8(FALSE);
+ rccDisableTIM8();
}
#endif
@@ -776,7 +776,7 @@ void gpt_lld_stop(GPTDriver *gptp) { #if !defined(STM32_TIM9_SUPPRESS_ISR)
nvicDisableVector(STM32_TIM9_NUMBER);
#endif
- rccDisableTIM9(FALSE);
+ rccDisableTIM9();
}
#endif
@@ -785,7 +785,7 @@ void gpt_lld_stop(GPTDriver *gptp) { #if !defined(STM32_TIM11_SUPPRESS_ISR)
nvicDisableVector(STM32_TIM11_NUMBER);
#endif
- rccDisableTIM11(FALSE);
+ rccDisableTIM11();
}
#endif
@@ -794,7 +794,7 @@ void gpt_lld_stop(GPTDriver *gptp) { #if !defined(STM32_TIM12_SUPPRESS_ISR)
nvicDisableVector(STM32_TIM12_NUMBER);
#endif
- rccDisableTIM12(FALSE);
+ rccDisableTIM12();
}
#endif
@@ -803,7 +803,7 @@ void gpt_lld_stop(GPTDriver *gptp) { #if !defined(STM32_TIM14_SUPPRESS_ISR)
nvicDisableVector(STM32_TIM14_NUMBER);
#endif
- rccDisableTIM14(FALSE);
+ rccDisableTIM14();
}
#endif
}
diff --git a/os/hal/ports/STM32/LLD/TIMv1/hal_icu_lld.c b/os/hal/ports/STM32/LLD/TIMv1/hal_icu_lld.c index f1efa913e..861c07247 100644 --- a/os/hal/ports/STM32/LLD/TIMv1/hal_icu_lld.c +++ b/os/hal/ports/STM32/LLD/TIMv1/hal_icu_lld.c @@ -395,7 +395,7 @@ void icu_lld_start(ICUDriver *icup) { /* Clock activation and timer reset.*/
#if STM32_ICU_USE_TIM1
if (&ICUD1 == icup) {
- rccEnableTIM1(FALSE);
+ rccEnableTIM1(false);
rccResetTIM1();
#if !defined(STM32_TIM1_SUPPRESS_ISR)
nvicEnableVector(STM32_TIM1_UP_NUMBER, STM32_ICU_TIM1_IRQ_PRIORITY);
@@ -411,7 +411,7 @@ void icu_lld_start(ICUDriver *icup) { #if STM32_ICU_USE_TIM2
if (&ICUD2 == icup) {
- rccEnableTIM2(FALSE);
+ rccEnableTIM2(false);
rccResetTIM2();
#if !defined(STM32_TIM2_SUPPRESS_ISR)
nvicEnableVector(STM32_TIM2_NUMBER, STM32_ICU_TIM2_IRQ_PRIORITY);
@@ -426,7 +426,7 @@ void icu_lld_start(ICUDriver *icup) { #if STM32_ICU_USE_TIM3
if (&ICUD3 == icup) {
- rccEnableTIM3(FALSE);
+ rccEnableTIM3(false);
rccResetTIM3();
#if !defined(STM32_TIM3_SUPPRESS_ISR)
nvicEnableVector(STM32_TIM3_NUMBER, STM32_ICU_TIM3_IRQ_PRIORITY);
@@ -441,7 +441,7 @@ void icu_lld_start(ICUDriver *icup) { #if STM32_ICU_USE_TIM4
if (&ICUD4 == icup) {
- rccEnableTIM4(FALSE);
+ rccEnableTIM4(false);
rccResetTIM4();
#if !defined(STM32_TIM4_SUPPRESS_ISR)
nvicEnableVector(STM32_TIM4_NUMBER, STM32_ICU_TIM4_IRQ_PRIORITY);
@@ -456,7 +456,7 @@ void icu_lld_start(ICUDriver *icup) { #if STM32_ICU_USE_TIM5
if (&ICUD5 == icup) {
- rccEnableTIM5(FALSE);
+ rccEnableTIM5(false);
rccResetTIM5();
#if !defined(STM32_TIM5_SUPPRESS_ISR)
nvicEnableVector(STM32_TIM5_NUMBER, STM32_ICU_TIM5_IRQ_PRIORITY);
@@ -471,7 +471,7 @@ void icu_lld_start(ICUDriver *icup) { #if STM32_ICU_USE_TIM8
if (&ICUD8 == icup) {
- rccEnableTIM8(FALSE);
+ rccEnableTIM8(false);
rccResetTIM8();
#if !defined(STM32_TIM8_SUPPRESS_ISR)
nvicEnableVector(STM32_TIM8_UP_NUMBER, STM32_ICU_TIM8_IRQ_PRIORITY);
@@ -487,7 +487,7 @@ void icu_lld_start(ICUDriver *icup) { #if STM32_ICU_USE_TIM9
if (&ICUD9 == icup) {
- rccEnableTIM9(FALSE);
+ rccEnableTIM9(false);
rccResetTIM9();
#if !defined(STM32_TIM9_SUPPRESS_ISR)
nvicEnableVector(STM32_TIM9_NUMBER, STM32_ICU_TIM9_IRQ_PRIORITY);
@@ -592,7 +592,7 @@ void icu_lld_stop(ICUDriver *icup) { nvicDisableVector(STM32_TIM1_UP_NUMBER);
nvicDisableVector(STM32_TIM1_CC_NUMBER);
#endif
- rccDisableTIM1(FALSE);
+ rccDisableTIM1();
}
#endif
@@ -601,7 +601,7 @@ void icu_lld_stop(ICUDriver *icup) { #if !defined(STM32_TIM2_SUPPRESS_ISR)
nvicDisableVector(STM32_TIM2_NUMBER);
#endif
- rccDisableTIM2(FALSE);
+ rccDisableTIM2();
}
#endif
@@ -610,7 +610,7 @@ void icu_lld_stop(ICUDriver *icup) { #if !defined(STM32_TIM3_SUPPRESS_ISR)
nvicDisableVector(STM32_TIM3_NUMBER);
#endif
- rccDisableTIM3(FALSE);
+ rccDisableTIM3();
}
#endif
@@ -619,7 +619,7 @@ void icu_lld_stop(ICUDriver *icup) { #if !defined(STM32_TIM4_SUPPRESS_ISR)
nvicDisableVector(STM32_TIM4_NUMBER);
#endif
- rccDisableTIM4(FALSE);
+ rccDisableTIM4();
}
#endif
@@ -628,7 +628,7 @@ void icu_lld_stop(ICUDriver *icup) { #if !defined(STM32_TIM5_SUPPRESS_ISR)
nvicDisableVector(STM32_TIM5_NUMBER);
#endif
- rccDisableTIM5(FALSE);
+ rccDisableTIM5();
}
#endif
@@ -638,7 +638,7 @@ void icu_lld_stop(ICUDriver *icup) { nvicDisableVector(STM32_TIM8_UP_NUMBER);
nvicDisableVector(STM32_TIM8_CC_NUMBER);
#endif
- rccDisableTIM8(FALSE);
+ rccDisableTIM8();
}
#endif
@@ -647,7 +647,7 @@ void icu_lld_stop(ICUDriver *icup) { #if !defined(STM32_TIM9_SUPPRESS_ISR)
nvicDisableVector(STM32_TIM9_NUMBER);
#endif
- rccDisableTIM9(FALSE);
+ rccDisableTIM9();
}
#endif
}
diff --git a/os/hal/ports/STM32/LLD/TIMv1/hal_pwm_lld.c b/os/hal/ports/STM32/LLD/TIMv1/hal_pwm_lld.c index 279170e16..c32b9e4a0 100644 --- a/os/hal/ports/STM32/LLD/TIMv1/hal_pwm_lld.c +++ b/os/hal/ports/STM32/LLD/TIMv1/hal_pwm_lld.c @@ -373,7 +373,7 @@ void pwm_lld_start(PWMDriver *pwmp) { /* Clock activation and timer reset.*/
#if STM32_PWM_USE_TIM1
if (&PWMD1 == pwmp) {
- rccEnableTIM1(FALSE);
+ rccEnableTIM1(false);
rccResetTIM1();
#if !defined(STM32_TIM1_SUPPRESS_ISR)
nvicEnableVector(STM32_TIM1_UP_NUMBER, STM32_PWM_TIM1_IRQ_PRIORITY);
@@ -389,7 +389,7 @@ void pwm_lld_start(PWMDriver *pwmp) { #if STM32_PWM_USE_TIM2
if (&PWMD2 == pwmp) {
- rccEnableTIM2(FALSE);
+ rccEnableTIM2(false);
rccResetTIM2();
#if !defined(STM32_TIM2_SUPPRESS_ISR)
nvicEnableVector(STM32_TIM2_NUMBER, STM32_PWM_TIM2_IRQ_PRIORITY);
@@ -404,7 +404,7 @@ void pwm_lld_start(PWMDriver *pwmp) { #if STM32_PWM_USE_TIM3
if (&PWMD3 == pwmp) {
- rccEnableTIM3(FALSE);
+ rccEnableTIM3(false);
rccResetTIM3();
#if !defined(STM32_TIM3_SUPPRESS_ISR)
nvicEnableVector(STM32_TIM3_NUMBER, STM32_PWM_TIM3_IRQ_PRIORITY);
@@ -419,7 +419,7 @@ void pwm_lld_start(PWMDriver *pwmp) { #if STM32_PWM_USE_TIM4
if (&PWMD4 == pwmp) {
- rccEnableTIM4(FALSE);
+ rccEnableTIM4(false);
rccResetTIM4();
#if !defined(STM32_TIM4_SUPPRESS_ISR)
nvicEnableVector(STM32_TIM4_NUMBER, STM32_PWM_TIM4_IRQ_PRIORITY);
@@ -434,7 +434,7 @@ void pwm_lld_start(PWMDriver *pwmp) { #if STM32_PWM_USE_TIM5
if (&PWMD5 == pwmp) {
- rccEnableTIM5(FALSE);
+ rccEnableTIM5(false);
rccResetTIM5();
#if !defined(STM32_TIM5_SUPPRESS_ISR)
nvicEnableVector(STM32_TIM5_NUMBER, STM32_PWM_TIM5_IRQ_PRIORITY);
@@ -449,7 +449,7 @@ void pwm_lld_start(PWMDriver *pwmp) { #if STM32_PWM_USE_TIM8
if (&PWMD8 == pwmp) {
- rccEnableTIM8(FALSE);
+ rccEnableTIM8(false);
rccResetTIM8();
#if !defined(STM32_TIM8_SUPPRESS_ISR)
nvicEnableVector(STM32_TIM8_UP_NUMBER, STM32_PWM_TIM8_IRQ_PRIORITY);
@@ -465,7 +465,7 @@ void pwm_lld_start(PWMDriver *pwmp) { #if STM32_PWM_USE_TIM9
if (&PWMD9 == pwmp) {
- rccEnableTIM9(FALSE);
+ rccEnableTIM9(false);
rccResetTIM9();
#if !defined(STM32_TIM9_SUPPRESS_ISR)
nvicEnableVector(STM32_TIM9_NUMBER, STM32_PWM_TIM9_IRQ_PRIORITY);
@@ -640,7 +640,7 @@ void pwm_lld_stop(PWMDriver *pwmp) { nvicDisableVector(STM32_TIM1_UP_NUMBER);
nvicDisableVector(STM32_TIM1_CC_NUMBER);
#endif
- rccDisableTIM1(FALSE);
+ rccDisableTIM1();
}
#endif
@@ -649,7 +649,7 @@ void pwm_lld_stop(PWMDriver *pwmp) { #if !defined(STM32_TIM2_SUPPRESS_ISR)
nvicDisableVector(STM32_TIM2_NUMBER);
#endif
- rccDisableTIM2(FALSE);
+ rccDisableTIM2();
}
#endif
@@ -658,7 +658,7 @@ void pwm_lld_stop(PWMDriver *pwmp) { #if !defined(STM32_TIM3_SUPPRESS_ISR)
nvicDisableVector(STM32_TIM3_NUMBER);
#endif
- rccDisableTIM3(FALSE);
+ rccDisableTIM3();
}
#endif
@@ -667,7 +667,7 @@ void pwm_lld_stop(PWMDriver *pwmp) { #if !defined(STM32_TIM4_SUPPRESS_ISR)
nvicDisableVector(STM32_TIM4_NUMBER);
#endif
- rccDisableTIM4(FALSE);
+ rccDisableTIM4();
}
#endif
@@ -676,7 +676,7 @@ void pwm_lld_stop(PWMDriver *pwmp) { #if !defined(STM32_TIM5_SUPPRESS_ISR)
nvicDisableVector(STM32_TIM5_NUMBER);
#endif
- rccDisableTIM5(FALSE);
+ rccDisableTIM5();
}
#endif
@@ -686,7 +686,7 @@ void pwm_lld_stop(PWMDriver *pwmp) { nvicDisableVector(STM32_TIM8_UP_NUMBER);
nvicDisableVector(STM32_TIM8_CC_NUMBER);
#endif
- rccDisableTIM8(FALSE);
+ rccDisableTIM8();
}
#endif
@@ -695,7 +695,7 @@ void pwm_lld_stop(PWMDriver *pwmp) { #if !defined(STM32_TIM9_SUPPRESS_ISR)
nvicDisableVector(STM32_TIM9_NUMBER);
#endif
- rccDisableTIM9(FALSE);
+ rccDisableTIM9();
}
#endif
}
diff --git a/os/hal/ports/STM32/LLD/TIMv1/hal_st_lld.c b/os/hal/ports/STM32/LLD/TIMv1/hal_st_lld.c index 292a16837..9625ad28c 100644 --- a/os/hal/ports/STM32/LLD/TIMv1/hal_st_lld.c +++ b/os/hal/ports/STM32/LLD/TIMv1/hal_st_lld.c @@ -52,7 +52,7 @@ #define ST_HANDLER STM32_TIM2_HANDLER
#define ST_NUMBER STM32_TIM2_NUMBER
#define ST_CLOCK_SRC STM32_TIMCLK1
-#define ST_ENABLE_CLOCK() rccEnableTIM2(FALSE)
+#define ST_ENABLE_CLOCK() rccEnableTIM2(false)
#if defined(STM32F1XX)
#define ST_ENABLE_STOP() DBGMCU->CR |= DBGMCU_CR_DBG_TIM2_STOP
#elif defined(STM32L4XX)
@@ -77,7 +77,7 @@ #define ST_HANDLER STM32_TIM3_HANDLER
#define ST_NUMBER STM32_TIM3_NUMBER
#define ST_CLOCK_SRC STM32_TIMCLK1
-#define ST_ENABLE_CLOCK() rccEnableTIM3(FALSE)
+#define ST_ENABLE_CLOCK() rccEnableTIM3(false)
#if defined(STM32F1XX)
#define ST_ENABLE_STOP() DBGMCU->CR |= DBGMCU_CR_DBG_TIM3_STOP
#elif defined(STM32L4XX)
@@ -102,7 +102,7 @@ #define ST_HANDLER STM32_TIM4_HANDLER
#define ST_NUMBER STM32_TIM4_NUMBER
#define ST_CLOCK_SRC STM32_TIMCLK1
-#define ST_ENABLE_CLOCK() rccEnableTIM4(FALSE)
+#define ST_ENABLE_CLOCK() rccEnableTIM4(false)
#if defined(STM32F1XX)
#define ST_ENABLE_STOP() DBGMCU->CR |= DBGMCU_CR_DBG_TIM4_STOP
#elif defined(STM32L4XX)
@@ -127,7 +127,7 @@ #define ST_HANDLER STM32_TIM5_HANDLER
#define ST_NUMBER STM32_TIM5_NUMBER
#define ST_CLOCK_SRC STM32_TIMCLK1
-#define ST_ENABLE_CLOCK() rccEnableTIM5(FALSE)
+#define ST_ENABLE_CLOCK() rccEnableTIM5(false)
#if defined(STM32F1XX)
#define ST_ENABLE_STOP() DBGMCU->CR |= DBGMCU_CR_DBG_TIM5_STOP
#elif defined(STM32L4XX)
@@ -152,7 +152,7 @@ #define ST_HANDLER STM32_TIM21_HANDLER
#define ST_NUMBER STM32_TIM21_NUMBER
#define ST_CLOCK_SRC STM32_TIMCLK2
-#define ST_ENABLE_CLOCK() rccEnableTIM21(FALSE)
+#define ST_ENABLE_CLOCK() rccEnableTIM21(false)
#define ST_ENABLE_STOP() DBGMCU->APB1FZ |= DBGMCU_APB2_FZ_DBG_TIM21_STOP
#elif STM32_ST_USE_TIMER == 22
@@ -169,7 +169,7 @@ #define ST_HANDLER STM32_TIM22_HANDLER
#define ST_NUMBER STM32_TIM22_NUMBER
#define ST_CLOCK_SRC STM32_TIMCLK2
-#define ST_ENABLE_CLOCK() rccEnableTIM22(FALSE)
+#define ST_ENABLE_CLOCK() rccEnableTIM22(false)
#define ST_ENABLE_STOP() DBGMCU->APB1FZ |= DBGMCU_APB2_FZ_DBG_TIM21_STOP
#else
diff --git a/os/hal/ports/STM32/LLD/USARTv1/hal_serial_lld.c b/os/hal/ports/STM32/LLD/USARTv1/hal_serial_lld.c index b76c06ef5..bed91861e 100644 --- a/os/hal/ports/STM32/LLD/USARTv1/hal_serial_lld.c +++ b/os/hal/ports/STM32/LLD/USARTv1/hal_serial_lld.c @@ -513,49 +513,49 @@ void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) { if (sdp->state == SD_STOP) {
#if STM32_SERIAL_USE_USART1
if (&SD1 == sdp) {
- rccEnableUSART1(FALSE);
+ rccEnableUSART1(false);
nvicEnableVector(STM32_USART1_NUMBER, STM32_SERIAL_USART1_PRIORITY);
}
#endif
#if STM32_SERIAL_USE_USART2
if (&SD2 == sdp) {
- rccEnableUSART2(FALSE);
+ rccEnableUSART2(false);
nvicEnableVector(STM32_USART2_NUMBER, STM32_SERIAL_USART2_PRIORITY);
}
#endif
#if STM32_SERIAL_USE_USART3
if (&SD3 == sdp) {
- rccEnableUSART3(FALSE);
+ rccEnableUSART3(false);
nvicEnableVector(STM32_USART3_NUMBER, STM32_SERIAL_USART3_PRIORITY);
}
#endif
#if STM32_SERIAL_USE_UART4
if (&SD4 == sdp) {
- rccEnableUART4(FALSE);
+ rccEnableUART4(false);
nvicEnableVector(STM32_UART4_NUMBER, STM32_SERIAL_UART4_PRIORITY);
}
#endif
#if STM32_SERIAL_USE_UART5
if (&SD5 == sdp) {
- rccEnableUART5(FALSE);
+ rccEnableUART5(false);
nvicEnableVector(STM32_UART5_NUMBER, STM32_SERIAL_UART5_PRIORITY);
}
#endif
#if STM32_SERIAL_USE_USART6
if (&SD6 == sdp) {
- rccEnableUSART6(FALSE);
+ rccEnableUSART6(false);
nvicEnableVector(STM32_USART6_NUMBER, STM32_SERIAL_USART6_PRIORITY);
}
#endif
#if STM32_SERIAL_USE_UART7
if (&SD7 == sdp) {
- rccEnableUART7(FALSE);
+ rccEnableUART7(false);
nvicEnableVector(STM32_UART7_NUMBER, STM32_SERIAL_UART7_PRIORITY);
}
#endif
#if STM32_SERIAL_USE_UART8
if (&SD8 == sdp) {
- rccEnableUART8(FALSE);
+ rccEnableUART8(false);
nvicEnableVector(STM32_UART8_NUMBER, STM32_SERIAL_UART8_PRIORITY);
}
#endif
@@ -578,56 +578,56 @@ void sd_lld_stop(SerialDriver *sdp) { usart_deinit(sdp->usart);
#if STM32_SERIAL_USE_USART1
if (&SD1 == sdp) {
- rccDisableUSART1(FALSE);
+ rccDisableUSART1();
nvicDisableVector(STM32_USART1_NUMBER);
return;
}
#endif
#if STM32_SERIAL_USE_USART2
if (&SD2 == sdp) {
- rccDisableUSART2(FALSE);
+ rccDisableUSART2();
nvicDisableVector(STM32_USART2_NUMBER);
return;
}
#endif
#if STM32_SERIAL_USE_USART3
if (&SD3 == sdp) {
- rccDisableUSART3(FALSE);
+ rccDisableUSART3();
nvicDisableVector(STM32_USART3_NUMBER);
return;
}
#endif
#if STM32_SERIAL_USE_UART4
if (&SD4 == sdp) {
- rccDisableUART4(FALSE);
+ rccDisableUART4();
nvicDisableVector(STM32_UART4_NUMBER);
return;
}
#endif
#if STM32_SERIAL_USE_UART5
if (&SD5 == sdp) {
- rccDisableUART5(FALSE);
+ rccDisableUART5();
nvicDisableVector(STM32_UART5_NUMBER);
return;
}
#endif
#if STM32_SERIAL_USE_USART6
if (&SD6 == sdp) {
- rccDisableUSART6(FALSE);
+ rccDisableUSART6();
nvicDisableVector(STM32_USART6_NUMBER);
return;
}
#endif
#if STM32_SERIAL_USE_UART7
if (&SD7 == sdp) {
- rccDisableUART7(FALSE);
+ rccDisableUART7();
nvicDisableVector(STM32_UART7_NUMBER);
return;
}
#endif
#if STM32_SERIAL_USE_UART8
if (&SD8 == sdp) {
- rccDisableUART8(FALSE);
+ rccDisableUART8();
nvicDisableVector(STM32_UART8_NUMBER);
return;
}
diff --git a/os/hal/ports/STM32/LLD/USARTv1/hal_uart_lld.c b/os/hal/ports/STM32/LLD/USARTv1/hal_uart_lld.c index 54c1632b3..31a8f179b 100644 --- a/os/hal/ports/STM32/LLD/USARTv1/hal_uart_lld.c +++ b/os/hal/ports/STM32/LLD/USARTv1/hal_uart_lld.c @@ -514,7 +514,7 @@ void uart_lld_start(UARTDriver *uartp) { (stm32_dmaisr_t)uart_lld_serve_tx_end_irq,
(void *)uartp);
osalDbgAssert(!b, "stream already allocated");
- rccEnableUSART1(FALSE);
+ rccEnableUSART1(false);
nvicEnableVector(STM32_USART1_NUMBER, STM32_UART_USART1_IRQ_PRIORITY);
uartp->dmamode |= STM32_DMA_CR_CHSEL(USART1_RX_DMA_CHANNEL) |
STM32_DMA_CR_PL(STM32_UART_USART1_DMA_PRIORITY);
@@ -534,7 +534,7 @@ void uart_lld_start(UARTDriver *uartp) { (stm32_dmaisr_t)uart_lld_serve_tx_end_irq,
(void *)uartp);
osalDbgAssert(!b, "stream already allocated");
- rccEnableUSART2(FALSE);
+ rccEnableUSART2(false);
nvicEnableVector(STM32_USART2_NUMBER, STM32_UART_USART2_IRQ_PRIORITY);
uartp->dmamode |= STM32_DMA_CR_CHSEL(USART2_RX_DMA_CHANNEL) |
STM32_DMA_CR_PL(STM32_UART_USART2_DMA_PRIORITY);
@@ -554,7 +554,7 @@ void uart_lld_start(UARTDriver *uartp) { (stm32_dmaisr_t)uart_lld_serve_tx_end_irq,
(void *)uartp);
osalDbgAssert(!b, "stream already allocated");
- rccEnableUSART3(FALSE);
+ rccEnableUSART3(false);
nvicEnableVector(STM32_USART3_NUMBER, STM32_UART_USART3_IRQ_PRIORITY);
uartp->dmamode |= STM32_DMA_CR_CHSEL(USART3_RX_DMA_CHANNEL) |
STM32_DMA_CR_PL(STM32_UART_USART3_DMA_PRIORITY);
@@ -580,7 +580,7 @@ void uart_lld_start(UARTDriver *uartp) { (stm32_dmaisr_t)uart_lld_serve_tx_end_irq,
(void *)uartp);
osalDbgAssert(!b, "stream already allocated");
- rccEnableUART4(FALSE);
+ rccEnableUART4(false);
nvicEnableVector(STM32_UART4_NUMBER, STM32_UART_UART4_IRQ_PRIORITY);
uartp->dmamode |= STM32_DMA_CR_CHSEL(UART4_RX_DMA_CHANNEL) |
STM32_DMA_CR_PL(STM32_UART_UART4_DMA_PRIORITY);
@@ -606,7 +606,7 @@ void uart_lld_start(UARTDriver *uartp) { (stm32_dmaisr_t)uart_lld_serve_tx_end_irq,
(void *)uartp);
osalDbgAssert(!b, "stream already allocated");
- rccEnableUART5(FALSE);
+ rccEnableUART5(false);
nvicEnableVector(STM32_UART5_NUMBER, STM32_UART_UART5_IRQ_PRIORITY);
uartp->dmamode |= STM32_DMA_CR_CHSEL(UART5_RX_DMA_CHANNEL) |
STM32_DMA_CR_PL(STM32_UART_UART5_DMA_PRIORITY);
@@ -626,7 +626,7 @@ void uart_lld_start(UARTDriver *uartp) { (stm32_dmaisr_t)uart_lld_serve_tx_end_irq,
(void *)uartp);
osalDbgAssert(!b, "stream already allocated");
- rccEnableUSART6(FALSE);
+ rccEnableUSART6(false);
nvicEnableVector(STM32_USART6_NUMBER, STM32_UART_USART6_IRQ_PRIORITY);
uartp->dmamode |= STM32_DMA_CR_CHSEL(USART6_RX_DMA_CHANNEL) |
STM32_DMA_CR_PL(STM32_UART_USART6_DMA_PRIORITY);
@@ -664,7 +664,7 @@ void uart_lld_stop(UARTDriver *uartp) { #if STM32_UART_USE_USART1
if (&UARTD1 == uartp) {
nvicDisableVector(STM32_USART1_NUMBER);
- rccDisableUSART1(FALSE);
+ rccDisableUSART1();
return;
}
#endif
@@ -672,7 +672,7 @@ void uart_lld_stop(UARTDriver *uartp) { #if STM32_UART_USE_USART2
if (&UARTD2 == uartp) {
nvicDisableVector(STM32_USART2_NUMBER);
- rccDisableUSART2(FALSE);
+ rccDisableUSART2();
return;
}
#endif
@@ -680,7 +680,7 @@ void uart_lld_stop(UARTDriver *uartp) { #if STM32_UART_USE_USART3
if (&UARTD3 == uartp) {
nvicDisableVector(STM32_USART3_NUMBER);
- rccDisableUSART3(FALSE);
+ rccDisableUSART3();
return;
}
#endif
@@ -688,7 +688,7 @@ void uart_lld_stop(UARTDriver *uartp) { #if STM32_UART_USE_UART4
if (&UARTD4 == uartp) {
nvicDisableVector(STM32_UART4_NUMBER);
- rccDisableUART4(FALSE);
+ rccDisableUART4();
return;
}
#endif
@@ -696,7 +696,7 @@ void uart_lld_stop(UARTDriver *uartp) { #if STM32_UART_USE_UART5
if (&UARTD5 == uartp) {
nvicDisableVector(STM32_UART5_NUMBER);
- rccDisableUART5(FALSE);
+ rccDisableUART5();
return;
}
#endif
@@ -704,7 +704,7 @@ void uart_lld_stop(UARTDriver *uartp) { #if STM32_UART_USE_USART6
if (&UARTD6 == uartp) {
nvicDisableVector(STM32_USART6_NUMBER);
- rccDisableUSART6(FALSE);
+ rccDisableUSART6();
return;
}
#endif
diff --git a/os/hal/ports/STM32/LLD/USARTv2/hal_serial_lld.c b/os/hal/ports/STM32/LLD/USARTv2/hal_serial_lld.c index 4014ab5bb..7e4ee6f60 100644 --- a/os/hal/ports/STM32/LLD/USARTv2/hal_serial_lld.c +++ b/os/hal/ports/STM32/LLD/USARTv2/hal_serial_lld.c @@ -767,47 +767,47 @@ void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) { if (sdp->state == SD_STOP) {
#if STM32_SERIAL_USE_USART1
if (&SD1 == sdp) {
- rccEnableUSART1(FALSE);
+ rccEnableUSART1(false);
}
#endif
#if STM32_SERIAL_USE_USART2
if (&SD2 == sdp) {
- rccEnableUSART2(FALSE);
+ rccEnableUSART2(false);
}
#endif
#if STM32_SERIAL_USE_USART3
if (&SD3 == sdp) {
- rccEnableUSART3(FALSE);
+ rccEnableUSART3(false);
}
#endif
#if STM32_SERIAL_USE_UART4
if (&SD4 == sdp) {
- rccEnableUART4(FALSE);
+ rccEnableUART4(false);
}
#endif
#if STM32_SERIAL_USE_UART5
if (&SD5 == sdp) {
- rccEnableUART5(FALSE);
+ rccEnableUART5(false);
}
#endif
#if STM32_SERIAL_USE_USART6
if (&SD6 == sdp) {
- rccEnableUSART6(FALSE);
+ rccEnableUSART6(false);
}
#endif
#if STM32_SERIAL_USE_UART7
if (&SD7 == sdp) {
- rccEnableUART7(FALSE);
+ rccEnableUART7(false);
}
#endif
#if STM32_SERIAL_USE_UART8
if (&SD8 == sdp) {
- rccEnableUART8(FALSE);
+ rccEnableUART8(false);
}
#endif
#if STM32_SERIAL_USE_LPUART1
if (&LPSD1 == sdp) {
- rccEnableLPUART1(FALSE);
+ rccEnableLPUART1(false);
}
#endif
}
@@ -831,55 +831,55 @@ void sd_lld_stop(SerialDriver *sdp) { #if STM32_SERIAL_USE_USART1
if (&SD1 == sdp) {
- rccDisableUSART1(FALSE);
+ rccDisableUSART1();
return;
}
#endif
#if STM32_SERIAL_USE_USART2
if (&SD2 == sdp) {
- rccDisableUSART2(FALSE);
+ rccDisableUSART2();
return;
}
#endif
#if STM32_SERIAL_USE_USART3
if (&SD3 == sdp) {
- rccDisableUSART3(FALSE);
+ rccDisableUSART3();
return;
}
#endif
#if STM32_SERIAL_USE_UART4
if (&SD4 == sdp) {
- rccDisableUART4(FALSE);
+ rccDisableUART4();
return;
}
#endif
#if STM32_SERIAL_USE_UART5
if (&SD5 == sdp) {
- rccDisableUART5(FALSE);
+ rccDisableUART5();
return;
}
#endif
#if STM32_SERIAL_USE_USART6
if (&SD6 == sdp) {
- rccDisableUSART6(FALSE);
+ rccDisableUSART6();
return;
}
#endif
#if STM32_SERIAL_USE_UART7
if (&SD7 == sdp) {
- rccDisableUART7(FALSE);
+ rccDisableUART7();
return;
}
#endif
#if STM32_SERIAL_USE_UART8
if (&SD8 == sdp) {
- rccDisableUART8(FALSE);
+ rccDisableUART8();
return;
}
#endif
#if STM32_SERIAL_USE_LPUART1
if (&LPSD1 == sdp) {
- rccDisableLPUART1(FALSE);
+ rccDisableLPUART1();
return;
}
#endif
diff --git a/os/hal/ports/STM32/LLD/USARTv2/hal_uart_lld.c b/os/hal/ports/STM32/LLD/USARTv2/hal_uart_lld.c index 9fd66fa87..ede3fa8fb 100644 --- a/os/hal/ports/STM32/LLD/USARTv2/hal_uart_lld.c +++ b/os/hal/ports/STM32/LLD/USARTv2/hal_uart_lld.c @@ -709,7 +709,7 @@ void uart_lld_start(UARTDriver *uartp) { (stm32_dmaisr_t)uart_lld_serve_tx_end_irq,
(void *)uartp);
osalDbgAssert(!b, "stream already allocated");
- rccEnableUSART1(FALSE);
+ rccEnableUSART1(false);
uartp->dmamode |= STM32_DMA_CR_CHSEL(USART1_RX_DMA_CHANNEL) |
STM32_DMA_CR_PL(STM32_UART_USART1_DMA_PRIORITY);
}
@@ -728,7 +728,7 @@ void uart_lld_start(UARTDriver *uartp) { (stm32_dmaisr_t)uart_lld_serve_tx_end_irq,
(void *)uartp);
osalDbgAssert(!b, "stream already allocated");
- rccEnableUSART2(FALSE);
+ rccEnableUSART2(false);
uartp->dmamode |= STM32_DMA_CR_CHSEL(USART2_RX_DMA_CHANNEL) |
STM32_DMA_CR_PL(STM32_UART_USART2_DMA_PRIORITY);
}
@@ -747,7 +747,7 @@ void uart_lld_start(UARTDriver *uartp) { (stm32_dmaisr_t)uart_lld_serve_tx_end_irq,
(void *)uartp);
osalDbgAssert(!b, "stream already allocated");
- rccEnableUSART3(FALSE);
+ rccEnableUSART3(false);
uartp->dmamode |= STM32_DMA_CR_CHSEL(USART3_RX_DMA_CHANNEL) |
STM32_DMA_CR_PL(STM32_UART_USART3_DMA_PRIORITY);
}
@@ -766,7 +766,7 @@ void uart_lld_start(UARTDriver *uartp) { (stm32_dmaisr_t)uart_lld_serve_tx_end_irq,
(void *)uartp);
osalDbgAssert(!b, "stream already allocated");
- rccEnableUART4(FALSE);
+ rccEnableUART4(false);
uartp->dmamode |= STM32_DMA_CR_CHSEL(UART4_RX_DMA_CHANNEL) |
STM32_DMA_CR_PL(STM32_UART_UART4_DMA_PRIORITY);
}
@@ -785,7 +785,7 @@ void uart_lld_start(UARTDriver *uartp) { (stm32_dmaisr_t)uart_lld_serve_tx_end_irq,
(void *)uartp);
osalDbgAssert(!b, "stream already allocated");
- rccEnableUART5(FALSE);
+ rccEnableUART5(false);
uartp->dmamode |= STM32_DMA_CR_CHSEL(UART5_RX_DMA_CHANNEL) |
STM32_DMA_CR_PL(STM32_UART_UART5_DMA_PRIORITY);
}
@@ -804,7 +804,7 @@ void uart_lld_start(UARTDriver *uartp) { (stm32_dmaisr_t)uart_lld_serve_tx_end_irq,
(void *)uartp);
osalDbgAssert(!b, "stream already allocated");
- rccEnableUSART6(FALSE);
+ rccEnableUSART6(false);
uartp->dmamode |= STM32_DMA_CR_CHSEL(USART6_RX_DMA_CHANNEL) |
STM32_DMA_CR_PL(STM32_UART_USART6_DMA_PRIORITY);
}
@@ -823,7 +823,7 @@ void uart_lld_start(UARTDriver *uartp) { (stm32_dmaisr_t)uart_lld_serve_tx_end_irq,
(void *)uartp);
osalDbgAssert(!b, "stream already allocated");
- rccEnableUART7(FALSE);
+ rccEnableUART7(false);
uartp->dmamode |= STM32_DMA_CR_CHSEL(UART7_RX_DMA_CHANNEL) |
STM32_DMA_CR_PL(STM32_UART_UART7_DMA_PRIORITY);
}
@@ -842,7 +842,7 @@ void uart_lld_start(UARTDriver *uartp) { (stm32_dmaisr_t)uart_lld_serve_tx_end_irq,
(void *)uartp);
osalDbgAssert(!b, "stream already allocated");
- rccEnableUART8(FALSE);
+ rccEnableUART8(false);
uartp->dmamode |= STM32_DMA_CR_CHSEL(UART8_RX_DMA_CHANNEL) |
STM32_DMA_CR_PL(STM32_UART_UART8_DMA_PRIORITY);
}
@@ -878,56 +878,56 @@ void uart_lld_stop(UARTDriver *uartp) { #if STM32_UART_USE_USART1
if (&UARTD1 == uartp) {
- rccDisableUSART1(FALSE);
+ rccDisableUSART1();
return;
}
#endif
#if STM32_UART_USE_USART2
if (&UARTD2 == uartp) {
- rccDisableUSART2(FALSE);
+ rccDisableUSART2();
return;
}
#endif
#if STM32_UART_USE_USART3
if (&UARTD3 == uartp) {
- rccDisableUSART3(FALSE);
+ rccDisableUSART3();
return;
}
#endif
#if STM32_UART_USE_UART4
if (&UARTD4 == uartp) {
- rccDisableUART4(FALSE);
+ rccDisableUART4();
return;
}
#endif
#if STM32_UART_USE_UART5
if (&UARTD5 == uartp) {
- rccDisableUART5(FALSE);
+ rccDisableUART5();
return;
}
#endif
#if STM32_UART_USE_USART6
if (&UARTD6 == uartp) {
- rccDisableUSART6(FALSE);
+ rccDisableUSART6();
return;
}
#endif
#if STM32_UART_USE_UART7
if (&UARTD7 == uartp) {
- rccDisableUART7(FALSE);
+ rccDisableUART7();
return;
}
#endif
#if STM32_UART_USE_UART8
if (&UARTD8 == uartp) {
- rccDisableUART8(FALSE);
+ rccDisableUART8();
return;
}
#endif
diff --git a/os/hal/ports/STM32/LLD/USBv1/hal_usb_lld.c b/os/hal/ports/STM32/LLD/USBv1/hal_usb_lld.c index 8872771b2..9f5a56952 100644 --- a/os/hal/ports/STM32/LLD/USBv1/hal_usb_lld.c +++ b/os/hal/ports/STM32/LLD/USBv1/hal_usb_lld.c @@ -478,7 +478,7 @@ void usb_lld_start(USBDriver *usbp) { #if STM32_USB_USE_USB1
if (&USBD1 == usbp) {
/* USB clock enabled.*/
- rccEnableUSB(FALSE);
+ rccEnableUSB(false);
/* Powers up the transceiver while holding the USB in reset state.*/
STM32_USB->CNTR = CNTR_FRES;
/* Enabling the USB IRQ vectors, this also gives enough time to allow
@@ -514,7 +514,7 @@ void usb_lld_stop(USBDriver *usbp) { #endif
nvicDisableVector(STM32_USB1_LP_NUMBER);
STM32_USB->CNTR = CNTR_PDWN | CNTR_FRES;
- rccDisableUSB(FALSE);
+ rccDisableUSB();
}
#endif
}
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