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Diffstat (limited to 'os/hal/ports/STM32/LLD/DMAv3/stm32_dma.h')
-rw-r--r--os/hal/ports/STM32/LLD/DMAv3/stm32_dma.h70
1 files changed, 1 insertions, 69 deletions
diff --git a/os/hal/ports/STM32/LLD/DMAv3/stm32_dma.h b/os/hal/ports/STM32/LLD/DMAv3/stm32_dma.h
index ff9e19538..f6208f9e8 100644
--- a/os/hal/ports/STM32/LLD/DMAv3/stm32_dma.h
+++ b/os/hal/ports/STM32/LLD/DMAv3/stm32_dma.h
@@ -25,6 +25,7 @@
#ifndef STM32_DMA_H
#define STM32_DMA_H
+#include "cache.h"
#include "stm32_dmamux.h"
/*===========================================================================*/
@@ -171,10 +172,6 @@
/* Derived constants and error checks. */
/*===========================================================================*/
-#if !defined(STM32_DMA_CACHE_HANDLING)
-#error "STM32_DMA_CACHE_HANDLING missing in registry"
-#endif
-
#if !defined(STM32_HAS_DMA1)
#error "STM32_HAS_DMA1 missing in registry"
#endif
@@ -341,71 +338,6 @@ typedef void (*stm32_dmaisr_t)(void *p, uint32_t flags);
/* Driver macros. */
/*===========================================================================*/
-#if STM32_DMA_CACHE_HANDLING || defined(__DOXYGEN__)
-/**
- * @brief Invalidates the data cache lines overlapping a DMA buffer.
- * @details This function is meant to make sure that data written in
- * data cache is invalidated. It is used for DMA buffers that
- * must have been written by a DMA stream.
- * @note On devices without data cache this function does nothing.
- * @note The function does not consider the lower 5 bits of addresses,
- * the buffers are meant to be aligned to a 32 bytes boundary or
- * adjacent data can be invalidated as side effect.
- *
- * @param[in] saddr start address of the DMA buffer
- * @param[in] n size of the DMA buffer in bytes
- *
- * @api
- */
-#define dmaBufferInvalidate(saddr, n) { \
- uint8_t *start = (uint8_t *)(saddr); \
- uint8_t *end = start + (size_t)(n); \
- __DSB(); \
- while (start < end) { \
- SCB->DCIMVAC = (uint32_t)start; \
- start += 32U; \
- } \
- __DSB(); \
- __ISB(); \
-}
-
-/**
- * @brief Flushes the data cache lines overlapping a DMA buffer.
- * @details This function is meant to make sure that data written in
- * data cache is flushed to RAM. It is used for DMA buffers that
- * must be read by a DMA stream.
- * @note On devices without data cache this function does nothing.
- * @note The function does not consider the lower 5 bits of addresses,
- * the buffers are meant to be aligned to a 32 bytes boundary or
- * adjacent data can be flushed as side effect.
- *
- * @param[in] saddr start address of the DMA buffer
- * @param[in] n size of the DMA buffer in bytes
- *
- * @api
- */
-#define dmaBufferFlush(saddr, n) { \
- uint8_t *start = (uint8_t *)(saddr); \
- uint8_t *end = start + (size_t)(n); \
- __DSB(); \
- while (start < end) { \
- SCB->DCCIMVAC = (uint32_t)start; \
- start += 32U; \
- } \
- __DSB(); \
- __ISB(); \
-}
-#else
-#define dmaBufferInvalidate(addr, size) { \
- (void)(addr); \
- (void)(size); \
-}
-#define dmaBufferFlush(addr, size) { \
- (void)(addr); \
- (void)(size); \
-}
-#endif
-
/**
* @name Macro Functions
* @{