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Diffstat (limited to 'os/hal/ports/STM32/LLD/ADCv3/hal_adc_lld.h')
-rw-r--r--os/hal/ports/STM32/LLD/ADCv3/hal_adc_lld.h21
1 files changed, 20 insertions, 1 deletions
diff --git a/os/hal/ports/STM32/LLD/ADCv3/hal_adc_lld.h b/os/hal/ports/STM32/LLD/ADCv3/hal_adc_lld.h
index 27f3c6ff0..99a8f5244 100644
--- a/os/hal/ports/STM32/LLD/ADCv3/hal_adc_lld.h
+++ b/os/hal/ports/STM32/LLD/ADCv3/hal_adc_lld.h
@@ -494,7 +494,6 @@
/* Check on the presence of the DMA streams settings in mcuconf.h.*/
#if STM32_DMA_SUPPORTS_DMAMUX
-
#if STM32_ADC_USE_ADC1 && !defined(STM32_ADC_ADC1_DMA_CHANNEL)
#error "ADC1 DMA channel not defined"
#endif
@@ -552,6 +551,26 @@
#endif /* !STM32_DMA_SUPPORTS_DMAMUX */
+#if STM32_ADC_USE_ADC1 && \
+ !STM32_DMA_IS_VALID_PRIORITY(STM32_ADC_ADC1_DMA_PRIORITY)
+#error "Invalid DMA priority assigned to ADC1"
+#endif
+
+#if STM32_ADC_USE_ADC2 && \
+ !STM32_DMA_IS_VALID_PRIORITY(STM32_ADC_ADC2_DMA_PRIORITY)
+#error "Invalid DMA priority assigned to ADC2"
+#endif
+
+#if STM32_ADC_USE_ADC3 && \
+ !STM32_DMA_IS_VALID_PRIORITY(STM32_ADC_ADC3_DMA_PRIORITY)
+#error "Invalid DMA priority assigned to ADC3"
+#endif
+
+#if STM32_ADC_USE_ADC4 && \
+ !STM32_DMA_IS_VALID_PRIORITY(STM32_ADC_ADC4_DMA_PRIORITY)
+#error "Invalid DMA priority assigned to ADC4"
+#endif
+
/* ADC clock source checks.*/
#if defined(STM32F3XX)
#if STM32_ADC_ADC12_CLOCK_MODE == ADC_CCR_CKMODE_ADCCK