diff options
Diffstat (limited to 'os/hal/ports/AVR')
-rw-r--r-- | os/hal/ports/AVR/adc_lld.c | 2 | ||||
-rw-r--r-- | os/hal/ports/AVR/adc_lld.h | 2 | ||||
-rw-r--r-- | os/hal/ports/AVR/avr_pins.h | 188 | ||||
-rw-r--r-- | os/hal/ports/AVR/avr_timers.h | 96 | ||||
-rw-r--r-- | os/hal/ports/AVR/gpt_lld.c | 700 | ||||
-rw-r--r-- | os/hal/ports/AVR/gpt_lld.h | 2 | ||||
-rw-r--r-- | os/hal/ports/AVR/hal_lld.c | 2 | ||||
-rw-r--r-- | os/hal/ports/AVR/hal_lld.h | 2 | ||||
-rw-r--r-- | os/hal/ports/AVR/i2c_lld.c | 2 | ||||
-rw-r--r-- | os/hal/ports/AVR/i2c_lld.h | 2 | ||||
-rw-r--r-- | os/hal/ports/AVR/icu_lld.c | 2 | ||||
-rw-r--r-- | os/hal/ports/AVR/icu_lld.h | 2 | ||||
-rw-r--r-- | os/hal/ports/AVR/pal_lld.c | 2 | ||||
-rw-r--r-- | os/hal/ports/AVR/pal_lld.h | 2 | ||||
-rw-r--r-- | os/hal/ports/AVR/pwm_lld.c | 990 | ||||
-rw-r--r-- | os/hal/ports/AVR/pwm_lld.h | 2 | ||||
-rw-r--r-- | os/hal/ports/AVR/serial_lld.c | 2 | ||||
-rw-r--r-- | os/hal/ports/AVR/serial_lld.h | 2 | ||||
-rw-r--r-- | os/hal/ports/AVR/spi_lld.c | 2 | ||||
-rw-r--r-- | os/hal/ports/AVR/spi_lld.h | 2 | ||||
-rw-r--r-- | os/hal/ports/AVR/st_lld.c | 2 | ||||
-rw-r--r-- | os/hal/ports/AVR/st_lld.h | 2 |
22 files changed, 1005 insertions, 1005 deletions
diff --git a/os/hal/ports/AVR/adc_lld.c b/os/hal/ports/AVR/adc_lld.c index e41a2122e..02ea602e9 100644 --- a/os/hal/ports/AVR/adc_lld.c +++ b/os/hal/ports/AVR/adc_lld.c @@ -1,5 +1,5 @@ /*
- ChibiOS/RT - Copyright (C) 2006-2014 Giovanni Di Sirio
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/os/hal/ports/AVR/adc_lld.h b/os/hal/ports/AVR/adc_lld.h index 0126f2d3e..ce795a462 100644 --- a/os/hal/ports/AVR/adc_lld.h +++ b/os/hal/ports/AVR/adc_lld.h @@ -1,5 +1,5 @@ /*
- ChibiOS/RT - Copyright (C) 2006-2014 Giovanni Di Sirio
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/os/hal/ports/AVR/avr_pins.h b/os/hal/ports/AVR/avr_pins.h index fbdbfb703..956878f50 100644 --- a/os/hal/ports/AVR/avr_pins.h +++ b/os/hal/ports/AVR/avr_pins.h @@ -1,94 +1,94 @@ -/* - ChibiOS/RT - Copyright (C) 2006-2014 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -#ifndef _AVR_PINS_H_ -#define _AVR_PINS_H_ - -#include <avr/io.h> - -#if AVR_SPI_USE_SPI1 - -#if defined(__AVR_ATmega644__) || defined(__AVR_ATmega644P__) - #define PIN_SPI1 PINB - #define PORT_SPI1 PORTB - #define DDR_SPI1 DDRB - #define SPI1_SS 4 - #define SPI1_SCK 7 - #define SPI1_MOSI 5 - #define SPI1_MISO 6 -#elif defined(__AVR_ATmega328P__) - #define PIN_SPI1 PINB - #define PORT_SPI1 PORTB - #define DDR_SPI1 DDRB - #define SPI1_SS 2 - #define SPI1_SCK 5 - #define SPI1_MOSI 3 - #define SPI1_MISO 4 -#elif defined(__AVR_ATmega2560__) || \ - defined(__AVR_ATmega1280__) || \ - defined(__AVR_ATmega128__) - #define PIN_SPI1 PINB - #define PORT_SPI1 PORTB - #define DDR_SPI1 DDRB - #define SPI1_SS 0 - #define SPI1_SCK 1 - #define SPI1_MOSI 2 - #define SPI1_MISO 3 -#elif defined(__AVR_AT90CAN128__) || \ - defined(__AVR_AT90CAN64__) || \ - defined(__AVR_AT90CAN32__) - #define PIN_SPI1 PINB - #define PORT_SPI1 PORTB - #define DDR_SPI1 DDRB - #define SPI1_SS 0 - #define SPI1_SCK 1 - #define SPI1_MOSI 2 - #define SPI1_MISO 3 -#else - #warning "Device not supported by SPI driver" -#endif - -#endif /* AVR_SPI_USE_SPI1 */ - -#if AVR_ADC_USE_ADC1 - -#if defined(__AVR_ATmega644__) || defined(__AVR_ATmega644P__) - #define PINADC PINA - #define PORTADC PORTA - #define DDRADC DDRA -#elif defined(__AVR_ATmega328P__) - #define PINADC PINC - #define PORTADC PORTC - #define DDRADC DDRC -#elif defined(__AVR_ATmega2560__) || \ - defined(__AVR_ATmega1280__) || \ - defined(__AVR_ATmega128__) - #define PINADC PINF - #define PORTADC PORTF - #define DDRADC DDRF -#elif defined(__AVR_AT90CAN128__) || \ - defined(__AVR_AT90CAN64__) || \ - defined(__AVR_AT90CAN32__) - #define PINADC PINF - #define PORTADC PORTF - #define DDRADC DDRF -#else - #warning "Device not supported by ADC driver" -#endif - -#endif /* AVR_ADC_USE_ADC1 */ - -#endif /* _AVR_PINS_H_ */ +/*
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+#ifndef _AVR_PINS_H_
+#define _AVR_PINS_H_
+
+#include <avr/io.h>
+
+#if AVR_SPI_USE_SPI1
+
+#if defined(__AVR_ATmega644__) || defined(__AVR_ATmega644P__)
+ #define PIN_SPI1 PINB
+ #define PORT_SPI1 PORTB
+ #define DDR_SPI1 DDRB
+ #define SPI1_SS 4
+ #define SPI1_SCK 7
+ #define SPI1_MOSI 5
+ #define SPI1_MISO 6
+#elif defined(__AVR_ATmega328P__)
+ #define PIN_SPI1 PINB
+ #define PORT_SPI1 PORTB
+ #define DDR_SPI1 DDRB
+ #define SPI1_SS 2
+ #define SPI1_SCK 5
+ #define SPI1_MOSI 3
+ #define SPI1_MISO 4
+#elif defined(__AVR_ATmega2560__) || \
+ defined(__AVR_ATmega1280__) || \
+ defined(__AVR_ATmega128__)
+ #define PIN_SPI1 PINB
+ #define PORT_SPI1 PORTB
+ #define DDR_SPI1 DDRB
+ #define SPI1_SS 0
+ #define SPI1_SCK 1
+ #define SPI1_MOSI 2
+ #define SPI1_MISO 3
+#elif defined(__AVR_AT90CAN128__) || \
+ defined(__AVR_AT90CAN64__) || \
+ defined(__AVR_AT90CAN32__)
+ #define PIN_SPI1 PINB
+ #define PORT_SPI1 PORTB
+ #define DDR_SPI1 DDRB
+ #define SPI1_SS 0
+ #define SPI1_SCK 1
+ #define SPI1_MOSI 2
+ #define SPI1_MISO 3
+#else
+ #warning "Device not supported by SPI driver"
+#endif
+
+#endif /* AVR_SPI_USE_SPI1 */
+
+#if AVR_ADC_USE_ADC1
+
+#if defined(__AVR_ATmega644__) || defined(__AVR_ATmega644P__)
+ #define PINADC PINA
+ #define PORTADC PORTA
+ #define DDRADC DDRA
+#elif defined(__AVR_ATmega328P__)
+ #define PINADC PINC
+ #define PORTADC PORTC
+ #define DDRADC DDRC
+#elif defined(__AVR_ATmega2560__) || \
+ defined(__AVR_ATmega1280__) || \
+ defined(__AVR_ATmega128__)
+ #define PINADC PINF
+ #define PORTADC PORTF
+ #define DDRADC DDRF
+#elif defined(__AVR_AT90CAN128__) || \
+ defined(__AVR_AT90CAN64__) || \
+ defined(__AVR_AT90CAN32__)
+ #define PINADC PINF
+ #define PORTADC PORTF
+ #define DDRADC DDRF
+#else
+ #warning "Device not supported by ADC driver"
+#endif
+
+#endif /* AVR_ADC_USE_ADC1 */
+
+#endif /* _AVR_PINS_H_ */
diff --git a/os/hal/ports/AVR/avr_timers.h b/os/hal/ports/AVR/avr_timers.h index 5eb08cace..26b891937 100644 --- a/os/hal/ports/AVR/avr_timers.h +++ b/os/hal/ports/AVR/avr_timers.h @@ -1,48 +1,48 @@ -/* - ChibiOS/RT - Copyright (C) 2006-2014 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -#ifndef _AVR_TIMERS_H_ -#define _AVR_TIMERS_H_ - -#if ((AVR_GPT_USE_TIM1 && AVR_PWM_USE_TIM1) || \ - (AVR_GPT_USE_TIM1 && AVR_ICU_USE_TIM1) || \ - (AVR_PWM_USE_TIM1 && AVR_ICU_USE_TIM1)) - #error "Timer 1 cannot simultaneously be used by multiple drivers." -#endif - -#if ((AVR_GPT_USE_TIM2 && AVR_PWM_USE_TIM2)) - #error "Timer 2 cannot simultaneously be used by multiple drivers." -#endif - -#if ((AVR_GPT_USE_TIM3 && AVR_PWM_USE_TIM3) || \ - (AVR_GPT_USE_TIM3 && AVR_ICU_USE_TIM3) || \ - (AVR_PWM_USE_TIM3 && AVR_ICU_USE_TIM3)) - #error "Timer 3 cannot simultaneously be used by multiple drivers." -#endif - -#if ((AVR_GPT_USE_TIM4 && AVR_PWM_USE_TIM4) || \ - (AVR_GPT_USE_TIM4 && AVR_ICU_USE_TIM4) || \ - (AVR_PWM_USE_TIM4 && AVR_ICU_USE_TIM4)) - #error "Timer 4 cannot simultaneously be used by multiple drivers." -#endif - -#if ((AVR_GPT_USE_TIM5 && AVR_PWM_USE_TIM5) || \ - (AVR_GPT_USE_TIM5 && AVR_ICU_USE_TIM5) || \ - (AVR_PWM_USE_TIM5 && AVR_ICU_USE_TIM5)) - #error "Timer 5 cannot simultaneously be used by multiple drivers." -#endif - -#endif /* _AVR_TIMERS_H_ */ +/*
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+#ifndef _AVR_TIMERS_H_
+#define _AVR_TIMERS_H_
+
+#if ((AVR_GPT_USE_TIM1 && AVR_PWM_USE_TIM1) || \
+ (AVR_GPT_USE_TIM1 && AVR_ICU_USE_TIM1) || \
+ (AVR_PWM_USE_TIM1 && AVR_ICU_USE_TIM1))
+ #error "Timer 1 cannot simultaneously be used by multiple drivers."
+#endif
+
+#if ((AVR_GPT_USE_TIM2 && AVR_PWM_USE_TIM2))
+ #error "Timer 2 cannot simultaneously be used by multiple drivers."
+#endif
+
+#if ((AVR_GPT_USE_TIM3 && AVR_PWM_USE_TIM3) || \
+ (AVR_GPT_USE_TIM3 && AVR_ICU_USE_TIM3) || \
+ (AVR_PWM_USE_TIM3 && AVR_ICU_USE_TIM3))
+ #error "Timer 3 cannot simultaneously be used by multiple drivers."
+#endif
+
+#if ((AVR_GPT_USE_TIM4 && AVR_PWM_USE_TIM4) || \
+ (AVR_GPT_USE_TIM4 && AVR_ICU_USE_TIM4) || \
+ (AVR_PWM_USE_TIM4 && AVR_ICU_USE_TIM4))
+ #error "Timer 4 cannot simultaneously be used by multiple drivers."
+#endif
+
+#if ((AVR_GPT_USE_TIM5 && AVR_PWM_USE_TIM5) || \
+ (AVR_GPT_USE_TIM5 && AVR_ICU_USE_TIM5) || \
+ (AVR_PWM_USE_TIM5 && AVR_ICU_USE_TIM5))
+ #error "Timer 5 cannot simultaneously be used by multiple drivers."
+#endif
+
+#endif /* _AVR_TIMERS_H_ */
diff --git a/os/hal/ports/AVR/gpt_lld.c b/os/hal/ports/AVR/gpt_lld.c index 7eca439b0..4c97b7785 100644 --- a/os/hal/ports/AVR/gpt_lld.c +++ b/os/hal/ports/AVR/gpt_lld.c @@ -1,350 +1,350 @@ -/* - ChibiOS/RT - Copyright (C) 2006-2014 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/* - This driver is based on the work done by Matteo Serva available at - http://github.com/matteoserva/ChibiOS-AVR -*/ - -/** - * @file AVR/gpt_lld.c - * @brief AVR GPT driver subsystem low level driver. - * - * @addtogroup GPT - * @{ - */ - -#include "hal.h" - -#if HAL_USE_GPT || defined(__DOXYGEN__) - -/*===========================================================================*/ -/* Driver local definitions. */ -/*===========================================================================*/ - -#define PRESCALER_SIZE_BASE 5 -#define PRESCALER_SIZE_EXTENDED 7 - -// FIXME: could use better names here! -typedef struct { - volatile uint8_t *tccra; - volatile uint8_t *tccrb; - volatile uint8_t *ocr1; - volatile uint8_t *ocr2; - volatile uint8_t *tcnt1; - volatile uint8_t *tcnt2; - volatile uint8_t *tifr; - volatile uint8_t *timsk; -} timer_registers_t; - -const timer_registers_t regs_table[] = { -#if AVR_GPT_USE_TIM1 || defined(__DOXYGEN__) - { &TCCR1A, &TCCR1B, &OCR1AH, &OCR1AL, &TCNT1H, &TCNT1L, &TIFR1, &TIMSK1 }, -#endif -#if AVR_GPT_USE_TIM2 || defined(__DOXYGEN__) - { &TCCR2A, &TCCR2B, &OCR2A, &OCR2A, &TCNT2, &TCNT2, &TIFR2, &TIMSK2 }, -#endif -#if AVR_GPT_USE_TIM3 || defined(__DOXYGEN__) - { &TCCR3A, &TCCR3B, &OCR3AH, &OCR3AL, &TCNT3H, &TCNT3L, &TIFR3, &TIMSK3 }, -#endif -#if AVR_GPT_USE_TIM4 || defined(__DOXYGEN__) - { &TCCR4A, &TCCR4B, &OCR4AH, &OCR4AL, &TCNT4H, &TCNT4L, &TIFR4, &TIMSK4 }, -#endif -#if AVR_GPT_USE_TIM5 || defined(__DOXYGEN__) - { &TCCR5A, &TCCR5B, &OCR5AH, &OCR5AL, &TCNT5H, &TCNT5L, &TIFR5, &TIMSK5 }, -#endif -}; - -/*===========================================================================*/ -/* Driver exported variables. */ -/*===========================================================================*/ - -#if AVR_GPT_USE_TIM1 || defined(__DOXYGEN__) -GPTDriver GPTD1; -#endif -#if AVR_GPT_USE_TIM2 || defined(__DOXYGEN__) -GPTDriver GPTD2; -#endif -#if AVR_GPT_USE_TIM3 || defined(__DOXYGEN__) -GPTDriver GPTD3; -#endif -#if AVR_GPT_USE_TIM4 || defined(__DOXYGEN__) -GPTDriver GPTD4; -#endif -#if AVR_GPT_USE_TIM5 || defined(__DOXYGEN__) -GPTDriver GPTD5; -#endif - -/*===========================================================================*/ -/* Driver local variables. */ -/*===========================================================================*/ - -static uint16_t ratio_base[] = { 1024, 256, 64, 8, 1 }; -static uint8_t clock_source_base[]= { 5, 4, 3, 2, 1 }; -static uint16_t ratio_extended[] = { 1024, 256, 128, 64, 32, 8, 1 }; -static uint8_t clock_source_extended[] = { 7, 6, 5, 4, 3, 2, 1 }; - -/*===========================================================================*/ -/* Driver local functions. */ -/*===========================================================================*/ - -static uint8_t prescaler(uint16_t freq, uint16_t *ratio, uint8_t n) -{ - uint8_t i; - for (i = 0; i < n; ++i) { - uint32_t result = F_CPU / ratio[i] / freq; - if (result > 256UL) - return i - 1; - if ((result * ratio[i] * freq) == F_CPU) - return i; - } -} - -static void gpt_lld_serve_interrupt(GPTDriver *gptp) -{ - gptp->counter++; - if (gptp->counter == gptp->period) { - gptp->counter = 0; - if (gptp->state == GPT_ONESHOT) { - gptp->state = GPT_READY; /* Back in GPT_READY state. */ - gpt_lld_stop_timer(gptp); /* Timer automatically stopped. */ - } - gptp->callback(gptp); - } -} - -static void gpt_lld_dummy_callback(GPTDriver *gptp) -{ -} - -static uint8_t getTimerIndex(GPTDriver *gptp) -{ - uint8_t index = 0; -#if AVR_GPT_USE_TIM1 || defined(__DOXYGEN__) - if (gptp == &GPTD1) return index; - else index++; -#endif -#if AVR_GPT_USE_TIM2 || defined(__DOXYGEN__) - if (gptp == &GPTD2) return index; - else index++; -#endif -#if AVR_GPT_USE_TIM3 || defined(__DOXYGEN__) - if (gptp == &GPTD3) return index; - else index++; -#endif -#if AVR_GPT_USE_TIM4 || defined(__DOXYGEN__) - if (gptp == &GPTD4) return index; - else index++; -#endif -#if AVR_GPT_USE_TIM5 || defined(__DOXYGEN__) - if (gptp == &GPTD5) return index; - else index++; -#endif -} - -/*===========================================================================*/ -/* Driver interrupt handlers. */ -/*===========================================================================*/ - -#if AVR_GPT_USE_TIM1 || defined(__DOXYGEN__) -OSAL_IRQ_HANDLER(TIMER1_COMPA_vect) -{ - OSAL_IRQ_PROLOGUE(); - gpt_lld_serve_interrupt(&GPTD1); - OSAL_IRQ_EPILOGUE(); -} -#endif - -#if AVR_GPT_USE_TIM2 || defined(__DOXYGEN__) -OSAL_IRQ_HANDLER(TIMER2_COMPA_vect) -{ - OSAL_IRQ_PROLOGUE(); - gpt_lld_serve_interrupt(&GPTD2); - OSAL_IRQ_EPILOGUE(); -} -#endif - -#if AVR_GPT_USE_TIM3 || defined(__DOXYGEN__) -OSAL_IRQ_HANDLER(TIMER3_COMPA_vect) -{ - OSAL_IRQ_PROLOGUE(); - gpt_lld_serve_interrupt(&GPTD3); - OSAL_IRQ_EPILOGUE(); -} -#endif - -#if AVR_GPT_USE_TIM4 || defined(__DOXYGEN__) -OSAL_IRQ_HANDLER(TIMER4_COMPA_vect) -{ - OSAL_IRQ_PROLOGUE(); - gpt_lld_serve_interrupt(&GPTD4); - OSAL_IRQ_EPILOGUE(); -} -#endif - -#if AVR_GPT_USE_TIM5 || defined(__DOXYGEN__) -OSAL_IRQ_HANDLER(TIMER5_COMPA_vect) -{ - OSAL_IRQ_PROLOGUE(); - gpt_lld_serve_interrupt(&GPTD5); - OSAL_IRQ_EPILOGUE(); -} -#endif - -/*===========================================================================*/ -/* Driver exported functions. */ -/*===========================================================================*/ - -/** - * @brief Low level GPT driver initialization. - * - * @notapi - */ -void gpt_lld_init(void) -{ -#if AVR_GPT_USE_TIM1 || defined(__DOXYGEN__) - gptObjectInit(&GPTD1); -#endif -#if AVR_GPT_USE_TIM2 || defined(__DOXYGEN__) - gptObjectInit(&GPTD2); -#endif -#if AVR_GPT_USE_TIM3 || defined(__DOXYGEN__) - gptObjectInit(&GPTD3); -#endif -#if AVR_GPT_USE_TIM4 || defined(__DOXYGEN__) - gptObjectInit(&GPTD4); -#endif -#if AVR_GPT_USE_TIM5 || defined(__DOXYGEN__) - gptObjectInit(&GPTD5); -#endif -} - -/** - * @brief Configures and activates the GPT peripheral. - * - * @param[in] gptp pointer to the @p GPTDriver object - * - * @notapi - */ -void gpt_lld_start(GPTDriver *gptp) -{ - uint8_t psc; - - if (gptp->state == GPT_STOP) { - /* Clock activation.*/ - } - - /* Configuration.*/ - -#if AVR_GPT_USE_TIM2 || defined(__DOXYGEN__) - if (gptp == &GPTD2) { - psc = prescaler(gptp->config->frequency, ratio_extended, PRESCALER_SIZE_EXTENDED); - gptp->clock_source = clock_source_extended[psc] & 0x07; - TCCR2A = (1 << WGM21) | (0 << WGM20); - TCCR2B = (0 << WGM22); - OCR2A = F_CPU / ratio_extended[psc] /gptp->config->frequency - 1; - return; - } -#endif - - uint8_t i = getTimerIndex(gptp); - psc = prescaler(gptp->config->frequency, ratio_base, PRESCALER_SIZE_BASE); - gptp->clock_source = clock_source_base[psc] & 0x07; - *regs_table[i].tccra = (0 << WGM11) | - (0 << WGM10) | - (0 << COM1A1) | - (0 << COM1A0) | - (0 << COM1B1) | - (0 << COM1B0); - *regs_table[i].tccrb = (1 << WGM12); - *regs_table[i].ocr1 = 0; - *regs_table[i].ocr2 = F_CPU / ratio_base[psc] / gptp->config->frequency - 1; -} - -/** - * @brief Deactivates the GPT peripheral. - * - * @param[in] gptp pointer to the @p GPTDriver object - * - * @notapi - */ -void gpt_lld_stop(GPTDriver *gptp) -{ - /* nothing to be done */ - if (gptp->state == GPT_READY) { - /* Clock de-activation.*/ - } - gpt_lld_stop_timer(gptp); -} - -/** - * @brief Starts the timer in continuous mode. - * - * @param[in] gptp pointer to the @p GPTDriver object - * @param[in] period period in ticks - * - * @notapi - */ -void gpt_lld_start_timer(GPTDriver *gptp, gptcnt_t period) -{ - gptp->callback = gptp->config->callback; - gptp->period = period; - gptp->counter = 0; - - uint8_t i = getTimerIndex(gptp); - *regs_table[i].tcnt1 = 0; - *regs_table[i].tcnt2 = 0; - *regs_table[i].tifr = (1 << OCF1A); - *regs_table[i].timsk = (1 << OCIE1A); - *regs_table[i].tccrb |= (gptp->clock_source << CS10); -} - -/** - * @brief Stops the timer. - * - * @param[in] gptp pointer to the @p GPTDriver object - * - * @notapi - */ -void gpt_lld_stop_timer(GPTDriver *gptp) -{ - uint8_t i = getTimerIndex(gptp); - *regs_table[i].tccrb &= ~((7 << CS10) | (1 << OCIE1A)); - *regs_table[i].tifr = (1 << OCF1A); -} - -/** - * @brief Starts the timer in one shot mode and waits for completion. - * @details This function specifically polls the timer waiting for completion - * in order to not have extra delays caused by interrupt servicing, - * this function is only recommended for short delays. - * - * @param[in] gptp pointer to the @p GPTDriver object - * @param[in] interval time interval in ticks - * - * @notapi - */ -void gpt_lld_polled_delay(GPTDriver *gptp, gptcnt_t interval) -{ - gptp->callback = gpt_lld_dummy_callback; - gpt_lld_start_timer(gptp, interval); - //FIX - while (gptp->state != GPT_READY) {} -} - -#endif /* HAL_USE_GPT */ - -/** @} */ +/*
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+/*
+ This driver is based on the work done by Matteo Serva available at
+ http://github.com/matteoserva/ChibiOS-AVR
+*/
+
+/**
+ * @file AVR/gpt_lld.c
+ * @brief AVR GPT driver subsystem low level driver.
+ *
+ * @addtogroup GPT
+ * @{
+ */
+
+#include "hal.h"
+
+#if HAL_USE_GPT || defined(__DOXYGEN__)
+
+/*===========================================================================*/
+/* Driver local definitions. */
+/*===========================================================================*/
+
+#define PRESCALER_SIZE_BASE 5
+#define PRESCALER_SIZE_EXTENDED 7
+
+// FIXME: could use better names here!
+typedef struct {
+ volatile uint8_t *tccra;
+ volatile uint8_t *tccrb;
+ volatile uint8_t *ocr1;
+ volatile uint8_t *ocr2;
+ volatile uint8_t *tcnt1;
+ volatile uint8_t *tcnt2;
+ volatile uint8_t *tifr;
+ volatile uint8_t *timsk;
+} timer_registers_t;
+
+const timer_registers_t regs_table[] = {
+#if AVR_GPT_USE_TIM1 || defined(__DOXYGEN__)
+ { &TCCR1A, &TCCR1B, &OCR1AH, &OCR1AL, &TCNT1H, &TCNT1L, &TIFR1, &TIMSK1 },
+#endif
+#if AVR_GPT_USE_TIM2 || defined(__DOXYGEN__)
+ { &TCCR2A, &TCCR2B, &OCR2A, &OCR2A, &TCNT2, &TCNT2, &TIFR2, &TIMSK2 },
+#endif
+#if AVR_GPT_USE_TIM3 || defined(__DOXYGEN__)
+ { &TCCR3A, &TCCR3B, &OCR3AH, &OCR3AL, &TCNT3H, &TCNT3L, &TIFR3, &TIMSK3 },
+#endif
+#if AVR_GPT_USE_TIM4 || defined(__DOXYGEN__)
+ { &TCCR4A, &TCCR4B, &OCR4AH, &OCR4AL, &TCNT4H, &TCNT4L, &TIFR4, &TIMSK4 },
+#endif
+#if AVR_GPT_USE_TIM5 || defined(__DOXYGEN__)
+ { &TCCR5A, &TCCR5B, &OCR5AH, &OCR5AL, &TCNT5H, &TCNT5L, &TIFR5, &TIMSK5 },
+#endif
+};
+
+/*===========================================================================*/
+/* Driver exported variables. */
+/*===========================================================================*/
+
+#if AVR_GPT_USE_TIM1 || defined(__DOXYGEN__)
+GPTDriver GPTD1;
+#endif
+#if AVR_GPT_USE_TIM2 || defined(__DOXYGEN__)
+GPTDriver GPTD2;
+#endif
+#if AVR_GPT_USE_TIM3 || defined(__DOXYGEN__)
+GPTDriver GPTD3;
+#endif
+#if AVR_GPT_USE_TIM4 || defined(__DOXYGEN__)
+GPTDriver GPTD4;
+#endif
+#if AVR_GPT_USE_TIM5 || defined(__DOXYGEN__)
+GPTDriver GPTD5;
+#endif
+
+/*===========================================================================*/
+/* Driver local variables. */
+/*===========================================================================*/
+
+static uint16_t ratio_base[] = { 1024, 256, 64, 8, 1 };
+static uint8_t clock_source_base[]= { 5, 4, 3, 2, 1 };
+static uint16_t ratio_extended[] = { 1024, 256, 128, 64, 32, 8, 1 };
+static uint8_t clock_source_extended[] = { 7, 6, 5, 4, 3, 2, 1 };
+
+/*===========================================================================*/
+/* Driver local functions. */
+/*===========================================================================*/
+
+static uint8_t prescaler(uint16_t freq, uint16_t *ratio, uint8_t n)
+{
+ uint8_t i;
+ for (i = 0; i < n; ++i) {
+ uint32_t result = F_CPU / ratio[i] / freq;
+ if (result > 256UL)
+ return i - 1;
+ if ((result * ratio[i] * freq) == F_CPU)
+ return i;
+ }
+}
+
+static void gpt_lld_serve_interrupt(GPTDriver *gptp)
+{
+ gptp->counter++;
+ if (gptp->counter == gptp->period) {
+ gptp->counter = 0;
+ if (gptp->state == GPT_ONESHOT) {
+ gptp->state = GPT_READY; /* Back in GPT_READY state. */
+ gpt_lld_stop_timer(gptp); /* Timer automatically stopped. */
+ }
+ gptp->callback(gptp);
+ }
+}
+
+static void gpt_lld_dummy_callback(GPTDriver *gptp)
+{
+}
+
+static uint8_t getTimerIndex(GPTDriver *gptp)
+{
+ uint8_t index = 0;
+#if AVR_GPT_USE_TIM1 || defined(__DOXYGEN__)
+ if (gptp == &GPTD1) return index;
+ else index++;
+#endif
+#if AVR_GPT_USE_TIM2 || defined(__DOXYGEN__)
+ if (gptp == &GPTD2) return index;
+ else index++;
+#endif
+#if AVR_GPT_USE_TIM3 || defined(__DOXYGEN__)
+ if (gptp == &GPTD3) return index;
+ else index++;
+#endif
+#if AVR_GPT_USE_TIM4 || defined(__DOXYGEN__)
+ if (gptp == &GPTD4) return index;
+ else index++;
+#endif
+#if AVR_GPT_USE_TIM5 || defined(__DOXYGEN__)
+ if (gptp == &GPTD5) return index;
+ else index++;
+#endif
+}
+
+/*===========================================================================*/
+/* Driver interrupt handlers. */
+/*===========================================================================*/
+
+#if AVR_GPT_USE_TIM1 || defined(__DOXYGEN__)
+OSAL_IRQ_HANDLER(TIMER1_COMPA_vect)
+{
+ OSAL_IRQ_PROLOGUE();
+ gpt_lld_serve_interrupt(&GPTD1);
+ OSAL_IRQ_EPILOGUE();
+}
+#endif
+
+#if AVR_GPT_USE_TIM2 || defined(__DOXYGEN__)
+OSAL_IRQ_HANDLER(TIMER2_COMPA_vect)
+{
+ OSAL_IRQ_PROLOGUE();
+ gpt_lld_serve_interrupt(&GPTD2);
+ OSAL_IRQ_EPILOGUE();
+}
+#endif
+
+#if AVR_GPT_USE_TIM3 || defined(__DOXYGEN__)
+OSAL_IRQ_HANDLER(TIMER3_COMPA_vect)
+{
+ OSAL_IRQ_PROLOGUE();
+ gpt_lld_serve_interrupt(&GPTD3);
+ OSAL_IRQ_EPILOGUE();
+}
+#endif
+
+#if AVR_GPT_USE_TIM4 || defined(__DOXYGEN__)
+OSAL_IRQ_HANDLER(TIMER4_COMPA_vect)
+{
+ OSAL_IRQ_PROLOGUE();
+ gpt_lld_serve_interrupt(&GPTD4);
+ OSAL_IRQ_EPILOGUE();
+}
+#endif
+
+#if AVR_GPT_USE_TIM5 || defined(__DOXYGEN__)
+OSAL_IRQ_HANDLER(TIMER5_COMPA_vect)
+{
+ OSAL_IRQ_PROLOGUE();
+ gpt_lld_serve_interrupt(&GPTD5);
+ OSAL_IRQ_EPILOGUE();
+}
+#endif
+
+/*===========================================================================*/
+/* Driver exported functions. */
+/*===========================================================================*/
+
+/**
+ * @brief Low level GPT driver initialization.
+ *
+ * @notapi
+ */
+void gpt_lld_init(void)
+{
+#if AVR_GPT_USE_TIM1 || defined(__DOXYGEN__)
+ gptObjectInit(&GPTD1);
+#endif
+#if AVR_GPT_USE_TIM2 || defined(__DOXYGEN__)
+ gptObjectInit(&GPTD2);
+#endif
+#if AVR_GPT_USE_TIM3 || defined(__DOXYGEN__)
+ gptObjectInit(&GPTD3);
+#endif
+#if AVR_GPT_USE_TIM4 || defined(__DOXYGEN__)
+ gptObjectInit(&GPTD4);
+#endif
+#if AVR_GPT_USE_TIM5 || defined(__DOXYGEN__)
+ gptObjectInit(&GPTD5);
+#endif
+}
+
+/**
+ * @brief Configures and activates the GPT peripheral.
+ *
+ * @param[in] gptp pointer to the @p GPTDriver object
+ *
+ * @notapi
+ */
+void gpt_lld_start(GPTDriver *gptp)
+{
+ uint8_t psc;
+
+ if (gptp->state == GPT_STOP) {
+ /* Clock activation.*/
+ }
+
+ /* Configuration.*/
+
+#if AVR_GPT_USE_TIM2 || defined(__DOXYGEN__)
+ if (gptp == &GPTD2) {
+ psc = prescaler(gptp->config->frequency, ratio_extended, PRESCALER_SIZE_EXTENDED);
+ gptp->clock_source = clock_source_extended[psc] & 0x07;
+ TCCR2A = (1 << WGM21) | (0 << WGM20);
+ TCCR2B = (0 << WGM22);
+ OCR2A = F_CPU / ratio_extended[psc] /gptp->config->frequency - 1;
+ return;
+ }
+#endif
+
+ uint8_t i = getTimerIndex(gptp);
+ psc = prescaler(gptp->config->frequency, ratio_base, PRESCALER_SIZE_BASE);
+ gptp->clock_source = clock_source_base[psc] & 0x07;
+ *regs_table[i].tccra = (0 << WGM11) |
+ (0 << WGM10) |
+ (0 << COM1A1) |
+ (0 << COM1A0) |
+ (0 << COM1B1) |
+ (0 << COM1B0);
+ *regs_table[i].tccrb = (1 << WGM12);
+ *regs_table[i].ocr1 = 0;
+ *regs_table[i].ocr2 = F_CPU / ratio_base[psc] / gptp->config->frequency - 1;
+}
+
+/**
+ * @brief Deactivates the GPT peripheral.
+ *
+ * @param[in] gptp pointer to the @p GPTDriver object
+ *
+ * @notapi
+ */
+void gpt_lld_stop(GPTDriver *gptp)
+{
+ /* nothing to be done */
+ if (gptp->state == GPT_READY) {
+ /* Clock de-activation.*/
+ }
+ gpt_lld_stop_timer(gptp);
+}
+
+/**
+ * @brief Starts the timer in continuous mode.
+ *
+ * @param[in] gptp pointer to the @p GPTDriver object
+ * @param[in] period period in ticks
+ *
+ * @notapi
+ */
+void gpt_lld_start_timer(GPTDriver *gptp, gptcnt_t period)
+{
+ gptp->callback = gptp->config->callback;
+ gptp->period = period;
+ gptp->counter = 0;
+
+ uint8_t i = getTimerIndex(gptp);
+ *regs_table[i].tcnt1 = 0;
+ *regs_table[i].tcnt2 = 0;
+ *regs_table[i].tifr = (1 << OCF1A);
+ *regs_table[i].timsk = (1 << OCIE1A);
+ *regs_table[i].tccrb |= (gptp->clock_source << CS10);
+}
+
+/**
+ * @brief Stops the timer.
+ *
+ * @param[in] gptp pointer to the @p GPTDriver object
+ *
+ * @notapi
+ */
+void gpt_lld_stop_timer(GPTDriver *gptp)
+{
+ uint8_t i = getTimerIndex(gptp);
+ *regs_table[i].tccrb &= ~((7 << CS10) | (1 << OCIE1A));
+ *regs_table[i].tifr = (1 << OCF1A);
+}
+
+/**
+ * @brief Starts the timer in one shot mode and waits for completion.
+ * @details This function specifically polls the timer waiting for completion
+ * in order to not have extra delays caused by interrupt servicing,
+ * this function is only recommended for short delays.
+ *
+ * @param[in] gptp pointer to the @p GPTDriver object
+ * @param[in] interval time interval in ticks
+ *
+ * @notapi
+ */
+void gpt_lld_polled_delay(GPTDriver *gptp, gptcnt_t interval)
+{
+ gptp->callback = gpt_lld_dummy_callback;
+ gpt_lld_start_timer(gptp, interval);
+ //FIX
+ while (gptp->state != GPT_READY) {}
+}
+
+#endif /* HAL_USE_GPT */
+
+/** @} */
diff --git a/os/hal/ports/AVR/gpt_lld.h b/os/hal/ports/AVR/gpt_lld.h index ecc2a167f..456e3ca29 100644 --- a/os/hal/ports/AVR/gpt_lld.h +++ b/os/hal/ports/AVR/gpt_lld.h @@ -1,5 +1,5 @@ /*
- ChibiOS/RT - Copyright (C) 2006-2014 Giovanni Di Sirio
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/os/hal/ports/AVR/hal_lld.c b/os/hal/ports/AVR/hal_lld.c index 5ff05a67c..894d5dcc5 100644 --- a/os/hal/ports/AVR/hal_lld.c +++ b/os/hal/ports/AVR/hal_lld.c @@ -1,5 +1,5 @@ /*
- ChibiOS/RT - Copyright (C) 2006-2014 Giovanni Di Sirio
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/os/hal/ports/AVR/hal_lld.h b/os/hal/ports/AVR/hal_lld.h index 810e1614b..c72063ac0 100644 --- a/os/hal/ports/AVR/hal_lld.h +++ b/os/hal/ports/AVR/hal_lld.h @@ -1,5 +1,5 @@ /*
- ChibiOS/RT - Copyright (C) 2006-2014 Giovanni Di Sirio
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/os/hal/ports/AVR/i2c_lld.c b/os/hal/ports/AVR/i2c_lld.c index fb528a313..b82531686 100644 --- a/os/hal/ports/AVR/i2c_lld.c +++ b/os/hal/ports/AVR/i2c_lld.c @@ -1,5 +1,5 @@ /*
- ChibiOS/RT - Copyright (C) 2006-2014 Giovanni Di Sirio
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/os/hal/ports/AVR/i2c_lld.h b/os/hal/ports/AVR/i2c_lld.h index 6b38bc48e..6b2539d6d 100644 --- a/os/hal/ports/AVR/i2c_lld.h +++ b/os/hal/ports/AVR/i2c_lld.h @@ -1,5 +1,5 @@ /*
- ChibiOS/RT - Copyright (C) 2006-2014 Giovanni Di Sirio
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/os/hal/ports/AVR/icu_lld.c b/os/hal/ports/AVR/icu_lld.c index bfdc6f1cf..85e3fe88b 100644 --- a/os/hal/ports/AVR/icu_lld.c +++ b/os/hal/ports/AVR/icu_lld.c @@ -1,5 +1,5 @@ /*
- ChibiOS/RT - Copyright (C) 2006-2014 Giovanni Di Sirio
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/os/hal/ports/AVR/icu_lld.h b/os/hal/ports/AVR/icu_lld.h index 5daf66f0c..5dbd2f8fd 100644 --- a/os/hal/ports/AVR/icu_lld.h +++ b/os/hal/ports/AVR/icu_lld.h @@ -1,5 +1,5 @@ /*
- ChibiOS/RT - Copyright (C) 2006-2014 Giovanni Di Sirio
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/os/hal/ports/AVR/pal_lld.c b/os/hal/ports/AVR/pal_lld.c index 175a1b7b8..c9635be00 100644 --- a/os/hal/ports/AVR/pal_lld.c +++ b/os/hal/ports/AVR/pal_lld.c @@ -1,5 +1,5 @@ /*
- ChibiOS/RT - Copyright (C) 2006-2014 Giovanni Di Sirio
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/os/hal/ports/AVR/pal_lld.h b/os/hal/ports/AVR/pal_lld.h index ff6705f4a..cdd7e71ea 100644 --- a/os/hal/ports/AVR/pal_lld.h +++ b/os/hal/ports/AVR/pal_lld.h @@ -1,5 +1,5 @@ /*
- ChibiOS/RT - Copyright (C) 2006-2014 Giovanni Di Sirio
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/os/hal/ports/AVR/pwm_lld.c b/os/hal/ports/AVR/pwm_lld.c index 450d57b78..7a5dc014e 100644 --- a/os/hal/ports/AVR/pwm_lld.c +++ b/os/hal/ports/AVR/pwm_lld.c @@ -1,495 +1,495 @@ -/* - ChibiOS/RT - Copyright (C) 2006-2014 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/* - This driver is based on the work done by Matteo Serva available at - http://github.com/matteoserva/ChibiOS-AVR -*/ - -/** - * @file AVR/pwm_lld.c - * @brief AVR PWM driver subsystem low level driver. - * - * @addtogroup PWM - * @{ - */ - -#include "hal.h" - -#if HAL_USE_PWM || defined(__DOXYGEN__) - -/*===========================================================================*/ -/* Driver local definitions. */ -/*===========================================================================*/ - -typedef struct { - volatile uint8_t *tccra; - volatile uint8_t *tccrb; - volatile uint8_t *ocrah; - volatile uint8_t *ocral; - volatile uint8_t *ocrbh; - volatile uint8_t *ocrbl; - volatile uint8_t *ocrch; - volatile uint8_t *ocrcl; - volatile uint8_t *tifr; - volatile uint8_t *timsk; -} timer_registers_t; - -static timer_registers_t regs_table[]= -{ -#if AVR_PWM_USE_TIM1 || defined(__DOXYGEN__) -#if defined(OCR1C) - {&TCCR1A, &TCCR1B, &OCR1AH, &OCR1AL, &OCR1BH, &OCR1BL, &OCR1CH, &OCR1CL, &TIFR1, &TIMSK1}, -#else - {&TCCR1A, &TCCR1B, &OCR1AH, &OCR1AL, &OCR1BH, &OCR1BL, NULL, NULL, &TIFR1, &TIMSK1}, -#endif -#endif -#if AVR_PWM_USE_TIM2 || defined(__DOXYGEN__) - {&TCCR2A, &TCCR2B, &OCR2A, &OCR2A, &OCR2B, &OCR2B, NULL, NULL, &TIFR2, &TIMSK2}, -#endif -#if AVR_PWM_USE_TIM3 || defined(__DOXYGEN__) - {&TCCR3A, &TCCR3B, &OCR3AH, &OCR3AL, &OCR3BH, &OCR3BL, &OCR3CH, &OCR3CL, &TIFR3, &TIMSK3}, -#endif -#if AVR_PWM_USE_TIM4 || defined(__DOXYGEN__) - {&TCCR4A, &TCCR4B, &OCR4AH, &OCR4AL, &OCR4CH, &OCR4CL, &OCR4CH, &OCR4CL, &TIFR4, &TIMSK4}, -#endif -#if AVR_PWM_USE_TIM5 || defined(__DOXYGEN__) - {&TCCR5A, &TCCR5B, &OCR5AH, &OCR5AL, &OCR5BH, &OCR5BL, &OCR5CH, &OCR5CL, &TIFR5, &TIMSK5}, -#endif -}; - -/*===========================================================================*/ -/* Driver exported variables. */ -/*===========================================================================*/ - -/** @brief PWM driver identifiers.*/ -#if AVR_PWM_USE_TIM1 || defined(__DOXYGEN__) -PWMDriver PWMD1; -#endif -#if AVR_PWM_USE_TIM2 || defined(__DOXYGEN__) -PWMDriver PWMD2; -#endif -#if AVR_PWM_USE_TIM3 || defined(__DOXYGEN__) -PWMDriver PWMD3; -#endif -#if AVR_PWM_USE_TIM4 || defined(__DOXYGEN__) -PWMDriver PWMD4; -#endif -#if AVR_PWM_USE_TIM5 || defined(__DOXYGEN__) -PWMDriver PWMD5; -#endif - -/*===========================================================================*/ -/* Driver local variables. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver local functions. */ -/*===========================================================================*/ - -static void config_channel(volatile uint8_t *tccra, - uint8_t com1, - uint8_t com0, - pwmmode_t mode) -{ - *tccra &= ~((1 << com1) | (1 << com0)); - if (mode == PWM_OUTPUT_ACTIVE_HIGH) - *tccra |= ((1 << com1) | (0 << com0)); /* non inverting mode */ - else if (mode == PWM_OUTPUT_ACTIVE_LOW) - *tccra |= (1 << com1) | (1 << com0); /* inverting mode */ -} - -static uint8_t timer_index(PWMDriver *pwmp) -{ - uint8_t index = 0; - -#if AVR_PWM_USE_TIM1 || defined(__DOXYGEN__) - if (pwmp == &PWMD1) return index; - else index++; -#endif -#if AVR_PWM_USE_TIM2 || defined(__DOXYGEN__) - if (pwmp == &PWMD2) return index; - else index++; -#endif -#if AVR_PWM_USE_TIM3 || defined(__DOXYGEN__) - if (pwmp == &PWMD3) return index; - else index++; -#endif -#if AVR_PWM_USE_TIM4 || defined(__DOXYGEN__) - if (pwmp == &PWMD4) return index; - else index++; -#endif -#if AVR_PWM_USE_TIM5 || defined(__DOXYGEN__) - if (pwmp == &PWMD5) return index; - else index++; -#endif - - /* This is an error! */ - return index; -} - -/*===========================================================================*/ -/* Driver interrupt handlers. */ -/*===========================================================================*/ - -/* - * interrupt for compare1&2 and clock overflow. pwmd1 & pwmd2 - */ -#if AVR_PWM_USE_TIM1 || defined(__DOXYGEN__) -OSAL_IRQ_HANDLER(TIMER1_OVF_vect) -{ - OSAL_IRQ_PROLOGUE(); - PWMD1.config->callback(&PWMD1); - OSAL_IRQ_EPILOGUE(); -} - -OSAL_IRQ_HANDLER(TIMER1_COMPA_vect) -{ - OSAL_IRQ_PROLOGUE(); - PWMD1.config->channels[0].callback(&PWMD1); - OSAL_IRQ_EPILOGUE(); -} - -OSAL_IRQ_HANDLER(TIMER1_COMPB_vect) -{ - OSAL_IRQ_PROLOGUE(); - PWMD1.config->channels[1].callback(&PWMD1); - OSAL_IRQ_EPILOGUE(); -} -#if PWM_CHANNELS > 2 -OSAL_IRQ_HANDLER(TIMER1_COMPC_vect) -{ - OSAL_IRQ_PROLOGUE(); - PWMD1.config->channels[2].callback(&PWMD1); - OSAL_IRQ_EPILOGUE(); -} -#endif -#endif - -#if AVR_PWM_USE_TIM2 || defined(__DOXYGEN__) -OSAL_IRQ_HANDLER(TIMER2_OVF_vect) -{ - OSAL_IRQ_PROLOGUE(); - PWMD2.config->callback(&PWMD2); - OSAL_IRQ_EPILOGUE(); -} - -OSAL_IRQ_HANDLER(TIMER2_COMPA_vect) -{ - OSAL_IRQ_PROLOGUE(); - PWMD2.config->channels[0].callback(&PWMD2); - OSAL_IRQ_EPILOGUE(); -} - -OSAL_IRQ_HANDLER(TIMER2_COMPB_vect) -{ - OSAL_IRQ_PROLOGUE(); - PWMD2.config->channels[1].callback(&PWMD2); - OSAL_IRQ_EPILOGUE(); -} -#endif - -#if AVR_PWM_USE_TIM3 || defined(__DOXYGEN__) -OSAL_IRQ_HANDLER(TIMER3_OVF_vect) -{ - OSAL_IRQ_PROLOGUE(); - PWMD3.config->callback(&PWMD3); - OSAL_IRQ_EPILOGUE(); -} - -OSAL_IRQ_HANDLER(TIMER3_COMPA_vect) -{ - OSAL_IRQ_PROLOGUE(); - PWMD3.config->channels[0].callback(&PWMD3); - OSAL_IRQ_EPILOGUE(); -} - -OSAL_IRQ_HANDLER(TIMER3_COMPB_vect) -{ - OSAL_IRQ_PROLOGUE(); - PWMD3.config->channels[1].callback(&PWMD3); - OSAL_IRQ_EPILOGUE(); -} - -OSAL_IRQ_HANDLER(TIMER3_COMPC_vect) -{ - OSAL_IRQ_PROLOGUE(); - PWMD3.config->channels[2].callback(&PWMD3); - OSAL_IRQ_EPILOGUE(); -} -#endif - -#if AVR_PWM_USE_TIM4 || defined(__DOXYGEN__) -OSAL_IRQ_HANDLER(TIMER4_OVF_vect) -{ - OSAL_IRQ_PROLOGUE(); - PWMD4.config->callback(&PWMD4); - OSAL_IRQ_EPILOGUE(); -} - -OSAL_IRQ_HANDLER(TIMER4_COMPA_vect) -{ - OSAL_IRQ_PROLOGUE(); - PWMD4.config->channels[0].callback(&PWMD4); - OSAL_IRQ_EPILOGUE(); -} - -OSAL_IRQ_HANDLER(TIMER4_COMPB_vect) -{ - OSAL_IRQ_PROLOGUE(); - PWMD4.config->channels[1].callback(&PWMD4); - OSAL_IRQ_EPILOGUE(); -} - -OSAL_IRQ_HANDLER(TIMER4_COMPC_vect) -{ - OSAL_IRQ_PROLOGUE(); - PWMD4.config->channels[2].callback(&PWMD4); - OSAL_IRQ_EPILOGUE(); -} -#endif - -#if AVR_PWM_USE_TIM5 || defined(__DOXYGEN__) -OSAL_IRQ_HANDLER(TIMER5_OVF_vect) -{ - OSAL_IRQ_PROLOGUE(); - PWMD5.config->callback(&PWMD5); - OSAL_IRQ_EPILOGUE(); -} - -OSAL_IRQ_HANDLER(TIMER5_COMPA_vect) -{ - OSAL_IRQ_PROLOGUE(); - PWMD5.config->channels[0].callback(&PWMD5); - OSAL_IRQ_EPILOGUE(); -} - -OSAL_IRQ_HANDLER(TIMER5_COMPB_vect) -{ - OSAL_IRQ_PROLOGUE(); - PWMD5.config->channels[1].callback(&PWMD5); - OSAL_IRQ_EPILOGUE(); -} - -OSAL_IRQ_HANDLER(TIMER5_COMPC_vect) -{ - OSAL_IRQ_PROLOGUE(); - PWMD5.config->channels[2].callback(&PWMD5); - OSAL_IRQ_EPILOGUE(); -} -#endif - -/*===========================================================================*/ -/* Driver exported functions. */ -/*===========================================================================*/ - -/** - * @brief Low level PWM driver initialization. - * - * @notapi - */ -void pwm_lld_init(void) -{ -#if AVR_PWM_USE_TIM1 || defined(__DOXYGEN__) - pwmObjectInit(&PWMD1); - TCCR1A = (1 << WGM11) | (1 << WGM10); - TCCR1B = (0 << WGM13) | (1 << WGM12); -#endif - -#if AVR_PWM_USE_TIM2 || defined(__DOXYGEN__) - pwmObjectInit(&PWMD2); - TCCR2A = (1 << WGM21) | (1 << WGM20); - TCCR2B = (0 << WGM22); -#endif - -#if AVR_PWM_USE_TIM3 || defined(__DOXYGEN__) - pwmObjectInit(&PWMD3); - TCCR3A = (1 << WGM31) | (1 << WGM30); - TCCR3B = (0 << WGM33) | (1 << WGM32); -#endif - -#if AVR_PWM_USE_TIM4 || defined(__DOXYGEN__) - pwmObjectInit(&PWMD4); - TCCR4A = (1 << WGM41) | (1 << WGM40); - TCCR4B = (0 << WGM43) | (1 << WGM42); -#endif - -#if AVR_PWM_USE_TIM5 || defined(__DOXYGEN__) - pwmObjectInit(&PWMD5); - TCCR5A = (1 << WGM51) | (1 << WGM50); - TCCR5B = (0 << WGM53) | (1 << WGM52); -#endif -} - -/** - * @brief Configures and activates the PWM peripheral. - * - * @param[in] pwmp pointer to the @p PWMDriver object - * - * @notapi - */ -void pwm_lld_start(PWMDriver *pwmp) -{ - if (pwmp->state == PWM_STOP) { - -#if AVR_PWM_USE_TIM2 || defined(__DOXYGEN__) - if (pwmp == &PWMD2) { - TCCR2B &= ~((1 << CS22) | (1 << CS21)); - TCCR2B |= (1 << CS20); - if (pwmp->config->callback != NULL) - TIMSK2 |= (1 << TOIE2); - return; - } -#endif - - /* TODO: support other prescaler options */ - - uint8_t i = timer_index(pwmp); - *regs_table[i].tccrb &= ~(1 << CS11); - *regs_table[i].tccrb |= (1 << CS12) | (1 << CS10); - *regs_table[i].timsk = (1 << TOIE1); - } -} - -/** - * @brief Deactivates the PWM peripheral. - * - * @param[in] pwmp pointer to the @p PWMDriver object - * - * @notapi - */ -void pwm_lld_stop(PWMDriver *pwmp) -{ - uint8_t i = timer_index(pwmp); - *regs_table[i].tccrb &= ~((1 << CS12) | (1 << CS11) | (1 << CS10)); - *regs_table[i].timsk = 0; -} - -/** - * @brief Changes the period the PWM peripheral. - * @details This function changes the period of a PWM unit that has already - * been activated using @p pwmStart(). - * @pre The PWM unit must have been activated using @p pwmStart(). - * @post The PWM unit period is changed to the new value. - * @note The function has effect at the next cycle start. - * @note If a period is specified that is shorter than the pulse width - * programmed in one of the channels then the behavior is not - * guaranteed. - * - * @param[in] pwmp pointer to a @p PWMDriver object - * @param[in] period new cycle time in ticks - * - * @notapi - */ -void pwm_lld_change_period(PWMDriver *pwmp, pwmcnt_t period) -{ -} - -/** - * @brief Enables a PWM channel. - * @pre The PWM unit must have been activated using @p pwmStart(). - * @post The channel is active using the specified configuration. - * @note Depending on the hardware implementation this function has - * effect starting on the next cycle (recommended implementation) - * or immediately (fallback implementation). - * - * @param[in] pwmp pointer to a @p PWMDriver object - * @param[in] channel PWM channel identifier (0...PWM_CHANNELS-1) - * @param[in] width PWM pulse width as clock pulses number - * - * @notapi - */ -void pwm_lld_enable_channel(PWMDriver *pwmp, - pwmchannel_t channel, - pwmcnt_t width) -{ - uint16_t val = width; - if (val > MAX_PWM_VALUE) - val = MAX_PWM_VALUE; - -#if AVR_PWM_USE_TIM2 || defined(__DOXYGEN__) - if (pwmp == &PWMD2) { - config_channel(&TCCR2A, - 7 - 2*channel, - 6 - 2*channel, - pwmp->config->channels[channel].mode); - TIMSK2 |= (1 << (channel + 1)); - /* Timer 2 is 8 bit */ - if (val > 0xFF) - val = 0xFF; - if (pwmp->config->channels[channel].callback) { - switch (channel) { - case 0: OCR2A = val; break; - case 1: OCR2B = val; break; - } - } - return; - } -#endif - - uint8_t i = timer_index(pwmp); - config_channel(regs_table[i].tccra, - 7 - 2*channel, - 6 - 2*channel, - pwmp->config->channels[channel].mode); - volatile uint8_t *ocrh, *ocrl; - switch (channel) { - case 1: - ocrh = regs_table[i].ocrbh; - ocrl = regs_table[i].ocrbl; - break; - case 2: - ocrh = regs_table[i].ocrch; - ocrl = regs_table[i].ocrcl; - break; - default: - ocrh = regs_table[i].ocrah; - ocrl = regs_table[i].ocral; - } - *ocrh = val >> 8; - *ocrl = val & 0xFF; - *regs_table[i].tifr |= (1 << (channel + 1)); - if (pwmp->config->channels[channel].callback) - *regs_table[i].timsk |= (1 << (channel + 1)); -} - -/** - * @brief Disables a PWM channel. - * @pre The PWM unit must have been activated using @p pwmStart(). - * @post The channel is disabled and its output line returned to the - * idle state. - * @note Depending on the hardware implementation this function has - * effect starting on the next cycle (recommended implementation) - * or immediately (fallback implementation). - * - * @param[in] pwmp pointer to a @p PWMDriver object - * @param[in] channel PWM channel identifier (0...PWM_CHANNELS-1) - * - * @notapi - */ -void pwm_lld_disable_channel(PWMDriver *pwmp, pwmchannel_t channel) -{ - uint8_t i = timer_index(pwmp); - config_channel(regs_table[i].tccra, - 7 - 2*channel, - 6 - 2*channel, - PWM_OUTPUT_DISABLED); - *regs_table[i].timsk &= ~(1 << (channel + 1)); -} - -#endif /* HAL_USE_PWM */ - -/** @} */ +/*
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+/*
+ This driver is based on the work done by Matteo Serva available at
+ http://github.com/matteoserva/ChibiOS-AVR
+*/
+
+/**
+ * @file AVR/pwm_lld.c
+ * @brief AVR PWM driver subsystem low level driver.
+ *
+ * @addtogroup PWM
+ * @{
+ */
+
+#include "hal.h"
+
+#if HAL_USE_PWM || defined(__DOXYGEN__)
+
+/*===========================================================================*/
+/* Driver local definitions. */
+/*===========================================================================*/
+
+typedef struct {
+ volatile uint8_t *tccra;
+ volatile uint8_t *tccrb;
+ volatile uint8_t *ocrah;
+ volatile uint8_t *ocral;
+ volatile uint8_t *ocrbh;
+ volatile uint8_t *ocrbl;
+ volatile uint8_t *ocrch;
+ volatile uint8_t *ocrcl;
+ volatile uint8_t *tifr;
+ volatile uint8_t *timsk;
+} timer_registers_t;
+
+static timer_registers_t regs_table[]=
+{
+#if AVR_PWM_USE_TIM1 || defined(__DOXYGEN__)
+#if defined(OCR1C)
+ {&TCCR1A, &TCCR1B, &OCR1AH, &OCR1AL, &OCR1BH, &OCR1BL, &OCR1CH, &OCR1CL, &TIFR1, &TIMSK1},
+#else
+ {&TCCR1A, &TCCR1B, &OCR1AH, &OCR1AL, &OCR1BH, &OCR1BL, NULL, NULL, &TIFR1, &TIMSK1},
+#endif
+#endif
+#if AVR_PWM_USE_TIM2 || defined(__DOXYGEN__)
+ {&TCCR2A, &TCCR2B, &OCR2A, &OCR2A, &OCR2B, &OCR2B, NULL, NULL, &TIFR2, &TIMSK2},
+#endif
+#if AVR_PWM_USE_TIM3 || defined(__DOXYGEN__)
+ {&TCCR3A, &TCCR3B, &OCR3AH, &OCR3AL, &OCR3BH, &OCR3BL, &OCR3CH, &OCR3CL, &TIFR3, &TIMSK3},
+#endif
+#if AVR_PWM_USE_TIM4 || defined(__DOXYGEN__)
+ {&TCCR4A, &TCCR4B, &OCR4AH, &OCR4AL, &OCR4CH, &OCR4CL, &OCR4CH, &OCR4CL, &TIFR4, &TIMSK4},
+#endif
+#if AVR_PWM_USE_TIM5 || defined(__DOXYGEN__)
+ {&TCCR5A, &TCCR5B, &OCR5AH, &OCR5AL, &OCR5BH, &OCR5BL, &OCR5CH, &OCR5CL, &TIFR5, &TIMSK5},
+#endif
+};
+
+/*===========================================================================*/
+/* Driver exported variables. */
+/*===========================================================================*/
+
+/** @brief PWM driver identifiers.*/
+#if AVR_PWM_USE_TIM1 || defined(__DOXYGEN__)
+PWMDriver PWMD1;
+#endif
+#if AVR_PWM_USE_TIM2 || defined(__DOXYGEN__)
+PWMDriver PWMD2;
+#endif
+#if AVR_PWM_USE_TIM3 || defined(__DOXYGEN__)
+PWMDriver PWMD3;
+#endif
+#if AVR_PWM_USE_TIM4 || defined(__DOXYGEN__)
+PWMDriver PWMD4;
+#endif
+#if AVR_PWM_USE_TIM5 || defined(__DOXYGEN__)
+PWMDriver PWMD5;
+#endif
+
+/*===========================================================================*/
+/* Driver local variables. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver local functions. */
+/*===========================================================================*/
+
+static void config_channel(volatile uint8_t *tccra,
+ uint8_t com1,
+ uint8_t com0,
+ pwmmode_t mode)
+{
+ *tccra &= ~((1 << com1) | (1 << com0));
+ if (mode == PWM_OUTPUT_ACTIVE_HIGH)
+ *tccra |= ((1 << com1) | (0 << com0)); /* non inverting mode */
+ else if (mode == PWM_OUTPUT_ACTIVE_LOW)
+ *tccra |= (1 << com1) | (1 << com0); /* inverting mode */
+}
+
+static uint8_t timer_index(PWMDriver *pwmp)
+{
+ uint8_t index = 0;
+
+#if AVR_PWM_USE_TIM1 || defined(__DOXYGEN__)
+ if (pwmp == &PWMD1) return index;
+ else index++;
+#endif
+#if AVR_PWM_USE_TIM2 || defined(__DOXYGEN__)
+ if (pwmp == &PWMD2) return index;
+ else index++;
+#endif
+#if AVR_PWM_USE_TIM3 || defined(__DOXYGEN__)
+ if (pwmp == &PWMD3) return index;
+ else index++;
+#endif
+#if AVR_PWM_USE_TIM4 || defined(__DOXYGEN__)
+ if (pwmp == &PWMD4) return index;
+ else index++;
+#endif
+#if AVR_PWM_USE_TIM5 || defined(__DOXYGEN__)
+ if (pwmp == &PWMD5) return index;
+ else index++;
+#endif
+
+ /* This is an error! */
+ return index;
+}
+
+/*===========================================================================*/
+/* Driver interrupt handlers. */
+/*===========================================================================*/
+
+/*
+ * interrupt for compare1&2 and clock overflow. pwmd1 & pwmd2
+ */
+#if AVR_PWM_USE_TIM1 || defined(__DOXYGEN__)
+OSAL_IRQ_HANDLER(TIMER1_OVF_vect)
+{
+ OSAL_IRQ_PROLOGUE();
+ PWMD1.config->callback(&PWMD1);
+ OSAL_IRQ_EPILOGUE();
+}
+
+OSAL_IRQ_HANDLER(TIMER1_COMPA_vect)
+{
+ OSAL_IRQ_PROLOGUE();
+ PWMD1.config->channels[0].callback(&PWMD1);
+ OSAL_IRQ_EPILOGUE();
+}
+
+OSAL_IRQ_HANDLER(TIMER1_COMPB_vect)
+{
+ OSAL_IRQ_PROLOGUE();
+ PWMD1.config->channels[1].callback(&PWMD1);
+ OSAL_IRQ_EPILOGUE();
+}
+#if PWM_CHANNELS > 2
+OSAL_IRQ_HANDLER(TIMER1_COMPC_vect)
+{
+ OSAL_IRQ_PROLOGUE();
+ PWMD1.config->channels[2].callback(&PWMD1);
+ OSAL_IRQ_EPILOGUE();
+}
+#endif
+#endif
+
+#if AVR_PWM_USE_TIM2 || defined(__DOXYGEN__)
+OSAL_IRQ_HANDLER(TIMER2_OVF_vect)
+{
+ OSAL_IRQ_PROLOGUE();
+ PWMD2.config->callback(&PWMD2);
+ OSAL_IRQ_EPILOGUE();
+}
+
+OSAL_IRQ_HANDLER(TIMER2_COMPA_vect)
+{
+ OSAL_IRQ_PROLOGUE();
+ PWMD2.config->channels[0].callback(&PWMD2);
+ OSAL_IRQ_EPILOGUE();
+}
+
+OSAL_IRQ_HANDLER(TIMER2_COMPB_vect)
+{
+ OSAL_IRQ_PROLOGUE();
+ PWMD2.config->channels[1].callback(&PWMD2);
+ OSAL_IRQ_EPILOGUE();
+}
+#endif
+
+#if AVR_PWM_USE_TIM3 || defined(__DOXYGEN__)
+OSAL_IRQ_HANDLER(TIMER3_OVF_vect)
+{
+ OSAL_IRQ_PROLOGUE();
+ PWMD3.config->callback(&PWMD3);
+ OSAL_IRQ_EPILOGUE();
+}
+
+OSAL_IRQ_HANDLER(TIMER3_COMPA_vect)
+{
+ OSAL_IRQ_PROLOGUE();
+ PWMD3.config->channels[0].callback(&PWMD3);
+ OSAL_IRQ_EPILOGUE();
+}
+
+OSAL_IRQ_HANDLER(TIMER3_COMPB_vect)
+{
+ OSAL_IRQ_PROLOGUE();
+ PWMD3.config->channels[1].callback(&PWMD3);
+ OSAL_IRQ_EPILOGUE();
+}
+
+OSAL_IRQ_HANDLER(TIMER3_COMPC_vect)
+{
+ OSAL_IRQ_PROLOGUE();
+ PWMD3.config->channels[2].callback(&PWMD3);
+ OSAL_IRQ_EPILOGUE();
+}
+#endif
+
+#if AVR_PWM_USE_TIM4 || defined(__DOXYGEN__)
+OSAL_IRQ_HANDLER(TIMER4_OVF_vect)
+{
+ OSAL_IRQ_PROLOGUE();
+ PWMD4.config->callback(&PWMD4);
+ OSAL_IRQ_EPILOGUE();
+}
+
+OSAL_IRQ_HANDLER(TIMER4_COMPA_vect)
+{
+ OSAL_IRQ_PROLOGUE();
+ PWMD4.config->channels[0].callback(&PWMD4);
+ OSAL_IRQ_EPILOGUE();
+}
+
+OSAL_IRQ_HANDLER(TIMER4_COMPB_vect)
+{
+ OSAL_IRQ_PROLOGUE();
+ PWMD4.config->channels[1].callback(&PWMD4);
+ OSAL_IRQ_EPILOGUE();
+}
+
+OSAL_IRQ_HANDLER(TIMER4_COMPC_vect)
+{
+ OSAL_IRQ_PROLOGUE();
+ PWMD4.config->channels[2].callback(&PWMD4);
+ OSAL_IRQ_EPILOGUE();
+}
+#endif
+
+#if AVR_PWM_USE_TIM5 || defined(__DOXYGEN__)
+OSAL_IRQ_HANDLER(TIMER5_OVF_vect)
+{
+ OSAL_IRQ_PROLOGUE();
+ PWMD5.config->callback(&PWMD5);
+ OSAL_IRQ_EPILOGUE();
+}
+
+OSAL_IRQ_HANDLER(TIMER5_COMPA_vect)
+{
+ OSAL_IRQ_PROLOGUE();
+ PWMD5.config->channels[0].callback(&PWMD5);
+ OSAL_IRQ_EPILOGUE();
+}
+
+OSAL_IRQ_HANDLER(TIMER5_COMPB_vect)
+{
+ OSAL_IRQ_PROLOGUE();
+ PWMD5.config->channels[1].callback(&PWMD5);
+ OSAL_IRQ_EPILOGUE();
+}
+
+OSAL_IRQ_HANDLER(TIMER5_COMPC_vect)
+{
+ OSAL_IRQ_PROLOGUE();
+ PWMD5.config->channels[2].callback(&PWMD5);
+ OSAL_IRQ_EPILOGUE();
+}
+#endif
+
+/*===========================================================================*/
+/* Driver exported functions. */
+/*===========================================================================*/
+
+/**
+ * @brief Low level PWM driver initialization.
+ *
+ * @notapi
+ */
+void pwm_lld_init(void)
+{
+#if AVR_PWM_USE_TIM1 || defined(__DOXYGEN__)
+ pwmObjectInit(&PWMD1);
+ TCCR1A = (1 << WGM11) | (1 << WGM10);
+ TCCR1B = (0 << WGM13) | (1 << WGM12);
+#endif
+
+#if AVR_PWM_USE_TIM2 || defined(__DOXYGEN__)
+ pwmObjectInit(&PWMD2);
+ TCCR2A = (1 << WGM21) | (1 << WGM20);
+ TCCR2B = (0 << WGM22);
+#endif
+
+#if AVR_PWM_USE_TIM3 || defined(__DOXYGEN__)
+ pwmObjectInit(&PWMD3);
+ TCCR3A = (1 << WGM31) | (1 << WGM30);
+ TCCR3B = (0 << WGM33) | (1 << WGM32);
+#endif
+
+#if AVR_PWM_USE_TIM4 || defined(__DOXYGEN__)
+ pwmObjectInit(&PWMD4);
+ TCCR4A = (1 << WGM41) | (1 << WGM40);
+ TCCR4B = (0 << WGM43) | (1 << WGM42);
+#endif
+
+#if AVR_PWM_USE_TIM5 || defined(__DOXYGEN__)
+ pwmObjectInit(&PWMD5);
+ TCCR5A = (1 << WGM51) | (1 << WGM50);
+ TCCR5B = (0 << WGM53) | (1 << WGM52);
+#endif
+}
+
+/**
+ * @brief Configures and activates the PWM peripheral.
+ *
+ * @param[in] pwmp pointer to the @p PWMDriver object
+ *
+ * @notapi
+ */
+void pwm_lld_start(PWMDriver *pwmp)
+{
+ if (pwmp->state == PWM_STOP) {
+
+#if AVR_PWM_USE_TIM2 || defined(__DOXYGEN__)
+ if (pwmp == &PWMD2) {
+ TCCR2B &= ~((1 << CS22) | (1 << CS21));
+ TCCR2B |= (1 << CS20);
+ if (pwmp->config->callback != NULL)
+ TIMSK2 |= (1 << TOIE2);
+ return;
+ }
+#endif
+
+ /* TODO: support other prescaler options */
+
+ uint8_t i = timer_index(pwmp);
+ *regs_table[i].tccrb &= ~(1 << CS11);
+ *regs_table[i].tccrb |= (1 << CS12) | (1 << CS10);
+ *regs_table[i].timsk = (1 << TOIE1);
+ }
+}
+
+/**
+ * @brief Deactivates the PWM peripheral.
+ *
+ * @param[in] pwmp pointer to the @p PWMDriver object
+ *
+ * @notapi
+ */
+void pwm_lld_stop(PWMDriver *pwmp)
+{
+ uint8_t i = timer_index(pwmp);
+ *regs_table[i].tccrb &= ~((1 << CS12) | (1 << CS11) | (1 << CS10));
+ *regs_table[i].timsk = 0;
+}
+
+/**
+ * @brief Changes the period the PWM peripheral.
+ * @details This function changes the period of a PWM unit that has already
+ * been activated using @p pwmStart().
+ * @pre The PWM unit must have been activated using @p pwmStart().
+ * @post The PWM unit period is changed to the new value.
+ * @note The function has effect at the next cycle start.
+ * @note If a period is specified that is shorter than the pulse width
+ * programmed in one of the channels then the behavior is not
+ * guaranteed.
+ *
+ * @param[in] pwmp pointer to a @p PWMDriver object
+ * @param[in] period new cycle time in ticks
+ *
+ * @notapi
+ */
+void pwm_lld_change_period(PWMDriver *pwmp, pwmcnt_t period)
+{
+}
+
+/**
+ * @brief Enables a PWM channel.
+ * @pre The PWM unit must have been activated using @p pwmStart().
+ * @post The channel is active using the specified configuration.
+ * @note Depending on the hardware implementation this function has
+ * effect starting on the next cycle (recommended implementation)
+ * or immediately (fallback implementation).
+ *
+ * @param[in] pwmp pointer to a @p PWMDriver object
+ * @param[in] channel PWM channel identifier (0...PWM_CHANNELS-1)
+ * @param[in] width PWM pulse width as clock pulses number
+ *
+ * @notapi
+ */
+void pwm_lld_enable_channel(PWMDriver *pwmp,
+ pwmchannel_t channel,
+ pwmcnt_t width)
+{
+ uint16_t val = width;
+ if (val > MAX_PWM_VALUE)
+ val = MAX_PWM_VALUE;
+
+#if AVR_PWM_USE_TIM2 || defined(__DOXYGEN__)
+ if (pwmp == &PWMD2) {
+ config_channel(&TCCR2A,
+ 7 - 2*channel,
+ 6 - 2*channel,
+ pwmp->config->channels[channel].mode);
+ TIMSK2 |= (1 << (channel + 1));
+ /* Timer 2 is 8 bit */
+ if (val > 0xFF)
+ val = 0xFF;
+ if (pwmp->config->channels[channel].callback) {
+ switch (channel) {
+ case 0: OCR2A = val; break;
+ case 1: OCR2B = val; break;
+ }
+ }
+ return;
+ }
+#endif
+
+ uint8_t i = timer_index(pwmp);
+ config_channel(regs_table[i].tccra,
+ 7 - 2*channel,
+ 6 - 2*channel,
+ pwmp->config->channels[channel].mode);
+ volatile uint8_t *ocrh, *ocrl;
+ switch (channel) {
+ case 1:
+ ocrh = regs_table[i].ocrbh;
+ ocrl = regs_table[i].ocrbl;
+ break;
+ case 2:
+ ocrh = regs_table[i].ocrch;
+ ocrl = regs_table[i].ocrcl;
+ break;
+ default:
+ ocrh = regs_table[i].ocrah;
+ ocrl = regs_table[i].ocral;
+ }
+ *ocrh = val >> 8;
+ *ocrl = val & 0xFF;
+ *regs_table[i].tifr |= (1 << (channel + 1));
+ if (pwmp->config->channels[channel].callback)
+ *regs_table[i].timsk |= (1 << (channel + 1));
+}
+
+/**
+ * @brief Disables a PWM channel.
+ * @pre The PWM unit must have been activated using @p pwmStart().
+ * @post The channel is disabled and its output line returned to the
+ * idle state.
+ * @note Depending on the hardware implementation this function has
+ * effect starting on the next cycle (recommended implementation)
+ * or immediately (fallback implementation).
+ *
+ * @param[in] pwmp pointer to a @p PWMDriver object
+ * @param[in] channel PWM channel identifier (0...PWM_CHANNELS-1)
+ *
+ * @notapi
+ */
+void pwm_lld_disable_channel(PWMDriver *pwmp, pwmchannel_t channel)
+{
+ uint8_t i = timer_index(pwmp);
+ config_channel(regs_table[i].tccra,
+ 7 - 2*channel,
+ 6 - 2*channel,
+ PWM_OUTPUT_DISABLED);
+ *regs_table[i].timsk &= ~(1 << (channel + 1));
+}
+
+#endif /* HAL_USE_PWM */
+
+/** @} */
diff --git a/os/hal/ports/AVR/pwm_lld.h b/os/hal/ports/AVR/pwm_lld.h index 3be2008b5..eb72f05da 100644 --- a/os/hal/ports/AVR/pwm_lld.h +++ b/os/hal/ports/AVR/pwm_lld.h @@ -1,5 +1,5 @@ /*
- ChibiOS/RT - Copyright (C) 2006-2014 Giovanni Di Sirio
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/os/hal/ports/AVR/serial_lld.c b/os/hal/ports/AVR/serial_lld.c index 953870952..9674878c0 100644 --- a/os/hal/ports/AVR/serial_lld.c +++ b/os/hal/ports/AVR/serial_lld.c @@ -1,5 +1,5 @@ /*
- ChibiOS/RT - Copyright (C) 2006-2014 Giovanni Di Sirio
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/os/hal/ports/AVR/serial_lld.h b/os/hal/ports/AVR/serial_lld.h index d98210b4d..47df88a5f 100644 --- a/os/hal/ports/AVR/serial_lld.h +++ b/os/hal/ports/AVR/serial_lld.h @@ -1,5 +1,5 @@ /*
- ChibiOS/RT - Copyright (C) 2006-2014 Giovanni Di Sirio
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/os/hal/ports/AVR/spi_lld.c b/os/hal/ports/AVR/spi_lld.c index e87687563..3621b2136 100644 --- a/os/hal/ports/AVR/spi_lld.c +++ b/os/hal/ports/AVR/spi_lld.c @@ -1,5 +1,5 @@ /*
- ChibiOS/RT - Copyright (C) 2006-2014 Giovanni Di Sirio
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/os/hal/ports/AVR/spi_lld.h b/os/hal/ports/AVR/spi_lld.h index 3cc3e1adc..e0defe45e 100644 --- a/os/hal/ports/AVR/spi_lld.h +++ b/os/hal/ports/AVR/spi_lld.h @@ -1,5 +1,5 @@ /*
- ChibiOS/RT - Copyright (C) 2006-2014 Giovanni Di Sirio
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/os/hal/ports/AVR/st_lld.c b/os/hal/ports/AVR/st_lld.c index ebbe0eec2..463ff8b8a 100644 --- a/os/hal/ports/AVR/st_lld.c +++ b/os/hal/ports/AVR/st_lld.c @@ -1,5 +1,5 @@ /*
- ChibiOS/RT - Copyright (C) 2006-2014 Giovanni Di Sirio
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/os/hal/ports/AVR/st_lld.h b/os/hal/ports/AVR/st_lld.h index beefb9165..024135c8f 100644 --- a/os/hal/ports/AVR/st_lld.h +++ b/os/hal/ports/AVR/st_lld.h @@ -1,5 +1,5 @@ /*
- ChibiOS/RT - Copyright (C) 2006-2014 Giovanni Di Sirio
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
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