4 files changed, 12 insertions, 9 deletions
diff --git a/os/hal/platforms/STM8/hal_lld.c b/os/hal/platforms/STM8/hal_lld.c
index 0d5791236..7a2d1bc1f 100644
--- a/os/hal/platforms/STM8/hal_lld.c
+++ b/os/hal/platforms/STM8/hal_lld.c
@@ -37,10 +37,10 @@
 /*===========================================================================*/
 
 /**
- * @brief PAL setup.
+ * @brief   PAL setup.
  * @details Digital I/O ports static configuration as defined in @p board.h.
  */
-const STM8GPIOConfig pal_default_config =
+ROMCONST STM8GPIOConfig pal_default_config =
 {
   {
     {VAL_GPIOAODR, 0, VAL_GPIOADDR, VAL_GPIOACR1, VAL_GPIOACR2},
@@ -78,7 +78,7 @@ void hal_lld_init(void) {
   while ((CLK_ICKR & 2) == 0)       /* HSIRDY */
     ;
 #elif STM8_CLOCK_SOURCE == CLK_SOURCE_LSI
-  CLK_ICKR    = 8;                  /* LSIEN */             
+  CLK_ICKR    = 8;                  /* LSIEN */
   while ((CLK_ICKR & 16) == 0)      /* LSIRDY */
     ;
 #else /* STM8_CLOCK_SOURCE == CLK_SOURCE_HSE */
@@ -100,7 +100,7 @@ void hal_lld_init(void) {
   /* Clocks initially all disabled.*/
   CLK_PCKENR1 = 0;
   CLK_PCKENR2 = 0;
-  
+
   /* Other clock related initializations.*/
   CLK_CSSR    = 0;
   CLK_CCOR    = 0;
diff --git a/os/hal/platforms/STM8/hal_lld.h b/os/hal/platforms/STM8/hal_lld.h
index aba5013b3..786843ffc 100644
--- a/os/hal/platforms/STM8/hal_lld.h
+++ b/os/hal/platforms/STM8/hal_lld.h
@@ -66,21 +66,21 @@
 /*===========================================================================*/
 
 /**
- * @brief Clock source setting.
+ * @brief   Clock source setting.
  */
 #if !defined(STM8_CLOCK_SOURCE) || defined(__DOXYGEN__)
 #define STM8_CLOCK_SOURCE           CLK_SOURCE_DEFAULT
 #endif
 
 /**
- * @brief HSI clock divider.
+ * @brief   HSI clock divider.
  */
 #if !defined(STM8_HSI_DIVIDER) || defined(__DOXYGEN__)
 #define STM8_HSI_DIVIDER            CLK_HSI_DIV8
 #endif
 
 /**
- * @brief CPU clock divider.
+ * @brief   CPU clock divider.
  */
 #if !defined(STM8_CPU_DIVIDER) || defined(__DOXYGEN__)
 #define STM8_CPU_DIVIDER            CLK_CPU_DIV1
diff --git a/os/hal/platforms/STM8/pal_lld.h b/os/hal/platforms/STM8/pal_lld.h
index 88f68dd37..65ddeedea 100644
--- a/os/hal/platforms/STM8/pal_lld.h
+++ b/os/hal/platforms/STM8/pal_lld.h
@@ -38,6 +38,9 @@
 /* I/O Ports Types and constants.                                            */
 /*===========================================================================*/
 
+/**
+ * @brief   GPIO port representation.
+ */
 typedef struct {
   volatile uint8_t      ODR;
   volatile uint8_t      IDR;
@@ -191,7 +194,7 @@ typedef gpio_t *ioportid_t;
  */
 #define pal_lld_setgroupmode(port, mask, mode) ((void)(mode))
 
-extern const STM8GPIOConfig pal_default_config;
+extern ROMCONST STM8GPIOConfig pal_default_config;
 
 #endif /* CH_HAL_USE_PAL */
 
diff --git a/os/hal/platforms/STM8/serial_lld.c b/os/hal/platforms/STM8/serial_lld.c
index a0b85619c..d3b49b1e4 100644
--- a/os/hal/platforms/STM8/serial_lld.c
+++ b/os/hal/platforms/STM8/serial_lld.c
@@ -79,7 +79,7 @@ SerialDriver SD3;
 /**
  * @brief   Driver default configuration.
  */
-static const SerialConfig default_config = {
+static ROMCONST SerialConfig default_config = {
   BBR(SERIAL_DEFAULT_BITRATE),
   SD_MODE_PARITY_NONE | SD_MODE_STOP_1
 };