aboutsummaryrefslogtreecommitdiffstats
path: root/os/hal/platforms/STM32/pwm_lld.c
diff options
context:
space:
mode:
Diffstat (limited to 'os/hal/platforms/STM32/pwm_lld.c')
-rw-r--r--os/hal/platforms/STM32/pwm_lld.c24
1 files changed, 3 insertions, 21 deletions
diff --git a/os/hal/platforms/STM32/pwm_lld.c b/os/hal/platforms/STM32/pwm_lld.c
index f78896e95..a101b284a 100644
--- a/os/hal/platforms/STM32/pwm_lld.c
+++ b/os/hal/platforms/STM32/pwm_lld.c
@@ -101,6 +101,8 @@ PWMDriver PWMD5;
* @note It is assumed that the various sources are only activated if the
* associated callback pointer is not equal to @p NULL in order to not
* perform an extra check in a potentially critical interrupt handler.
+ *
+ * @param[in] pwmp pointer to a @p PWMDriver object
*/
static void serve_interrupt(PWMDriver *pwmp) {
uint16_t sr;
@@ -249,10 +251,6 @@ CH_IRQ_HANDLER(TIM5_IRQHandler) {
void pwm_lld_init(void) {
#if STM32_PWM_USE_TIM1
- /* TIM1 reset, ensures reset state in order to avoid trouble with JTAGs.*/
- RCC->APB2RSTR = RCC_APB2RSTR_TIM1RST;
- RCC->APB2RSTR = 0;
-
/* Driver initialization.*/
pwmObjectInit(&PWMD1);
PWMD1.pd_enabled_channels = 0;
@@ -260,10 +258,6 @@ void pwm_lld_init(void) {
#endif
#if STM32_PWM_USE_TIM2
- /* TIM2 reset, ensures reset state in order to avoid trouble with JTAGs.*/
- RCC->APB1RSTR = RCC_APB1RSTR_TIM2RST;
- RCC->APB1RSTR = 0;
-
/* Driver initialization.*/
pwmObjectInit(&PWMD2);
PWMD2.pd_enabled_channels = 0;
@@ -271,10 +265,6 @@ void pwm_lld_init(void) {
#endif
#if STM32_PWM_USE_TIM3
- /* TIM2 reset, ensures reset state in order to avoid trouble with JTAGs.*/
- RCC->APB1RSTR = RCC_APB1RSTR_TIM3RST;
- RCC->APB1RSTR = 0;
-
/* Driver initialization.*/
pwmObjectInit(&PWMD3);
PWMD3.pd_enabled_channels = 0;
@@ -282,10 +272,6 @@ void pwm_lld_init(void) {
#endif
#if STM32_PWM_USE_TIM4
- /* TIM2 reset, ensures reset state in order to avoid trouble with JTAGs.*/
- RCC->APB1RSTR = RCC_APB1RSTR_TIM4RST;
- RCC->APB1RSTR = 0;
-
/* Driver initialization.*/
pwmObjectInit(&PWMD4);
PWMD4.pd_enabled_channels = 0;
@@ -293,10 +279,6 @@ void pwm_lld_init(void) {
#endif
#if STM32_PWM_USE_TIM5
- /* TIM2 reset, ensures reset state in order to avoid trouble with JTAGs.*/
- RCC->APB1RSTR = RCC_APB1RSTR_TIM5RST;
- RCC->APB1RSTR = 0;
-
/* Driver initialization.*/
pwmObjectInit(&PWMD5);
PWMD5.pd_enabled_channels = 0;
@@ -368,7 +350,6 @@ void pwm_lld_start(PWMDriver *pwmp) {
}
#endif
-
/* All channels configured in PWM1 mode with preload enabled and will
stay that way until the driver is stopped.*/
pwmp->pd_tim->CCMR1 = TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 |
@@ -448,6 +429,7 @@ void pwm_lld_start(PWMDriver *pwmp) {
* @notapi
*/
void pwm_lld_stop(PWMDriver *pwmp) {
+
/* If in ready state then disables the PWM clock.*/
if (pwmp->pd_state == PWM_READY) {
pwmp->pd_enabled_channels = 0; /* All channels disabled. */