diff options
Diffstat (limited to 'os/hal/platforms/STM32/gpt_lld.c')
| -rw-r--r-- | os/hal/platforms/STM32/gpt_lld.c | 42 | 
1 files changed, 18 insertions, 24 deletions
| diff --git a/os/hal/platforms/STM32/gpt_lld.c b/os/hal/platforms/STM32/gpt_lld.c index f7a9226ad..0fd5dde73 100644 --- a/os/hal/platforms/STM32/gpt_lld.c +++ b/os/hal/platforms/STM32/gpt_lld.c @@ -268,9 +268,8 @@ void gpt_lld_start(GPTDriver *gptp) {      /* Clock activation.*/
  #if STM32_GPT_USE_TIM1
      if (&GPTD1 == gptp) {
 -      RCC->APB2ENR |= RCC_APB2ENR_TIM1EN;
 -      RCC->APB2RSTR = RCC_APB2RSTR_TIM1RST;
 -      RCC->APB2RSTR = 0;
 +      rccEnableTIM1(FALSE);
 +      rccResetTIM1();
        NVICEnableVector(TIM1_UP_IRQn,
                         CORTEX_PRIORITY_MASK(STM32_GPT_TIM1_IRQ_PRIORITY));
        gptp->clock = STM32_TIMCLK2;
 @@ -278,9 +277,8 @@ void gpt_lld_start(GPTDriver *gptp) {  #endif
  #if STM32_GPT_USE_TIM2
      if (&GPTD2 == gptp) {
 -      RCC->APB1ENR |= RCC_APB1ENR_TIM2EN;
 -      RCC->APB1RSTR = RCC_APB1RSTR_TIM2RST;
 -      RCC->APB1RSTR = 0;
 +      rccEnableTIM2(FALSE);
 +      rccResetTIM2();
        NVICEnableVector(TIM2_IRQn,
                         CORTEX_PRIORITY_MASK(STM32_GPT_TIM2_IRQ_PRIORITY));
        gptp->clock = STM32_TIMCLK1;
 @@ -288,9 +286,8 @@ void gpt_lld_start(GPTDriver *gptp) {  #endif
  #if STM32_GPT_USE_TIM3
      if (&GPTD3 == gptp) {
 -      RCC->APB1ENR |= RCC_APB1ENR_TIM3EN;
 -      RCC->APB1RSTR = RCC_APB1RSTR_TIM3RST;
 -      RCC->APB1RSTR = 0;
 +      rccEnableTIM3(FALSE);
 +      rccResetTIM3();
        NVICEnableVector(TIM3_IRQn,
                         CORTEX_PRIORITY_MASK(STM32_GPT_TIM3_IRQ_PRIORITY));
        gptp->clock = STM32_TIMCLK1;
 @@ -298,9 +295,8 @@ void gpt_lld_start(GPTDriver *gptp) {  #endif
  #if STM32_GPT_USE_TIM4
      if (&GPTD4 == gptp) {
 -      RCC->APB1ENR |= RCC_APB1ENR_TIM4EN;
 -      RCC->APB1RSTR = RCC_APB1RSTR_TIM4RST;
 -      RCC->APB1RSTR = 0;
 +      rccEnableTIM4(FALSE);
 +      rccResetTIM4();
        NVICEnableVector(TIM4_IRQn,
                         CORTEX_PRIORITY_MASK(STM32_GPT_TIM4_IRQ_PRIORITY));
        gptp->clock = STM32_TIMCLK1;
 @@ -309,9 +305,8 @@ void gpt_lld_start(GPTDriver *gptp) {  #if STM32_GPT_USE_TIM5
      if (&GPTD5 == gptp) {
 -      RCC->APB1ENR |= RCC_APB1ENR_TIM5EN;
 -      RCC->APB1RSTR = RCC_APB1RSTR_TIM5RST;
 -      RCC->APB1RSTR = 0;
 +      rccEnableTIM5(FALSE);
 +      rccResetTIM5();
        NVICEnableVector(TIM5_IRQn,
                         CORTEX_PRIORITY_MASK(STM32_GPT_TIM5_IRQ_PRIORITY));
        gptp->clock = STM32_TIMCLK1;
 @@ -320,9 +315,8 @@ void gpt_lld_start(GPTDriver *gptp) {  #if STM32_GPT_USE_TIM8
      if (&GPTD8 == gptp) {
 -      RCC->APB2ENR |= RCC_APB2ENR_TIM8EN;
 -      RCC->APB2RSTR = RCC_APB2RSTR_TIM8RST;
 -      RCC->APB2RSTR = 0;
 +      rccEnableTIM8(FALSE);
 +      rccResetTIM8();
        NVICEnableVector(TIM8_UP_IRQn,
                         CORTEX_PRIORITY_MASK(STM32_GPT_TIM8_IRQ_PRIORITY));
        gptp->clock = STM32_TIMCLK2;
 @@ -359,37 +353,37 @@ void gpt_lld_stop(GPTDriver *gptp) {  #if STM32_GPT_USE_TIM1
      if (&GPTD1 == gptp) {
        NVICDisableVector(TIM1_UP_IRQn);
 -      RCC->APB2ENR &= ~RCC_APB2ENR_TIM1EN;
 +      rccDisableTIM1(FALSE);
      }
  #endif
  #if STM32_GPT_USE_TIM2
      if (&GPTD2 == gptp) {
        NVICDisableVector(TIM2_IRQn);
 -      RCC->APB1ENR &= ~RCC_APB1ENR_TIM2EN;
 +      rccDisableTIM2(FALSE);
      }
  #endif
  #if STM32_GPT_USE_TIM3
      if (&GPTD3 == gptp) {
        NVICDisableVector(TIM3_IRQn);
 -      RCC->APB1ENR &= ~RCC_APB1ENR_TIM3EN;
 +      rccDisableTIM3(FALSE);
      }
  #endif
  #if STM32_GPT_USE_TIM4
      if (&GPTD4 == gptp) {
        NVICDisableVector(TIM4_IRQn);
 -      RCC->APB1ENR &= ~RCC_APB1ENR_TIM4EN;
 +      rccDisableTIM4(FALSE);
      }
  #endif
  #if STM32_GPT_USE_TIM5
      if (&GPTD5 == gptp) {
        NVICDisableVector(TIM5_IRQn);
 -      RCC->APB1ENR &= ~RCC_APB1ENR_TIM5EN;
 +      rccDisableTIM5(FALSE);
      }
  #endif
  #if STM32_GPT_USE_TIM8
      if (&GPTD8 == gptp) {
        NVICDisableVector(TIM8_UP_IRQn);
 -      RCC->APB2ENR &= ~RCC_APB2ENR_TIM8EN;
 +      rccDisableTIM8(FALSE);
      }
  #endif
    }
 | 
