2 files changed, 11 insertions, 14 deletions
diff --git a/os/hal/platforms/SPC5xx/SIUL_v1/pal_lld.c b/os/hal/platforms/SPC5xx/SIUL_v1/pal_lld.c
index 8cd8b2bd3..a5354f431 100644
--- a/os/hal/platforms/SPC5xx/SIUL_v1/pal_lld.c
+++ b/os/hal/platforms/SPC5xx/SIUL_v1/pal_lld.c
@@ -14,7 +14,7 @@
 
 /**
  * @file    SPC5xx/SIUL_v1/pal_lld.c
- * @brief   SPC5xx SIU/SIUL low level driver code.
+ * @brief   SPC5xx SIUL low level driver code.
  *
  * @addtogroup PAL
  * @{
@@ -37,8 +37,8 @@
 /* Driver local variables.                                                   */
 /*===========================================================================*/
 
-#if defined(SPC5_SIU_SYSTEM_PINS)
-static const unsigned system_pins[] = {SPC5_SIU_SYSTEM_PINS};
+#if defined(SPC5_SIUL_SYSTEM_PINS)
+static const unsigned system_pins[] = {SPC5_SIUL_SYSTEM_PINS};
 #endif
 
 /*===========================================================================*/
@@ -63,15 +63,15 @@ static const unsigned system_pins[] = {SPC5_SIU_SYSTEM_PINS};
 void _pal_lld_init(const PALConfig *config) {
   unsigned i;
 
-#if defined(SPC5_SIU_PCTL)
+#if defined(SPC5_SIUL_PCTL)
   /* SIUL clock gating if present.*/
-  halSPCSetPeripheralClockMode(SPC5_SIU_PCTL,
+  halSPCSetPeripheralClockMode(SPC5_SIUL_PCTL,
                                SPC5_ME_PCTL_RUN(2) | SPC5_ME_PCTL_LP(2));
 #endif
 
   /* Initialize PCR registers for undefined pads.*/
-  for (i = 0; i < SPC5_SIU_NUM_PCRS; i++) {
-#if defined(SPC5_SIU_SYSTEM_PINS)
+  for (i = 0; i < SPC5_SIUL_NUM_PCRS; i++) {
+#if defined(SPC5_SIUL_SYSTEM_PINS)
     /* Handling the case where some SIU pins are not meant to be reprogrammed,
        for example JTAG pins.*/
     unsigned j;
@@ -88,7 +88,7 @@ skip:
   }
 
   /* Initialize PADSEL registers.*/
-  for (i = 0; i < SPC5_SIU_NUM_PADSELS; i++)
+  for (i = 0; i < SPC5_SIUL_NUM_PADSELS; i++)
     SIU.PSMI[i].R = config->padsels[i];
 
   /* Initialize PCR registers for defined pads.*/
diff --git a/os/hal/platforms/SPC5xx/SIUL_v1/pal_lld.h b/os/hal/platforms/SPC5xx/SIUL_v1/pal_lld.h
index 32b54d260..6eb250249 100644
--- a/os/hal/platforms/SPC5xx/SIUL_v1/pal_lld.h
+++ b/os/hal/platforms/SPC5xx/SIUL_v1/pal_lld.h
@@ -14,7 +14,7 @@
 
 /**
  * @file    SPC5xx/SIUL_v1/pal_lld.h
- * @brief   SPC5xx SIU/SIUL low level driver header.
+ * @brief   SPC5xx SIUL low level driver header.
  *
  * @addtogroup PAL
  * @{
@@ -39,7 +39,7 @@
 #undef PAL_MODE_OUTPUT_OPENDRAIN
 
 /**
- * @name    SIU/SIUL-specific PAL modes
+ * @name    SIUL-specific PAL modes
  * @{
  */
 #define PAL_SPC5_SMC                (1U << 14)
@@ -141,7 +141,7 @@ typedef uint16_t iomode_t;
 typedef uint32_t ioportid_t;
 
 /**
- * @brief   SIU/SIUL register initializer type.
+ * @brief   SIUL register initializer type.
  */
 typedef struct {
   uint8_t                   pcr_index;
@@ -232,7 +232,6 @@ typedef struct {
  */
 #define pal_lld_init(config) _pal_lld_init(config)
 
-#if SPC5_SIU_SUPPORTS_PORTS || defined(__DOXYGEN__)
 /**
  * @brief   Reads the physical I/O port states.
  *
@@ -293,8 +292,6 @@ typedef struct {
 #define pal_lld_writegroup(port, mask, offset, bits)                        \
   _pal_lld_writegroup(port, mask, offset, bits)
 
-#endif /* SPC5_SIU_SUPPORTS_PORTS */
-
 /**
  * @brief   Pads group mode setup.
  * @details This function programs a pads group belonging to the same port