1 files changed, 57 insertions, 0 deletions
diff --git a/os/hal/platforms/LPC214x/hal_lld.c b/os/hal/platforms/LPC214x/hal_lld.c
index 09d5c639d..705a42498 100644
--- a/os/hal/platforms/LPC214x/hal_lld.c
+++ b/os/hal/platforms/LPC214x/hal_lld.c
@@ -56,6 +56,20 @@ const LPC214xFIOConfig pal_default_config =
 /* Low Level Driver interrupt handlers.                                      */
 /*===========================================================================*/
 
+/*
+ * Non-vectored IRQs handler, the default action can be overridden by
+ * redefining the @p LPC214x_NON_VECTORED_IRQ_HOOK() hook macro.
+ */
+static CH_IRQ_HANDLER(irq_handler) {
+
+  CH_IRQ_PROLOGUE();
+
+  LPC214x_NON_VECTORED_IRQ_HOOK();
+
+  VICVectAddr = 0;
+  CH_IRQ_EPILOGUE();
+}
+
 /*===========================================================================*/
 /* Low Level Driver exported functions.                                      */
 /*===========================================================================*/
@@ -65,6 +79,49 @@ const LPC214xFIOConfig pal_default_config =
  */
 void hal_lld_init(void) {
 
+  vic_init();
+  VICDefVectAddr = (IOREG32)irq_handler;
+
+}
+
+/**
+ * @brief LPC214x clocks and PLL initialization.
+ * @note All the involved constants come from the file @p board.h.
+ */
+void lpc214x_clock_init(void) {
+
+  /*
+   * All peripherals clock disabled by default in order to save power.
+   */
+  PCONP = PCRTC | PCTIM0;
+
+  /*
+   * MAM setup.
+   */
+  MAMTIM = 0x3;                 /* 3 cycles for flash accesses. */
+  MAMCR  = 0x2;                 /* MAM fully enabled. */
+
+  /*
+   * PLL setup for Fosc=12MHz and CCLK=48MHz.
+   * P=2 M=3.
+   */
+  PLL *pll = PLL0Base;
+  pll->PLL_CFG  = 0x23;         /* P and M values. */
+  pll->PLL_CON  = 0x1;          /* Enables the PLL 0. */
+  pll->PLL_FEED = 0xAA;
+  pll->PLL_FEED = 0x55;
+  while (!(pll->PLL_STAT & 0x400))
+    ;                           /* Wait for PLL lock. */
+
+  pll->PLL_CON  = 0x3;          /* Connects the PLL. */
+  pll->PLL_FEED = 0xAA;
+  pll->PLL_FEED = 0x55;
+
+  /*
+   * VPB setup.
+   * PCLK = CCLK / 4.
+   */
+  VPBDIV = VPD_D4;
 }
 
 /** @} */