diff options
Diffstat (limited to 'os/hal/include')
| -rw-r--r-- | os/hal/include/adc.h | 70 | ||||
| -rw-r--r-- | os/hal/include/can.h | 65 | ||||
| -rw-r--r-- | os/hal/include/hal.h | 57 | ||||
| -rw-r--r-- | os/hal/include/mac.h | 93 | ||||
| -rw-r--r-- | os/hal/include/mii.h | 220 | ||||
| -rw-r--r-- | os/hal/include/mmc_spi.h | 208 | ||||
| -rw-r--r-- | os/hal/include/pal.h | 469 | ||||
| -rw-r--r-- | os/hal/include/serial.h | 197 | ||||
| -rw-r--r-- | os/hal/include/spi.h | 80 |
9 files changed, 1459 insertions, 0 deletions
diff --git a/os/hal/include/adc.h b/os/hal/include/adc.h new file mode 100644 index 000000000..af08502a8 --- /dev/null +++ b/os/hal/include/adc.h @@ -0,0 +1,70 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file adc.h
+ * @brief ADC Driver macros and structures.
+ * @addtogroup ADC
+ * @{
+ */
+
+#ifndef _ADC_H_
+#define _ADC_H_
+
+#if CH_HAL_USE_ADC
+
+#if !CH_USE_SEMAPHORES
+#error "ADC driver requires CH_USE_SEMAPHORES"
+#endif
+
+/**
+ * @brief Driver state machine possible states.
+ */
+typedef enum {
+ ADC_UNINIT = 0, /**< @brief Not initialized. */
+ ADC_STOP = 1, /**< @brief Stopped. */
+ ADC_READY = 2, /**< @brief Ready. */
+ ADC_RUNNING = 3 /**< @brief Conversion running. */
+} adcstate_t;
+
+#include "adc_lld.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+ void adcInit(void);
+ void adcObjectInit(ADCDriver *adcp);
+ void adcStart(ADCDriver *adcp, const ADCConfig *config);
+ void adcStop(ADCDriver *adcp);
+ bool_t adcStartConversion(ADCDriver *adcp,
+ const ADCConversionGroup *grpp,
+ adcsample_t *samples,
+ size_t depth,
+ adccallback_t callback);
+ void adcStopConversion(ADCDriver *adcp);
+ msg_t adcWaitConversion(ADCDriver *adcp, systime_t timeout);
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* CH_HAL_USE_ADC */
+
+#endif /* _ADC_H_ */
+
+/** @} */
diff --git a/os/hal/include/can.h b/os/hal/include/can.h new file mode 100644 index 000000000..2a8ffc7e0 --- /dev/null +++ b/os/hal/include/can.h @@ -0,0 +1,65 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file can.h
+ * @brief CAN Driver macros and structures.
+ * @addtogroup CAN
+ * @{
+ */
+
+#ifndef _CAN_H_
+#define _CAN_H_
+
+#if CH_HAL_USE_CAN
+
+/**
+ * @brief Driver state machine possible states.
+ */
+typedef enum {
+ CAN_UNINIT = 0, /**< @brief Not initialized. */
+ CAN_STOP = 1, /**< @brief Stopped. */
+ CAN_READY = 2, /**< @brief Ready. */
+ CAN_SLEEP = 3 /**< @brief Sleep state. */
+} canstate_t;
+
+#include "can_lld.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+ void canInit(void);
+ void canObjectInit(CANDriver *canp);
+ void canStart(CANDriver *canp, const CANConfig *config);
+ void canStop(CANDriver *canp);
+ msg_t canTransmit(CANDriver *canp, const CANFrame *cfp, systime_t timeout);
+ msg_t canReceive(CANDriver *canp, CANFrame *cfp, systime_t timeout);
+#if CAN_USE_SLEEP_MODE
+ void canSleep(CANDriver *canp);
+ void canWakeup(CANDriver *canp);
+#endif /* CAN_USE_SLEEP_MODE */
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* CH_HAL_USE_CAN */
+
+#endif /* _CAN_H_ */
+
+/** @} */
diff --git a/os/hal/include/hal.h b/os/hal/include/hal.h new file mode 100644 index 000000000..dcfa822b4 --- /dev/null +++ b/os/hal/include/hal.h @@ -0,0 +1,57 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file hal.h
+ * @brief HAL subsystem header.
+ * @addtogroup HAL
+ * @{
+ */
+
+#ifndef _HAL_H_
+#define _HAL_H_
+
+#include "halconf.h"
+#include "board.h"
+
+#include "pal.h"
+#include "adc.h"
+#include "can.h"
+#include "mac.h"
+#include "serial.h"
+#include "spi.h"
+#include "mmc_spi.h"
+
+/*===========================================================================*/
+/* External declarations. */
+/*===========================================================================*/
+
+extern const STM32GPIOConfig pal_default_config;
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+ void halInit(void);
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _HAL_H_ */
+
+/** @} */
diff --git a/os/hal/include/mac.h b/os/hal/include/mac.h new file mode 100644 index 000000000..ae2d3a42e --- /dev/null +++ b/os/hal/include/mac.h @@ -0,0 +1,93 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file mac.h
+ * @brief MAC Driver macros and structures.
+ * @addtogroup MAC
+ * @{
+ */
+
+#ifndef _MAC_H_
+#define _MAC_H_
+
+#if CH_HAL_USE_MAC
+
+#include "mac_lld.h"
+
+/**
+ * @brief Returns the received frames event source.
+ * + * @param[in] macp pointer to the @p MACDriver object
+ * @return The pointer to the @p EventSource structure.
+ */
+#if CH_USE_EVENTS || defined(__DOXYGEN__)
+#define macGetReceiveEventSource(macp) (&(macp)->md_rdevent)
+#endif
+
+/**
+ * @brief Writes to a transmit descriptor's stream.
+ * + * @param[in] tdp pointer to a @p MACTransmitDescriptor structure
+ * @param[in] buf pointer to the buffer containing the data to be written
+ * @param[in] size number of bytes to be written
+ * @return The number of bytes written into the descriptor's stream, this
+ * value can be less than the amount specified in the parameter
+ * @p size if the maximum frame size is reached.
+ */
+#define macWriteTransmitDescriptor(tdp, buf, size) \
+ mac_lld_write_transmit_descriptor(tdp, buf, size)
+
+/**
+ * @brief Reads from a receive descriptor's stream.
+ *
+ * @param[in] rdp pointer to a @p MACReceiveDescriptor structure
+ * @param[in] buf pointer to the buffer that will receive the read data
+ * @param[in] size number of bytes to be read
+ * @return The number of bytes read from the descriptor's stream, this
+ * value can be less than the amount specified in the parameter
+ * @p size if there are no more bytes to read.
+ */
+#define macReadReceiveDescriptor(rdp, buf, size) \
+ mac_lld_read_receive_descriptor(rdp, buf, size)
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+ void macInit(void);
+ void macObjectInit(MACDriver *macp);
+ void macSetAddress(MACDriver *macp, const uint8_t *p);
+ msg_t macWaitTransmitDescriptor(MACDriver *macp,
+ MACTransmitDescriptor *tdp,
+ systime_t time);
+ void macReleaseTransmitDescriptor(MACTransmitDescriptor *tdp);
+ msg_t macWaitReceiveDescriptor(MACDriver *macp,
+ MACReceiveDescriptor *rdp,
+ systime_t time);
+ void macReleaseReceiveDescriptor(MACReceiveDescriptor *rdp);
+ bool_t macPollLinkStatus(MACDriver *macp);
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* CH_HAL_USE_MAC */
+
+#endif /* _MAC_H_ */
+
+/** @} */
diff --git a/os/hal/include/mii.h b/os/hal/include/mii.h new file mode 100644 index 000000000..a236c6dc3 --- /dev/null +++ b/os/hal/include/mii.h @@ -0,0 +1,220 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/*
+ * Parts of this file are borrowed by the Linux include file linux/mii.h:
+ * Copyright (C) 1996, 1999, 2001 David S. Miller (davem@redhat.com)
+ */
+
+/**
+ * @file mii.h
+ * @brief MII Driver macros and structures.
+ * @addtogroup MII
+ * @{
+ */
+
+#ifndef _MII_H_
+#define _MII_H_
+
+#include "mac_lld.h"
+#include "mii_lld.h"
+
+/*
+ * Generic MII registers. Note, not all registers are present on all PHY
+ * devices and some extra registers may be present.
+ */
+#define MII_BMCR 0x00 /**< Basic mode control register. */
+#define MII_BMSR 0x01 /**< Basic mode status register. */
+#define MII_PHYSID1 0x02 /**< PHYS ID 1. */
+#define MII_PHYSID2 0x03 /**< PHYS ID 2. */
+#define MII_ADVERTISE 0x04 /**< Advertisement control reg. */
+#define MII_LPA 0x05 /**< Link partner ability reg. */
+#define MII_EXPANSION 0x06 /**< Expansion register. */
+#define MII_CTRL1000 0x09 /**< 1000BASE-T control. */
+#define MII_STAT1000 0x0a /**< 1000BASE-T status. */
+#define MII_ESTATUS 0x0f /**< Extended Status. */
+#define MII_DCOUNTER 0x12 /**< Disconnect counter. */
+#define MII_FCSCOUNTER 0x13 /**< False carrier counter. */
+#define MII_NWAYTEST 0x14 /**< N-way auto-neg test reg. */
+#define MII_RERRCOUNTER 0x15 /**< Receive error counter. */
+#define MII_SREVISION 0x16 /**< Silicon revision. */
+#define MII_RESV1 0x17 /**< Reserved. */
+#define MII_LBRERROR 0x18 /**< Lpback, rx, bypass error. */
+#define MII_PHYADDR 0x19 /**< PHY address. */
+#define MII_RESV2 0x1a /**< Reserved. */
+#define MII_TPISTATUS 0x1b /**< TPI status for 10mbps. */
+#define MII_NCONFIG 0x1c /**< Network interface config. */
+
+/*
+ * Basic mode control register.
+ */
+#define BMCR_RESV 0x003f /**< Unused. */
+#define BMCR_SPEED1000 0x0040 /**< MSB of Speed (1000). */
+#define BMCR_CTST 0x0080 /**< Collision test. */
+#define BMCR_FULLDPLX 0x0100 /**< Full duplex. */
+#define BMCR_ANRESTART 0x0200 /**< Auto negotiation restart. */
+#define BMCR_ISOLATE 0x0400 /**< Disconnect DP83840 from MII. */
+#define BMCR_PDOWN 0x0800 /**< Powerdown. */
+#define BMCR_ANENABLE 0x1000 /**< Enable auto negotiation. */
+#define BMCR_SPEED100 0x2000 /**< Select 100Mbps. */
+#define BMCR_LOOPBACK 0x4000 /**< TXD loopback bits. */
+#define BMCR_RESET 0x8000 /**< Reset. */
+
+/*
+ * Basic mode status register.
+ */
+#define BMSR_ERCAP 0x0001 /**< Ext-reg capability. */
+#define BMSR_JCD 0x0002 /**< Jabber detected. */
+#define BMSR_LSTATUS 0x0004 /**< Link status. */
+#define BMSR_ANEGCAPABLE 0x0008 /**< Able to do auto-negotiation. */
+#define BMSR_RFAULT 0x0010 /**< Remote fault detected. */
+#define BMSR_ANEGCOMPLETE 0x0020 /**< Auto-negotiation complete. */
+#define BMSR_RESV 0x00c0 /**< Unused. */
+#define BMSR_ESTATEN 0x0100 /**< Extended Status in R15. */
+#define BMSR_100HALF2 0x0200 /**< Can do 100BASE-T2 HDX. */
+#define BMSR_100FULL2 0x0400 /**< Can do 100BASE-T2 FDX. */
+#define BMSR_10HALF 0x0800 /**< Can do 10mbps, half-duplex. */
+#define BMSR_10FULL 0x1000 /**< Can do 10mbps, full-duplex. */
+#define BMSR_100HALF 0x2000 /**< Can do 100mbps, half-duplex. */
+#define BMSR_100FULL 0x4000 /**< Can do 100mbps, full-duplex. */
+#define BMSR_100BASE4 0x8000 /**< Can do 100mbps, 4k packets. */
+
+/*
+ * Advertisement control register.
+ */
+#define ADVERTISE_SLCT 0x001f /**< Selector bits. */
+#define ADVERTISE_CSMA 0x0001 /**< Only selector supported. */
+#define ADVERTISE_10HALF 0x0020 /**< Try for 10mbps half-duplex. */
+#define ADVERTISE_1000XFULL 0x0020 /**< Try for 1000BASE-X full-duplex.*/
+#define ADVERTISE_10FULL 0x0040 /**< Try for 10mbps full-duplex. */
+#define ADVERTISE_1000XHALF 0x0040 /**< Try for 1000BASE-X half-duplex.*/
+#define ADVERTISE_100HALF 0x0080 /**< Try for 100mbps half-duplex. */
+#define ADVERTISE_1000XPAUSE 0x0080 /**< Try for 1000BASE-X pause. */
+#define ADVERTISE_100FULL 0x0100 /**< Try for 100mbps full-duplex. */
+#define ADVERTISE_1000XPSE_ASYM 0x0100 /**< Try for 1000BASE-X asym pause. */
+#define ADVERTISE_100BASE4 0x0200 /**< Try for 100mbps 4k packets. */
+#define ADVERTISE_PAUSE_CAP 0x0400 /**< Try for pause. */
+#define ADVERTISE_PAUSE_ASYM 0x0800 /**< Try for asymetric pause. */
+#define ADVERTISE_RESV 0x1000 /**< Unused. */
+#define ADVERTISE_RFAULT 0x2000 /**< Say we can detect faults. */
+#define ADVERTISE_LPACK 0x4000 /**< Ack link partners response. */
+#define ADVERTISE_NPAGE 0x8000 /**< Next page bit. */
+
+#define ADVERTISE_FULL (ADVERTISE_100FULL | ADVERTISE_10FULL | \
+ ADVERTISE_CSMA)
+#define ADVERTISE_ALL (ADVERTISE_10HALF | ADVERTISE_10FULL | \
+ ADVERTISE_100HALF | ADVERTISE_100FULL)
+
+/*
+ * Link partner ability register.
+ */
+#define LPA_SLCT 0x001f /**< Same as advertise selector. */
+#define LPA_10HALF 0x0020 /**< Can do 10mbps half-duplex. */
+#define LPA_1000XFULL 0x0020 /**< Can do 1000BASE-X full-duplex. */
+#define LPA_10FULL 0x0040 /**< Can do 10mbps full-duplex. */
+#define LPA_1000XHALF 0x0040 /**< Can do 1000BASE-X half-duplex. */
+#define LPA_100HALF 0x0080 /**< Can do 100mbps half-duplex. */
+#define LPA_1000XPAUSE 0x0080 /**< Can do 1000BASE-X pause. */
+#define LPA_100FULL 0x0100 /**< Can do 100mbps full-duplex. */
+#define LPA_1000XPAUSE_ASYM 0x0100 /**< Can do 1000BASE-X pause asym. */
+#define LPA_100BASE4 0x0200 /**< Can do 100mbps 4k packets. */
+#define LPA_PAUSE_CAP 0x0400 /**< Can pause. */
+#define LPA_PAUSE_ASYM 0x0800 /**< Can pause asymetrically. */
+#define LPA_RESV 0x1000 /**< Unused. */
+#define LPA_RFAULT 0x2000 /**< Link partner faulted. */
+#define LPA_LPACK 0x4000 /**< Link partner acked us. */
+#define LPA_NPAGE 0x8000 /**< Next page bit. */
+
+#define LPA_DUPLEX (LPA_10FULL | LPA_100FULL)
+#define LPA_100 (LPA_100FULL | LPA_100HALF | LPA_100BASE4)
+
+/*
+ * Expansion register for auto-negotiation.
+ */
+#define EXPANSION_NWAY 0x0001 /**< Can do N-way auto-nego. */
+#define EXPANSION_LCWP 0x0002 /**< Got new RX page code word. */
+#define EXPANSION_ENABLENPAGE 0x0004 /**< This enables npage words. */
+#define EXPANSION_NPCAPABLE 0x0008 /**< Link partner supports npage. */
+#define EXPANSION_MFAULTS 0x0010 /**< Multiple faults detected. */
+#define EXPANSION_RESV 0xffe0 /**< Unused. */
+
+#define ESTATUS_1000_TFULL 0x2000 /**< Can do 1000BT Full. */
+#define ESTATUS_1000_THALF 0x1000 /**< Can do 1000BT Half. */
+
+/*
+ * N-way test register.
+ */
+#define NWAYTEST_RESV1 0x00ff /**< Unused. */
+#define NWAYTEST_LOOPBACK 0x0100 /**< Enable loopback for N-way. */
+#define NWAYTEST_RESV2 0xfe00 /**< Unused. */
+
+/*
+ * 1000BASE-T Control register.
+ */
+#define ADVERTISE_1000FULL 0x0200 /**< Advertise 1000BASE-T full duplex.*/
+#define ADVERTISE_1000HALF 0x0100 /**< Advertise 1000BASE-T half duplex.*/
+
+/*
+ * 1000BASE-T Status register.
+ */
+#define LPA_1000LOCALRXOK 0x2000 /**< Link partner local receiver status.*/
+#define LPA_1000REMRXOK 0x1000 /**< Link partner remote receiver status.*/
+#define LPA_1000FULL 0x0800 /**< Link partner 1000BASE-T full duplex.*/
+#define LPA_1000HALF 0x0400 /**< Link partner 1000BASE-T half duplex.*/
+
+/*
+ * PHY identifiers.
+ */
+#define MII_DM9161_ID 0x0181b8a0
+#define MII_AM79C875_ID 0x00225540
+#define MII_KS8721_ID 0x00221610
+
+/**
+ * @brief MII Driver initialization.
+ */
+#define miiInit() mii_lld_init()
+
+/**
+ * Resets a MII device.
+ *
+ * @param[in] macp pointer to the @p MACDriver object
+ */
+#define miiReset(macp) mii_lld_reset(macp)
+
+/**
+ * @brief Reads a MII register.
+ *
+ * @param[in] macp pointer to the @p MACDriver object
+ * @param addr the register address
+ * @return The register value.
+ */
+#define miiGet(macp, addr) mii_lld_get(macp, addr)
+
+/**
+ * @brief Writes a MII register.
+ *
+ * @param[in] macp pointer to the @p MACDriver object
+ * @param addr the register address
+ * @param value the new register value
+ */
+#define miiPut(macp, addr, value) mii_lld_put(macp, addr, value)
+
+#endif /**< _MII_H_ */
+
+/** @} */
diff --git a/os/hal/include/mmc_spi.h b/os/hal/include/mmc_spi.h new file mode 100644 index 000000000..e77dbe7dc --- /dev/null +++ b/os/hal/include/mmc_spi.h @@ -0,0 +1,208 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file mmc_spi.h
+ * @brief MMC over SPI driver header.
+ * @addtogroup MMC_SPI
+ * @{
+ */
+
+#ifndef _MMC_SPI_H_
+#define _MMC_SPI_H_
+
+#if CH_HAL_USE_MMC_SPI
+
+/*===========================================================================*/
+/* Driver pre-compile time settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Block size for MMC transfers.
+ */
+#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__)
+#define MMC_SECTOR_SIZE 512
+#endif
+
+/**
+ * @brief Delays insertions.
+ * @details If enabled this options inserts delays into the MMC waiting
+ * routines releasing some extra CPU time for the threads with
+ * lower priority, this may slow down the driver a bit however.
+ * This option is recommended also if the SPI driver does not
+ * use a DMA channel and heavily loads the CPU. + */
+#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
+#define MMC_NICE_WAITING TRUE
+#endif
+
+/**
+ * @brief Number of positive insertion queries before generating the
+ * insertion event. + */
+#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__)
+#define MMC_POLLING_INTERVAL 10
+#endif
+
+/**
+ * @brief Interval, in milliseconds, between insertion queries. + */
+#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__)
+#define MMC_POLLING_DELAY 10
+#endif
+
+/*===========================================================================*/
+/* Driver constants. */
+/*===========================================================================*/
+
+#define MMC_CMD0_RETRY 10
+#define MMC_CMD1_RETRY 100
+#define MMC_WAIT_DATA 10000
+
+#define MMC_CMDGOIDLE 0
+#define MMC_CMDINIT 1
+#define MMC_CMDREADCSD 9
+#define MMC_CMDSTOP 12
+#define MMC_CMDSETBLOCKLEN 16
+#define MMC_CMDREAD 17
+#define MMC_CMDREADMULTIPLE 18
+#define MMC_CMDWRITE 24
+#define MMC_CMDWRITEMULTIPLE 25
+
+/*===========================================================================*/
+/* Driver data structures and types. */
+/*===========================================================================*/
+
+/**
+ * @brief Driver state machine possible states.
+ */
+typedef enum {
+ MMC_UNINIT = 0, /**< @brief Not initialized. */
+ MMC_STOP = 1, /**< @brief Stopped. */
+ MMC_WAIT = 2, /**< @brief Waiting card. */
+ MMC_INSERTED = 3, /**< @brief Card inserted. */
+ MMC_READY = 4, /**< @brief Card ready. */
+ MMC_READING = 5, /**< @brief Reading. */
+ MMC_WRITING = 6 /**< @brief Writing. */
+} mmcstate_t;
+
+/**
+ * @brief Function used to query some hardware status bits.
+ *
+ * @return The status.
+ */
+typedef bool_t (*mmcquery_t)(void);
+
+/**
+ * @brief Driver configuration structure.
+ */
+typedef struct {
+
+} MMCConfig;
+
+/**
+ * @brief Structure representing a MMC driver.
+ */
+typedef struct {
+ /**
+ * @brief Driver state.
+ */
+ mmcstate_t mmc_state;
+ /**
+ * @brief Current configuration data.
+ */
+ const MMCConfig *mmc_config;
+ /**
+ * @brief SPI driver associated to this MMC driver. + */
+ SPIDriver *mmc_spip;
+ /**
+ * @brief SPI low speed configuration used during initialization. + */
+ const SPIConfig *mmc_lscfg;
+ /**
+ * @brief SPI high speed configuration used during transfers. + */
+ const SPIConfig *mmc_hscfg;
+ /**
+ * @brief Write protect status query function. + */
+ mmcquery_t mmc_is_protected;
+ /**
+ * @brief Insertion status query function.
+ */
+ mmcquery_t mmc_is_inserted;
+ /**
+ * @brief Card insertion event source. + */
+ EventSource mmc_inserted_event;
+ /**
+ * @brief Card removal event source. + */
+ EventSource mmc_removed_event;
+ /**
+ * @brief MMC insertion polling timer. + */
+ VirtualTimer mmc_vt;
+ /**
+ * @brief Insertion counter. + */
+ uint_fast8_t mmc_cnt;
+} MMCDriver;
+
+/*===========================================================================*/
+/* External declarations. */
+/*===========================================================================*/
+
+/**
+ * @brief Returns the driver state. + */
+#define mmcGetDriverState(mmcp) ((mmcp)->mmc_state)
+
+/**
+ * @brief Returns the write protect status. + */
+#define mmcIsWriteProtected(mmcp) ((mmcp)->mmc_is_protected())
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+ void mmcInit(void);
+ void mmcObjectInit(MMCDriver *mmcp, SPIDriver *spip,
+ const SPIConfig *lscfg, const SPIConfig *hscfg,
+ mmcquery_t is_protected, mmcquery_t is_inserted);
+ void mmcStart(MMCDriver *mmcp, const MMCConfig *config);
+ void mmcStop(MMCDriver *mmcp);
+ bool_t mmcConnect(MMCDriver *mmcp);
+ bool_t mmcDisconnect(MMCDriver *mmcp);
+ bool_t mmcStartSequentialRead(MMCDriver *mmcp, uint32_t startblk);
+ bool_t mmcSequentialRead(MMCDriver *mmcp, uint8_t *buffer);
+ bool_t mmcStopSequentialRead(MMCDriver *mmcp);
+ bool_t mmcStartSequentialWrite(MMCDriver *mmcp, uint32_t startblk);
+ bool_t mmcSequentialWrite(MMCDriver *mmcp, const uint8_t *buffer);
+ bool_t mmcStopSequentialWrite(MMCDriver *mmcp);
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* CH_HAL_USE_MMC_SPI */
+
+#endif /* _MMC_SPI_H_ */
+
+/** @} */
diff --git a/os/hal/include/pal.h b/os/hal/include/pal.h new file mode 100644 index 000000000..2ea625d5e --- /dev/null +++ b/os/hal/include/pal.h @@ -0,0 +1,469 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file pal.h
+ * @brief I/O Ports Abstraction Layer macros, types and structures
+ * @addtogroup PAL
+ * @{
+ */
+
+#ifndef _PAL_H_
+#define _PAL_H_
+
+#if CH_HAL_USE_PAL
+
+/**
+ * @brief Bits in a mode word dedicated as mode selector.
+ * @details The other bits are not defined and may be used as device-specific
+ * option bits. + */
+#define PAL_MODE_MASK 0xF
+
+/**
+ * @brief After reset state.
+ * @details The state itself is not specified and is architecture dependent,
+ * it is guaranteed to be equal to the after-reset state. It is
+ * usually an input state. + */
+#define PAL_MODE_RESET 0
+
+/**
+ * @brief Safe state for <b>unconnected</b> pads. + * @details The state itself is not specified and is architecture dependent,
+ * it may be mapped on @p PAL_MODE_INPUT_PULLUP,
+ * @p PAL_MODE_INPUT_PULLDOWN or @p PAL_MODE_OUTPUT_PUSHPULL as
+ * example.
+ */
+#define PAL_MODE_UNCONNECTED 1
+
+/**
+ * @brief Regular input high-Z pad.
+ */
+#define PAL_MODE_INPUT 2
+
+/**
+ * @brief Input pad with weak pull up resistor. + */
+#define PAL_MODE_INPUT_PULLUP 3
+
+/**
+ * @brief Input pad with weak pull down resistor.
+ */
+#define PAL_MODE_INPUT_PULLDOWN 4
+
+/**
+ * @brief Analog input mode. + */
+#define PAL_MODE_INPUT_ANALOG 5
+
+/**
+ * @brief Push-pull output pad.
+ */
+#define PAL_MODE_OUTPUT_PUSHPULL 6
+
+/**
+ * @brief Open-drain output pad.
+ */
+#define PAL_MODE_OUTPUT_OPENDRAIN 7
+
+#include "pal_lld.h"
+
+/**
+ * @brief Logical low state. + */
+#define PAL_LOW 0
+
+/**
+ * @brief Logical high state.
+ */
+#define PAL_HIGH 1
+
+/**
+ * @brief Port bit helper macro.
+ * @details This macro calculates the mask of a bit within a port.
+ *
+ * @param[in] n the bit position within the port
+ * @return The bit mask. + */
+#define PAL_PORT_BIT(n) ((ioportmask_t)(1 << (n)))
+
+
+/**
+ * @brief Bits group mask helper.
+ * @details This macro calculates the mask of a bits group.
+ *
+ * @param[in] width the group width + * @return The group mask.
+ */
+#define PAL_GROUP_MASK(width) ((ioportmask_t)(1 << (width)) - 1)
+
+/**
+ * @brief Data part of a static I/O bus initializer.
+ * @details This macro should be used when statically initializing an I/O bus
+ * that is part of a bigger structure.
+ *
+ * @param name the name of the IOBus variable
+ * @param port the I/O port descriptor
+ * @param width the bus width in bits
+ * @param offset the bus bit offset within the port
+ */
+#define _IOBUS_DATA(name, port, width, offset) \
+ {port, PAL_GROUP_MASK(width), offset}
+
+/**
+ * @brief Static I/O bus initializer.
+ *
+ * @param name the name of the IOBus variable
+ * @param port the I/O port descriptor
+ * @param width the bus width in bits
+ * @param offset the bus bit offset within the port
+ */
+#define IOBUS_DECL(name, port, width, offset) \
+ IOBus name = _IOBUS_DATA(name, port, width, offset)
+
+/**
+ * @brief I/O bus descriptor.
+ * @details This structure describes a group of contiguous digital I/O lines
+ * that have to be handled as bus.
+ * @note I/O operations on a bus do not affect I/O lines on the same port but
+ * not belonging to the bus. + */
+typedef struct {
+ /** Port identifier.*/
+ ioportid_t bus_portid;
+ /** Bus mask aligned to port bit 0. The bus mask implicitly define the bus
+ width. A logical AND is performed on the bus data.*/
+ ioportmask_t bus_mask;
+ /** Offset, within the port, of the least significant bit of the bus.*/
+ uint_fast8_t bus_offset;
+} IOBus;
+
+/**
+ * @brief PAL subsystem initialization.
+ *
+ * @param[in] config pointer to an architecture specific configuration
+ * structure. This structure is defined in the low level driver
+ * header. + */
+#define palInit(config) pal_lld_init(config)
+
+/**
+ * @brief Reads the physical I/O port states.
+ *
+ * @param[in] port the port identifier
+ * @return The port logical states.
+ *
+ * @note The default implementation always return zero and computes the
+ * parameter eventual side effects.
+ */
+#if !defined(pal_lld_readport) || defined(__DOXYGEN__)
+#define palReadPort(port) ((void)(port), 0)
+#else
+#define palReadPort(port) pal_lld_readport(port)
+#endif
+
+/**
+ * @brief Reads the output latch.
+ * @details The purpose of this function is to read back the latched output
+ * value.
+ * + * @param[in] port the port identifier
+ * @return The latched logical states.
+ *
+ * @note The default implementation always return zero and computes the
+ * parameter eventual side effects.
+ */
+#if !defined(pal_lld_readlatch) || defined(__DOXYGEN__)
+#define palReadLatch(port) ((void)(port), 0)
+#else
+#define palReadLatch(port) pal_lld_readlatch(port)
+#endif
+
+/**
+ * @brief Writes a bits mask on a I/O port.
+ *
+ * @param[in] port the port identifier
+ * @param[in] bits the bits to be written on the specified port
+ *
+ * @note The default implementation does nothing except computing the
+ * parameters eventual side effects.
+ */
+#if !defined(pal_lld_writeport) || defined(__DOXYGEN__)
+#define palWritePort(port, bits) ((void)(port), (void)(bits))
+#else
+#define palWritePort(port, bits) pal_lld_writeport(port, bits)
+#endif
+
+/**
+ * @brief Sets a bits mask on a I/O port.
+ *
+ * @param[in] port the port identifier
+ * @param[in] bits the bits to be ORed on the specified port
+ *
+ * @note The operation is not guaranteed to be atomic on all the architectures,
+ * for atomicity and/or portability reasons you may need to enclose port
+ * I/O operations between @p chSysLock() and @p chSysUnlock().
+ * @note The default implementation is non atomic and not necessarily
+ * optimal. Low level drivers may optimize the function by using
+ * specific hardware or coding.
+ */
+#if !defined(pal_lld_setport) || defined(__DOXYGEN__)
+#define palSetPort(port, bits) { \
+ palWritePort(port, palReadLatch(port) | (bits)); \
+}
+#else
+#define palSetPort(port, bits) pal_lld_setport(port, bits)
+#endif
+
+/**
+ * @brief Clears a bits mask on a I/O port.
+ *
+ * @param[in] port the port identifier
+ * @param[in] bits the bits to be cleared on the specified port
+ *
+ * @note The operation is not guaranteed to be atomic on all the architectures,
+ * for atomicity and/or portability reasons you may need to enclose port
+ * I/O operations between @p chSysLock() and @p chSysUnlock().
+ * @note The default implementation is non atomic and not necessarily
+ * optimal. Low level drivers may optimize the function by using
+ * specific hardware or coding.
+ */
+#if !defined(pal_lld_clearport) || defined(__DOXYGEN__)
+#define palClearPort(port, bits) { \
+ palWritePort(port, palReadLatch(port) & ~(bits)); \
+}
+#else
+#define palClearPort(port, bits) pal_lld_clearport(port, bits)
+#endif
+
+/**
+ * @brief Toggles a bits mask on a I/O port.
+ *
+ * @param[in] port the port identifier
+ * @param[in] bits the bits to be XORed on the specified port
+ *
+ * @note The operation is not guaranteed to be atomic on all the architectures,
+ * for atomicity and/or portability reasons you may need to enclose port
+ * I/O operations between @p chSysLock() and @p chSysUnlock().
+ * @note The default implementation is non atomic and not necessarily
+ * optimal. Low level drivers may optimize the function by using
+ * specific hardware or coding.
+ */
+#if !defined(pal_lld_toggleport) || defined(__DOXYGEN__)
+#define palTogglePort(port, bits) { \
+ palWritePort(port, palReadLatch(port) ^ (bits)); \
+}
+#else
+#define palTogglePort(port, bits) pal_lld_toggleport(port, bits)
+#endif
+
+/**
+ * @brief Reads a group of bits.
+ * + * @param[in] port the port identifier
+ * @param[in] mask the group mask, a logical AND is performed on the input
+ * data
+ * @param[in] offset the group bit offset within the port
+ * @return The group logical states.
+ */
+#if !defined(pal_lld_readgroup) || defined(__DOXYGEN__)
+#define palReadGroup(port, mask, offset) \
+ ((palReadPort(port) >> (offset)) & (mask))
+#else
+#define palReadGroup(port, mask, offset) pal_lld_readgroup(port, mask, offset)
+#endif
+
+/**
+ * @brief Writes a group of bits.
+ *
+ * @param[in] port the port identifier
+ * @param[in] mask the group mask, a logical AND is performed on the output
+ * data
+ * @param[in] offset the group bit offset within the port
+ * @param[in] bits the bits to be written. Values exceeding the group width
+ * are masked.
+ */
+#if !defined(pal_lld_writegroup) || defined(__DOXYGEN__)
+#define palWriteGroup(port, mask, offset, bits) { \
+ palWritePort(port, (palReadLatch(port) & ~((mask) << (offset))) | \
+ (((bits) & (mask)) << (offset))); \
+}
+#else
+#define palWriteGroup(port, mask, offset, bits) \
+ pal_lld_writegroup(port, mask, offset, bits)
+#endif
+
+
+/**
+ * @brief Pads group mode setup.
+ * @details This function programs a pads group belonging to the same port
+ * with the specified mode.
+ *
+ * @param[in] port the port identifier
+ * @param[in] mask the group mask
+ * @param[in] mode the setup mode
+ *
+ * @note Programming an unknown or unsupported mode is silently ignored.
+ */
+#if !defined(pal_lld_setgroupmode) || defined(__DOXYGEN__)
+#define palSetGroupMode(port, mask, mode)
+#else
+#define palSetGroupMode(port, mask, mode) pal_lld_setgroupmode(port, mask, mode)
+#endif
+
+/**
+ * @brief Reads an input pad logical state.
+ *
+ * @param[in] port the port identifier
+ * @param[in] pad the pad number within the port
+ * @return The logical state.
+ * @retval 0 low logical state.
+ * @retval 1 high logical state.
+ *
+ * @note The default implementation not necessarily optimal. Low level drivers
+ * may optimize the function by using specific hardware or coding.
+ * @note The default implementation internally uses the @p palReadPort().
+ */
+#if !defined(pal_lld_readpad) || defined(__DOXYGEN__)
+#define palReadPad(port, pad) ((palReadPort(port) >> (pad)) & 1)
+#else
+#define palReadPad(port, pad) pal_lld_readpad(port, pad)
+#endif
+
+/**
+ * @brief Writes a logical state on an output pad.
+ *
+ * @param[in] port the port identifier
+ * @param[in] pad the pad number within the port
+ * @param[out] bit the logical value, the value must be @p 0 or @p 1
+ *
+ * @note The operation is not guaranteed to be atomic on all the architectures,
+ * for atomicity and/or portability reasons you may need to enclose port
+ * I/O operations between @p chSysLock() and @p chSysUnlock().
+ * @note The default implementation is non atomic and not necessarily
+ * optimal. Low level drivers may optimize the function by using
+ * specific hardware or coding.
+ * @note The default implementation internally uses the @p palReadLatch() and
+ * @p palWritePort().
+ */
+#if !defined(pal_lld_writepad) || defined(__DOXYGEN__)
+#define palWritePad(port, pad, bit) { \
+ palWritePort(port, (palReadLatch(port) & ~PAL_PORT_BIT(pad)) | \
+ (((bit) & 1) << pad)); \
+}
+#else
+#define palWritePad(port, pad, bit) pal_lld_writepad(port, pad, bit)
+#endif
+
+/**
+ * @brief Sets a pad logical state to @p 1.
+ *
+ * @param[in] port the port identifier
+ * @param[in] pad the pad number within the port
+ *
+ * @note The operation is not guaranteed to be atomic on all the architectures,
+ * for atomicity and/or portability reasons you may need to enclose port
+ * I/O operations between @p chSysLock() and @p chSysUnlock().
+ * @note The default implementation is non atomic and not necessarily
+ * optimal. Low level drivers may optimize the function by using
+ * specific hardware or coding.
+ * @note The default implementation internally uses the @p palSetPort().
+ */
+#if !defined(pal_lld_setpad) || defined(__DOXYGEN__)
+#define palSetPad(port, pad) palSetPort(port, PAL_PORT_BIT(pad))
+#else
+#define palSetPad(port, pad) pal_lld_setpad(port, pad)
+#endif
+
+/**
+ * @brief Clears a pad logical state to @p 0.
+ *
+ * @param[in] port the port identifier
+ * @param[in] pad the pad number within the port
+ *
+ * @note The operation is not guaranteed to be atomic on all the architectures,
+ * for atomicity and/or portability reasons you may need to enclose port
+ * I/O operations between @p chSysLock() and @p chSysUnlock().
+ * @note The default implementation is non atomic and not necessarily
+ * optimal. Low level drivers may optimize the function by using
+ * specific hardware or coding.
+ * @note The default implementation internally uses the @p palClearPort().
+ */
+#if !defined(pal_lld_clearpad) || defined(__DOXYGEN__)
+#define palClearPad(port, pad) palClearPort(port, PAL_PORT_BIT(pad))
+#else
+#define palClearPad(port, pad) pal_lld_clearpad(port, pad)
+#endif
+
+/**
+ * @brief Toggles a pad logical state.
+ *
+ * @param[in] port the port identifier
+ * @param[in] pad the pad number within the port
+ *
+ * @note The operation is not guaranteed to be atomic on all the architectures,
+ * for atomicity and/or portability reasons you may need to enclose port
+ * I/O operations between @p chSysLock() and @p chSysUnlock().
+ * @note The default implementation is non atomic and not necessarily
+ * optimal. Low level drivers may optimize the function by using
+ * specific hardware or coding.
+ * @note The default implementation internally uses the @p palTogglePort().
+ */
+#if !defined(pal_lld_togglepad) || defined(__DOXYGEN__)
+#define palTogglePad(port, pad) palTogglePort(port, PAL_PORT_BIT(pad))
+#else
+#define palTogglePad(port, pad) pal_lld_togglepad(port, pad)
+#endif
+
+
+/**
+ * @brief Pad mode setup.
+ * @details This function programs a pad with the specified mode.
+ *
+ * @param[in] port the port identifier
+ * @param[in] pad the pad number within the port
+ * @param[in] mode the setup mode
+ *
+ * @note The default implementation not necessarily optimal. Low level drivers
+ * may optimize the function by using specific hardware or coding.
+ * @note Programming an unknown or unsupported mode is silently ignored.
+ */
+#if !defined(pal_lld_setpadmode) || defined(__DOXYGEN__)
+#define palSetPadMode(port, pad, mode) \
+ palSetGroupMode(port, PAL_PORT_BIT(pad), mode)
+#else
+#define palSetPadMode(port, pad, mode) pal_lld_setpadmode(port, pad, mode)
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+ ioportmask_t palReadBus(IOBus *bus);
+ void palWriteBus(IOBus *bus, ioportmask_t bits);
+ void palSetBusMode(IOBus *bus, uint_fast8_t mode);
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _PAL_H_ */
+
+#endif /* CH_HAL_USE_PAL */
+
+/** @} */
diff --git a/os/hal/include/serial.h b/os/hal/include/serial.h new file mode 100644 index 000000000..54e8b33a9 --- /dev/null +++ b/os/hal/include/serial.h @@ -0,0 +1,197 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file serial.h
+ * @brief Serial Driver macros and structures.
+ * @addtogroup SERIAL
+ * @{
+ */
+
+#ifndef _SERIAL_H_
+#define _SERIAL_H_
+
+#if CH_HAL_USE_SERIAL
+
+/** No pending conditions.*/
+#define SD_NO_ERROR 0
+/** Connection happened.*/
+#define SD_CONNECTED 1
+/** Disconnection happened.*/
+#define SD_DISCONNECTED 2
+/** Parity error happened.*/
+#define SD_PARITY_ERROR 4
+/** Framing error happened.*/
+#define SD_FRAMING_ERROR 8
+/** Overflow happened.*/
+#define SD_OVERRUN_ERROR 16
+/** Break detected.*/
+#define SD_BREAK_DETECTED 32
+
+/**
+ * @brief Structure representing a serial driver. + */
+typedef struct _SerialDriver SerialDriver;
+
+#include "serial_lld.h"
+
+/**
+ * @brief @p SerialDriver specific methods.
+ */
+struct _serial_driver_methods {
+};
+
+/**
+ * @brief @p SerialDriver virtual methods table.
+ */
+struct SerialDriverVMT {
+ /**
+ * @p BaseChannel class inherited methods.
+ */
+ struct _base_channel_methods m0;
+ /**
+ * @p BaseAsynchronousChannel class inherited methods.
+ */
+ struct _base_asynchronous_channel_methods m1;
+ /**
+ * @p SerialDriver specific methods.
+ */
+ struct _serial_driver_methods m2;
+};
+
+/**
+ * @extends BaseAsynchronousChannel
+ *
+ * @brief Full duplex serial driver class.
+ * @details This class extends @p BaseAsynchronousChannel by adding physical
+ * I/O queues.
+ */
+struct _SerialDriver {
+ /**
+ * Virtual Methods Table.
+ */
+ const struct SerialDriverVMT *vmt;
+ /**
+ * @p BaseChannel class inherited data.
+ */
+ struct _base_channel_data d0;
+ /**
+ * @p BaseAsynchronousChannel class inherited data.
+ */
+ struct _base_asynchronous_channel_data d1;
+ /**
+ * @p SerialDriver specific data.
+ */
+ struct _serial_driver_data d2;
+};
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+ void sdInit(void);
+ void sdObjectInit(SerialDriver *sdp, qnotify_t inotify, qnotify_t onotify);
+ void sdStart(SerialDriver *sdp, const SerialDriverConfig *config);
+ void sdStop(SerialDriver *sdp);
+ void sdIncomingDataI(SerialDriver *sdp, uint8_t b);
+ msg_t sdRequestDataI(SerialDriver *sdp);
+ void sdAddFlagsI(SerialDriver *sdp, sdflags_t mask);
+ sdflags_t sdGetAndClearFlags(SerialDriver *sdp);
+#ifdef __cplusplus
+}
+#endif
+
+/**
+ * @brief Direct output check on a @p SerialDriver. + * @details This function bypasses the indirect access to the channel and
+ * checks directly the output queue. This is faster but cannot
+ * be used to check different channels implementations.
+ * @see chIOPutWouldBlock()
+ */
+#define sdPutWouldBlock(sdp) chOQIsFull(&(sdp)->d2.oqueue)
+
+/**
+ * @brief Direct input check on a @p SerialDriver.
+ * @details This function bypasses the indirect access to the channel and
+ * checks directly the input queue. This is faster but cannot
+ * be used to check different channels implementations.
+ * @see chIOGetWouldBlock()
+ */
+#define sdGetWouldBlock(sdp) chIQIsEmpty(&(sdp)->d2.iqueue)
+
+/**
+ * @brief Direct blocking write to a @p SerialDriver.
+ * @details This function bypasses the indirect access to the channel and
+ * writes directly on the output queue. This is faster but cannot
+ * be used to write to different channels implementations.
+ * @see chIOPut()
+ */
+#define sdPut(sdp, b) chOQPut(&(sdp)->d2.oqueue, b)
+
+/**
+ * @brief Direct blocking write on a @p SerialDriver with timeout
+ * specification.
+ * @details This function bypasses the indirect access to the channel and
+ * writes directly on the output queue. This is faster but cannot
+ * be used to write to different channels implementations.
+ * @see chIOPutTimeout()
+ */
+#define sdPutTimeout(sdp, b, t) chOQPutTimeout(&(sdp)->d2.iqueue, b, t)
+
+/**
+ * @brief Direct blocking read from a @p SerialDriver.
+ * @details This function bypasses the indirect access to the channel and
+ * reads directly from the input queue. This is faster but cannot
+ * be used to read from different channels implementations.
+ * @see chIOGet()
+ */
+#define sdGet(sdp) chIQGet(&(sdp)->d2.iqueue)
+
+/**
+ * @brief Direct blocking read from a @p SerialDriver with timeout
+ * specification.
+ * @details This function bypasses the indirect access to the channel and
+ * reads directly from the input queue. This is faster but cannot
+ * be used to read from different channels implementations.
+ * @see chIOGetTimeout()
+ */
+#define sdGetTimeout(sdp, t) chIQGetTimeout(&(sdp)->d2.iqueue, t)
+
+/**
+ * @brief Direct non-blocking write to a @p SerialDriver.
+ * @details This function bypasses the indirect access to the channel and
+ * writes directly to the output queue. This is faster but cannot
+ * be used to write from different channels implementations.
+ * @see chIOWrite()
+ */
+#define sdWrite(sdp, b, n) chOQWrite(&(sdp)->d2.oqueue, b, n)
+
+/**
+ * @brief Direct non-blocking read on a @p SerialDriver.
+ * @details This function bypasses the indirect access to the channel and
+ * reads directly from the input queue. This is faster but cannot
+ * be used to read from different channels implementations.
+ * @see chIORead()
+ */
+#define sdRead(sdp, b, n) chIQRead(&(sdp)->d2.iqueue, b, n)
+
+#endif /* CH_HAL_USE_SERIAL */
+
+#endif /* _SERIAL_H_ */
+
+/** @} */
diff --git a/os/hal/include/spi.h b/os/hal/include/spi.h new file mode 100644 index 000000000..6f17f69c2 --- /dev/null +++ b/os/hal/include/spi.h @@ -0,0 +1,80 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file spi.h
+ * @brief SPI Driver macros and structures.
+ * @addtogroup SPI
+ * @{
+ */
+
+#ifndef _SPI_H_
+#define _SPI_H_
+
+#if CH_HAL_USE_SPI
+
+/**
+ * @brief Enables the mutual exclusion APIs on the SPI bus.
+ */
+#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define SPI_USE_MUTUAL_EXCLUSION TRUE
+#endif
+
+#if SPI_USE_MUTUAL_EXCLUSION && !CH_USE_MUTEXES && !CH_USE_SEMAPHORES
+#error "SPI_USE_MUTUAL_EXCLUSION requires CH_USE_MUTEXES and/or CH_USE_SEMAPHORES"
+#endif
+
+/**
+ * @brief Driver state machine possible states.
+ */
+typedef enum {
+ SPI_UNINIT = 0, /**< @brief Not initialized. */
+ SPI_STOP = 1, /**< @brief Stopped. */
+ SPI_READY = 2, /**< @brief Ready. */
+ SPI_ACTIVE = 3 /**< @brief Slave selected. */
+} spistate_t;
+
+#include "spi_lld.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+ void spiInit(void);
+ void spiObjectInit(SPIDriver *spip);
+ void spiStart(SPIDriver *spip, const SPIConfig *config);
+ void spiStop(SPIDriver *spip);
+ void spiSelect(SPIDriver *spip);
+ void spiUnselect(SPIDriver *spip);
+ void spiIgnore(SPIDriver *spip, size_t n);
+ void spiExchange(SPIDriver *spip, size_t n, const void *txbuf, void *rxbuf);
+ void spiSend(SPIDriver *spip, size_t n, const void *txbuf);
+ void spiReceive(SPIDriver *spip, size_t n, void *rxbuf);
+#if SPI_USE_MUTUAL_EXCLUSION
+ void spiAcquireBus(SPIDriver *spip);
+ void spiReleaseBus(SPIDriver *spip);
+#endif /* SPI_USE_MUTUAL_EXCLUSION */
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* CH_HAL_USE_SPI */
+
+#endif /* _SPI_H_ */
+
+/** @} */
|