aboutsummaryrefslogtreecommitdiffstats
path: root/os/common
diff options
context:
space:
mode:
Diffstat (limited to 'os/common')
-rw-r--r--os/common/ports/e200/compilers/GCC/vectors.h63
-rw-r--r--os/common/ports/e200/devices/SPC560BCxx/ppcparams.h16
-rw-r--r--os/common/ports/e200/devices/SPC560Bxx/ppcparams.h16
-rw-r--r--os/common/ports/e200/devices/SPC560Dxx/ppcparams.h16
-rw-r--r--os/common/ports/e200/devices/SPC560Pxx/ppcparams.h16
-rw-r--r--os/common/ports/e200/devices/SPC563Mxx/ppcparams.h16
-rw-r--r--os/common/ports/e200/devices/SPC564Axx/ppcparams.h16
-rw-r--r--os/common/ports/e200/devices/SPC56ECxx/ppcparams.h16
-rw-r--r--os/common/ports/e200/devices/SPC56ELxx/ppcparams.h16
9 files changed, 180 insertions, 11 deletions
diff --git a/os/common/ports/e200/compilers/GCC/vectors.h b/os/common/ports/e200/compilers/GCC/vectors.h
index 60241864e..e1693a66e 100644
--- a/os/common/ports/e200/compilers/GCC/vectors.h
+++ b/os/common/ports/e200/compilers/GCC/vectors.h
@@ -35,15 +35,17 @@
/* Module constants. */
/*===========================================================================*/
-/* The following code is not processed when the file is included from an
- asm module.*/
-#if !defined(_FROM_ASM_)
+#if PPC_INTC_TYPE == 0
+#define INTC_IACKR_ADDR (PPC_INTC_BASE + 0x10)
+#define INTC_EOIR_ADDR (PPC_INTC_BASE + 0x18)
-#define INTC_MCR *((volatile uint32_t *)0xfff48000)
-#define INTC_CPR *((volatile uint32_t *)0xfff48008)
-#define INTC_IACKR *((volatile uint32_t *)0xfff48010)
+#elif PPC_INTC_TYPE == 1
+#define INTC_IACKR_ADDR (PPC_INTC_BASE + 0x20)
+#define INTC_EOIR_ADDR (PPC_INTC_BASE + 0x30)
-#endif /* !defined(_FROM_ASM_) */
+#else
+#error "unknown INTC type"
+#endif
/*===========================================================================*/
/* Module pre-compile time settings. */
@@ -61,6 +63,40 @@
/* Module macros. */
/*===========================================================================*/
+/* The following code is not processed when the file is included from an
+ asm module.*/
+#if !defined(_FROM_ASM_)
+
+/**
+ * @name INTC-related macros
+ * @{
+ */
+#if PPC_INTC_TYPE == 0
+#define INTC_BCR (*((volatile uint32_t *)(PPC_INTC_BASE + 0)))
+#define INTC_CPR(n) (*((volatile uint32_t *)(PPC_INTC_BASE + 8 + ((n) * sizeof (uint32_t)))))
+#define INTC_IACKR(n) (*((volatile uint32_t *)(PPC_INTC_BASE + 0x10 + ((n) * sizeof (uint32_t)))))
+#define INTC_EOIR(n) (*((volatile uint32_t *)(PPC_INTC_BASE + 0x18 + ((n) * sizeof (uint32_t)))))
+#define INTC_PSR(n) (*((volatile uint8_t *)(PPC_INTC_BASE + 0x40 + ((n) * sizeof (uint8_t)))))
+
+#elif PPC_INTC_TYPE == 1
+#define INTC_BCR (*((volatile uint32_t *)(PPC_INTC_BASE + 0)))
+#define INTC_MPROT (*((volatile uint32_t *)(PPC_INTC_BASE + 4)))
+#define INTC_CPR(n) (*((volatile uint32_t *)(PPC_INTC_BASE + 0x10 + ((n) * sizeof (uint32_t)))))
+#define INTC_IACKR(n) (*((volatile uint32_t *)(PPC_INTC_BASE + 0x20 + ((n) * sizeof (uint32_t)))))
+#define INTC_EOIR(n) (*((volatile uint32_t *)(PPC_INTC_BASE + 0x30 + ((n) * sizeof (uint32_t)))))
+#define INTC_PSR(n) (*((volatile uint16_t *)(PPC_INTC_BASE + 0x60 + ((n) * sizeof (uint16_t)))))
+
+#else
+#error "unknown INTC type"
+#endif
+
+/**
+ * @brief PSR register content helper
+ */
+#define INTC_PSR_ENABLE(cores, prio) ((uint32_t)(cores) | (uint32_t)(prio))
+
+#endif /* !defined(_FROM_ASM_) */
+
/*===========================================================================*/
/* External declarations. */
/*===========================================================================*/
@@ -92,10 +128,15 @@ extern "C" {
#if !defined(_FROM_ASM_)
static inline void intc_init(void) {
-
- INTC_MCR = 0;
- INTC_CPR = 0;
- INTC_IACKR = (uint32_t)_vectors;
+ unsigned i;
+
+ /* INTC initialization, software vector mode, 4 bytes vectors, starting
+ at priority 0.*/
+ INTC_BCR = 0;
+ for (i = 0; i < PPC_CORE_NUMBER; i++) {
+ INTC_CPR(i) = 0;
+ INTC_IACKR(i) = (uint32_t)_vectors;
+ }
}
#endif /* !defined(_FROM_ASM_) */
diff --git a/os/common/ports/e200/devices/SPC560BCxx/ppcparams.h b/os/common/ports/e200/devices/SPC560BCxx/ppcparams.h
index 5b29a80c8..6bda168c6 100644
--- a/os/common/ports/e200/devices/SPC560BCxx/ppcparams.h
+++ b/os/common/ports/e200/devices/SPC560BCxx/ppcparams.h
@@ -38,6 +38,11 @@
#define PPC_VARIANT PPC_VARIANT_e200z0
/**
+ * @brief Number of cores.
+ */
+#define PPC_CORE_NUMBER 1
+
+/**
* @brief Number of writable bits in IVPR register.
*/
#define PPC_IVPR_BITS 20
@@ -72,6 +77,17 @@
*/
#define PPC_NUM_VECTORS 217
+/**
+ * @brief Memory address of the INTC controller.
+ */
+#define PPC_INTC_BASE 0xFFF48000
+
+/**
+ * @brief Type of the INTC controller.
+ * @note 0=SPC56x, 1=SPC57x.
+ */
+#define PPC_INTC_TYPE 0
+
#endif /* _PPCPARAMS_H_ */
/** @} */
diff --git a/os/common/ports/e200/devices/SPC560Bxx/ppcparams.h b/os/common/ports/e200/devices/SPC560Bxx/ppcparams.h
index 451971b61..c7fd78626 100644
--- a/os/common/ports/e200/devices/SPC560Bxx/ppcparams.h
+++ b/os/common/ports/e200/devices/SPC560Bxx/ppcparams.h
@@ -38,6 +38,11 @@
#define PPC_VARIANT PPC_VARIANT_e200z0
/**
+ * @brief Number of cores.
+ */
+#define PPC_CORE_NUMBER 1
+
+/**
* @brief Number of writable bits in IVPR register.
*/
#define PPC_IVPR_BITS 20
@@ -72,6 +77,17 @@
*/
#define PPC_NUM_VECTORS 234
+/**
+ * @brief Memory address of the INTC controller.
+ */
+#define PPC_INTC_BASE 0xFFF48000
+
+/**
+ * @brief Type of the INTC controller.
+ * @note 0=SPC56x, 1=SPC57x.
+ */
+#define PPC_INTC_TYPE 0
+
#endif /* _PPCPARAMS_H_ */
/** @} */
diff --git a/os/common/ports/e200/devices/SPC560Dxx/ppcparams.h b/os/common/ports/e200/devices/SPC560Dxx/ppcparams.h
index 51f6824b7..0e973b691 100644
--- a/os/common/ports/e200/devices/SPC560Dxx/ppcparams.h
+++ b/os/common/ports/e200/devices/SPC560Dxx/ppcparams.h
@@ -38,6 +38,11 @@
#define PPC_VARIANT PPC_VARIANT_e200z0
/**
+ * @brief Number of cores.
+ */
+#define PPC_CORE_NUMBER 1
+
+/**
* @brief Number of writable bits in IVPR register.
*/
#define PPC_IVPR_BITS 20
@@ -72,6 +77,17 @@
*/
#define PPC_NUM_VECTORS 155
+/**
+ * @brief Memory address of the INTC controller.
+ */
+#define PPC_INTC_BASE 0xFFF48000
+
+/**
+ * @brief Type of the INTC controller.
+ * @note 0=SPC56x, 1=SPC57x.
+ */
+#define PPC_INTC_TYPE 0
+
#endif /* _PPCPARAMS_H_ */
/** @} */
diff --git a/os/common/ports/e200/devices/SPC560Pxx/ppcparams.h b/os/common/ports/e200/devices/SPC560Pxx/ppcparams.h
index 83cc43a75..2b5327a55 100644
--- a/os/common/ports/e200/devices/SPC560Pxx/ppcparams.h
+++ b/os/common/ports/e200/devices/SPC560Pxx/ppcparams.h
@@ -38,6 +38,11 @@
#define PPC_VARIANT PPC_VARIANT_e200z0
/**
+ * @brief Number of cores.
+ */
+#define PPC_CORE_NUMBER 1
+
+/**
* @brief Number of writable bits in IVPR register.
*/
#define PPC_IVPR_BITS 20
@@ -72,6 +77,17 @@
*/
#define PPC_NUM_VECTORS 261
+/**
+ * @brief Memory address of the INTC controller.
+ */
+#define PPC_INTC_BASE 0xFFF48000
+
+/**
+ * @brief Type of the INTC controller.
+ * @note 0=SPC56x, 1=SPC57x.
+ */
+#define PPC_INTC_TYPE 0
+
#endif /* _PPCPARAMS_H_ */
/** @} */
diff --git a/os/common/ports/e200/devices/SPC563Mxx/ppcparams.h b/os/common/ports/e200/devices/SPC563Mxx/ppcparams.h
index 29bc22eb7..65ebb3d4e 100644
--- a/os/common/ports/e200/devices/SPC563Mxx/ppcparams.h
+++ b/os/common/ports/e200/devices/SPC563Mxx/ppcparams.h
@@ -38,6 +38,11 @@
#define PPC_VARIANT PPC_VARIANT_e200z3
/**
+ * @brief Number of cores.
+ */
+#define PPC_CORE_NUMBER 1
+
+/**
* @brief Number of writable bits in IVPR register.
*/
#define PPC_IVPR_BITS 16
@@ -72,6 +77,17 @@
*/
#define PPC_NUM_VECTORS 360
+/**
+ * @brief Memory address of the INTC controller.
+ */
+#define PPC_INTC_BASE 0xFFF48000
+
+/**
+ * @brief Type of the INTC controller.
+ * @note 0=SPC56x, 1=SPC57x.
+ */
+#define PPC_INTC_TYPE 0
+
#endif /* _PPCPARAMS_H_ */
/** @} */
diff --git a/os/common/ports/e200/devices/SPC564Axx/ppcparams.h b/os/common/ports/e200/devices/SPC564Axx/ppcparams.h
index badc1a83b..a4cdb1aca 100644
--- a/os/common/ports/e200/devices/SPC564Axx/ppcparams.h
+++ b/os/common/ports/e200/devices/SPC564Axx/ppcparams.h
@@ -38,6 +38,11 @@
#define PPC_VARIANT PPC_VARIANT_e200z4
/**
+ * @brief Number of cores.
+ */
+#define PPC_CORE_NUMBER 1
+
+/**
* @brief Number of writable bits in IVPR register.
*/
#define PPC_IVPR_BITS 16
@@ -72,6 +77,17 @@
*/
#define PPC_NUM_VECTORS 486
+/**
+ * @brief Memory address of the INTC controller.
+ */
+#define PPC_INTC_BASE 0xFFF48000
+
+/**
+ * @brief Type of the INTC controller.
+ * @note 0=SPC56x, 1=SPC57x.
+ */
+#define PPC_INTC_TYPE 0
+
#endif /* _PPCPARAMS_H_ */
/** @} */
diff --git a/os/common/ports/e200/devices/SPC56ECxx/ppcparams.h b/os/common/ports/e200/devices/SPC56ECxx/ppcparams.h
index d46216e73..6987bd603 100644
--- a/os/common/ports/e200/devices/SPC56ECxx/ppcparams.h
+++ b/os/common/ports/e200/devices/SPC56ECxx/ppcparams.h
@@ -38,6 +38,11 @@
#define PPC_VARIANT PPC_VARIANT_e200z4
/**
+ * @brief Number of cores.
+ */
+#define PPC_CORE_NUMBER 1
+
+/**
* @brief Number of writable bits in IVPR register.
*/
#define PPC_IVPR_BITS 16
@@ -72,6 +77,17 @@
*/
#define PPC_NUM_VECTORS 279
+/**
+ * @brief Memory address of the INTC controller.
+ */
+#define PPC_INTC_BASE 0xFFF48000
+
+/**
+ * @brief Type of the INTC controller.
+ * @note 0=SPC56x, 1=SPC57x.
+ */
+#define PPC_INTC_TYPE 0
+
#endif /* _PPCPARAMS_H_ */
/** @} */
diff --git a/os/common/ports/e200/devices/SPC56ELxx/ppcparams.h b/os/common/ports/e200/devices/SPC56ELxx/ppcparams.h
index c588a1d8e..6cb905582 100644
--- a/os/common/ports/e200/devices/SPC56ELxx/ppcparams.h
+++ b/os/common/ports/e200/devices/SPC56ELxx/ppcparams.h
@@ -38,6 +38,11 @@
#define PPC_VARIANT PPC_VARIANT_e200z4
/**
+ * @brief Number of cores.
+ */
+#define PPC_CORE_NUMBER 1
+
+/**
* @brief Number of writable bits in IVPR register.
*/
#define PPC_IVPR_BITS 16
@@ -72,6 +77,17 @@
*/
#define PPC_NUM_VECTORS 256
+/**
+ * @brief Memory address of the INTC controller.
+ */
+#define PPC_INTC_BASE 0xFFF48000
+
+/**
+ * @brief Type of the INTC controller.
+ * @note 0=SPC56x, 1=SPC57x.
+ */
+#define PPC_INTC_TYPE 0
+
#endif /* _PPCPARAMS_H_ */
/** @} */
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-08 21:53:26 +0000