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-rw-r--r--os/common/ports/ARM/compilers/GCC/crt0.s4
-rw-r--r--os/common/ports/ARM/compilers/GCC/ld/LPC2148.ld22
-rw-r--r--os/common/ports/ARM/compilers/GCC/rules.ld119
-rw-r--r--os/common/ports/ARM/compilers/GCC/vectors.s2
-rw-r--r--os/common/ports/ARMCMx/compilers/GCC/crt0_v6m.s2
-rw-r--r--os/common/ports/ARMCMx/compilers/GCC/crt0_v7m.s2
-rw-r--r--os/common/ports/ARMCMx/compilers/GCC/rules.ld5
-rw-r--r--os/common/ports/ARMCMx/compilers/GCC/vectors.c2
8 files changed, 129 insertions, 29 deletions
diff --git a/os/common/ports/ARM/compilers/GCC/crt0.s b/os/common/ports/ARM/compilers/GCC/crt0.s
index 696779f70..caf9f0f1e 100644
--- a/os/common/ports/ARM/compilers/GCC/crt0.s
+++ b/os/common/ports/ARM/compilers/GCC/crt0.s
@@ -38,7 +38,7 @@
.set I_BIT, 0x80
.set F_BIT, 0x40
- .text
+ .section .startup
.code 32
.balign 4
@@ -50,7 +50,7 @@ Reset_Handler:
/*
* Stack pointers initialization.
*/
- ldr r0, =___stacks_end__
+ ldr r0, =__stacks_end__
/* Undefined */
msr CPSR_c, #MODE_UND | I_BIT | F_BIT
mov sp, r0
diff --git a/os/common/ports/ARM/compilers/GCC/ld/LPC2148.ld b/os/common/ports/ARM/compilers/GCC/ld/LPC2148.ld
index 417539d67..8b2521c20 100644
--- a/os/common/ports/ARM/compilers/GCC/ld/LPC2148.ld
+++ b/os/common/ports/ARM/compilers/GCC/ld/LPC2148.ld
@@ -20,10 +20,24 @@
MEMORY
{
flash : org = 0x00000000, len = 512k - 12k
- ram : org = 0x40000200, len = 32k - 0x200 - 288
- ram1 : org = 0, len = 0
- ram2 : org = 0, len = 0
- ram3 : org = 0, len = 0
+ ram0 : org = 0x40000200, len = 32k - 0x200 - 288
+ ram1 : org = 0x00000000, len = 0
+ ram2 : org = 0x00000000, len = 0
+ ram3 : org = 0x00000000, len = 0
+ ram4 : org = 0x00000000, len = 0
+ ram5 : org = 0x00000000, len = 0
+ ram6 : org = 0x00000000, len = 0
+ ram7 : org = 0x00000000, len = 0
}
+/* RAM region to be used for stacks. This stack accommodates the processing
+ of all exceptions and interrupts*/
+REGION_ALIAS("STACKS_RAM", ram0);
+
+/* RAM region to be used for data segment.*/
+REGION_ALIAS("DATA_RAM", ram0);
+
+/* RAM region to be used for BSS segment.*/
+REGION_ALIAS("BSS_RAM", ram0);
+
INCLUDE rules.ld
diff --git a/os/common/ports/ARM/compilers/GCC/rules.ld b/os/common/ports/ARM/compilers/GCC/rules.ld
index a3a0fe6e9..f801c2f94 100644
--- a/os/common/ports/ARM/compilers/GCC/rules.ld
+++ b/os/common/ports/ARM/compilers/GCC/rules.ld
@@ -18,11 +18,10 @@
*/
__stacks_total_size__ = __und_stack_size__ + __abt_stack_size__ + __fiq_stack_size__ + __irq_stack_size__ + __svc_stack_size__ + __sys_stack_size__;
-__main_thread_stack_base__ = __ram_start__;
-__ram_start__ = ORIGIN(ram);
-__ram_size__ = LENGTH(ram);
-__ram_end__ = __ram_start__ + __ram_size__;
+__ram0_start__ = ORIGIN(ram0);
+__ram0_size__ = LENGTH(ram0);
+__ram0_end__ = __ram0_start__ + __ram0_size__;
__ram1_start__ = ORIGIN(ram1);
__ram1_size__ = LENGTH(ram1);
__ram1_end__ = __ram1_start__ + __ram1_size__;
@@ -32,6 +31,18 @@ __ram2_end__ = __ram2_start__ + __ram2_size__;
__ram3_start__ = ORIGIN(ram3);
__ram3_size__ = LENGTH(ram3);
__ram3_end__ = __ram3_start__ + __ram3_size__;
+__ram4_start__ = ORIGIN(ram4);
+__ram4_size__ = LENGTH(ram4);
+__ram4_end__ = __ram4_start__ + __ram4_size__;
+__ram5_start__ = ORIGIN(ram5);
+__ram5_size__ = LENGTH(ram5);
+__ram5_end__ = __ram5_start__ + __ram5_size__;
+__ram6_start__ = ORIGIN(ram6);
+__ram6_size__ = LENGTH(ram6);
+__ram6_end__ = __ram6_start__ + __ram6_size__;
+__ram7_start__ = ORIGIN(ram7);
+__ram7_size__ = LENGTH(ram7);
+__ram7_end__ = __ram7_start__ + __ram7_size__;
ENTRY(Reset_Handler)
@@ -42,7 +53,7 @@ SECTIONS
startup : ALIGN(16) SUBALIGN(16)
{
- KEEP(*(vectors))
+ KEEP(*(.vectors))
} > flash
constructors : ALIGN(4) SUBALIGN(4)
@@ -63,6 +74,8 @@ SECTIONS
.text : ALIGN(16) SUBALIGN(16)
{
+ *(.startup)
+ *(.startup.*)
*(.text)
*(.text.*)
*(.rodata)
@@ -105,13 +118,13 @@ SECTIONS
.stacks :
{
. = ALIGN(8);
- ___stacks_base__ = .;
+ __stacks_base__ = .;
. += __stacks_total_size__;
. = ALIGN(8);
- ___stacks_end__ = .;
- } > ram
+ __stacks_end__ = .;
+ } > STACKS_RAM
- .data ALIGN(4) : ALIGN(4)
+ .data : ALIGN(4)
{
. = ALIGN(4);
PROVIDE(_data = .);
@@ -120,9 +133,9 @@ SECTIONS
*(.ramtext)
. = ALIGN(4);
PROVIDE(_edata = .);
- } > ram AT > flash
+ } > DATA_RAM AT > flash
- .bss ALIGN(4) : ALIGN(4)
+ .bss : ALIGN(4)
{
. = ALIGN(4);
PROVIDE(_bss_start = .);
@@ -131,11 +144,83 @@ SECTIONS
*(COMMON)
. = ALIGN(4);
PROVIDE(_bss_end = .);
- } > ram
-}
+ PROVIDE(end = .);
+ } > BSS_RAM
+
+ .ram0 (NOLOAD) : ALIGN(4)
+ {
+ . = ALIGN(4);
+ *(.ram0)
+ *(.ram0.*)
+ . = ALIGN(4);
+ __ram0_free__ = .;
+ } > ram0
+
+ .ram1 (NOLOAD) : ALIGN(4)
+ {
+ . = ALIGN(4);
+ *(.ram1)
+ *(.ram1.*)
+ . = ALIGN(4);
+ __ram1_free__ = .;
+ } > ram1
+
+ .ram2 (NOLOAD) : ALIGN(4)
+ {
+ . = ALIGN(4);
+ *(.ram2)
+ *(.ram2.*)
+ . = ALIGN(4);
+ __ram2_free__ = .;
+ } > ram2
+
+ .ram3 (NOLOAD) : ALIGN(4)
+ {
+ . = ALIGN(4);
+ *(.ram3)
+ *(.ram3.*)
+ . = ALIGN(4);
+ __ram3_free__ = .;
+ } > ram3
-PROVIDE(end = .);
-_end = .;
+ .ram4 (NOLOAD) : ALIGN(4)
+ {
+ . = ALIGN(4);
+ *(.ram4)
+ *(.ram4.*)
+ . = ALIGN(4);
+ __ram4_free__ = .;
+ } > ram4
+
+ .ram5 (NOLOAD) : ALIGN(4)
+ {
+ . = ALIGN(4);
+ *(.ram5)
+ *(.ram5.*)
+ . = ALIGN(4);
+ __ram5_free__ = .;
+ } > ram5
+
+ .ram6 (NOLOAD) : ALIGN(4)
+ {
+ . = ALIGN(4);
+ *(.ram6)
+ *(.ram6.*)
+ . = ALIGN(4);
+ __ram6_free__ = .;
+ } > ram6
+
+ .ram7 (NOLOAD) : ALIGN(4)
+ {
+ . = ALIGN(4);
+ *(.ram7)
+ *(.ram7.*)
+ . = ALIGN(4);
+ __ram7_free__ = .;
+ } > ram7
+}
-__heap_base__ = _end;
-__heap_end__ = __ram_end__;
+/* Heap default boundaries, it is defaulted to be the non-used part
+ of ram0 region.*/
+__heap_base__ = __ram0_free__;
+__heap_end__ = __ram0_end__;
diff --git a/os/common/ports/ARM/compilers/GCC/vectors.s b/os/common/ports/ARM/compilers/GCC/vectors.s
index 7ba8527b0..971c42cdc 100644
--- a/os/common/ports/ARM/compilers/GCC/vectors.s
+++ b/os/common/ports/ARM/compilers/GCC/vectors.s
@@ -40,7 +40,7 @@ void _unhandled_exception(void) {}
#if !defined(__DOXYGEN__)
- .section vectors, "ax"
+ .section .vectors, "ax"
.code 32
.balign 4
diff --git a/os/common/ports/ARMCMx/compilers/GCC/crt0_v6m.s b/os/common/ports/ARMCMx/compilers/GCC/crt0_v6m.s
index 38b4513b7..d395eee85 100644
--- a/os/common/ports/ARMCMx/compilers/GCC/crt0_v6m.s
+++ b/os/common/ports/ARMCMx/compilers/GCC/crt0_v6m.s
@@ -108,7 +108,7 @@
.fpu softvfp
.thumb
- .text
+ .section .startup
/*
* Reset handler.
diff --git a/os/common/ports/ARMCMx/compilers/GCC/crt0_v7m.s b/os/common/ports/ARMCMx/compilers/GCC/crt0_v7m.s
index fcfa4decd..be04334be 100644
--- a/os/common/ports/ARMCMx/compilers/GCC/crt0_v7m.s
+++ b/os/common/ports/ARMCMx/compilers/GCC/crt0_v7m.s
@@ -148,7 +148,7 @@
#endif
.thumb
- .text
+ .section .startup
/*
* Reset handler.
diff --git a/os/common/ports/ARMCMx/compilers/GCC/rules.ld b/os/common/ports/ARMCMx/compilers/GCC/rules.ld
index ccc52da5d..d48fb6112 100644
--- a/os/common/ports/ARMCMx/compilers/GCC/rules.ld
+++ b/os/common/ports/ARMCMx/compilers/GCC/rules.ld
@@ -51,7 +51,7 @@ SECTIONS
startup : ALIGN(16) SUBALIGN(16)
{
- KEEP(*(vectors))
+ KEEP(*(.vectors))
} > flash
constructors : ALIGN(4) SUBALIGN(4)
@@ -72,7 +72,8 @@ SECTIONS
.text : ALIGN(16) SUBALIGN(16)
{
- *(.text.startup.*)
+ *(.startup)
+ *(.startup.*)
*(.text)
*(.text.*)
*(.rodata)
diff --git a/os/common/ports/ARMCMx/compilers/GCC/vectors.c b/os/common/ports/ARMCMx/compilers/GCC/vectors.c
index d67d4171b..a9bf5ae6a 100644
--- a/os/common/ports/ARMCMx/compilers/GCC/vectors.c
+++ b/os/common/ports/ARMCMx/compilers/GCC/vectors.c
@@ -462,7 +462,7 @@ void Vector3FC(void) __attribute__((weak, alias("_unhandled_exception")));
* @brief STM32 vectors table.
*/
#if !defined(__DOXYGEN__)
-__attribute__ ((used, section("vectors")))
+__attribute__ ((used, section(".vectors")))
#endif
/*lint -save -e9075 [8.4] All symbols are invoked from asm context.*/
vectors_t _vectors = {
generated by cgit v1.2.3 (git 2.25.1) at 2024-10-17 05:45:45 +0000