diff options
Diffstat (limited to 'os/common/startup/e200/devices/SPC560Dxx/boot.S')
| -rw-r--r-- | os/common/startup/e200/devices/SPC560Dxx/boot.S | 104 |
1 files changed, 52 insertions, 52 deletions
diff --git a/os/common/startup/e200/devices/SPC560Dxx/boot.S b/os/common/startup/e200/devices/SPC560Dxx/boot.S index 0c056f3f2..6e32e2e5a 100644 --- a/os/common/startup/e200/devices/SPC560Dxx/boot.S +++ b/os/common/startup/e200/devices/SPC560Dxx/boot.S @@ -37,35 +37,35 @@ .type _reset_address, @function
_reset_address:
#if BOOT_PERFORM_CORE_INIT
- bl _coreinit
+ e_bl _coreinit
#endif
- bl _ivinit
+ e_bl _ivinit
#if BOOT_RELOCATE_IN_RAM
/*
* Image relocation in RAM.
*/
- lis r4, __ram_reloc_start__@h
- ori r4, r4, __ram_reloc_start__@l
- lis r5, __ram_reloc_dest__@h
- ori r5, r5, __ram_reloc_dest__@l
- lis r6, __ram_reloc_end__@h
- ori r6, r6, __ram_reloc_end__@l
+ e_lis r4, __ram_reloc_start__@h
+ e_or2i r4, __ram_reloc_start__@l
+ e_lis r5, __ram_reloc_dest__@h
+ e_or2i r5, __ram_reloc_dest__@l
+ e_lis r6, __ram_reloc_end__@h
+ e_or2i r6, __ram_reloc_end__@l
.relloop:
- cmpl cr0, r4, r6
- bge cr0, .relend
- lwz r7, 0(r4)
- addi r4, r4, 4
- stw r7, 0(r5)
- addi r5, r5, 4
- b .relloop
+ se_cmpl r4, r6
+ se_bge .relend
+ se_lwz r7, 0(r4)
+ se_addi r4, 4
+ se_stw r7, 0(r5)
+ se_addi r5, 4
+ se_b .relloop
.relend:
- lis r3, _boot_address@h
- ori r3, r3, _boot_address@l
+ e_lis r3, _boot_address@h
+ e_or2i r3, _boot_address@l
mtctr r3
- bctrl
+ se_bctrl
#else
- b _boot_address
+ e_b _boot_address
#endif
#if BOOT_PERFORM_CORE_INIT
@@ -108,25 +108,25 @@ _coreinit: xor r29, r29, r29
xor r30, r30, r30
xor r31, r31, r31
- lis r4, __ram_start__@h
- ori r4, r4, __ram_start__@l
- lis r5, __ram_end__@h
- ori r5, r5, __ram_end__@l
+ e_lis r4, __ram_start__@h
+ e_or2i r4, __ram_start__@l
+ e_lis r5, __ram_end__@h
+ e_or2i r5, __ram_end__@l
.cleareccloop:
- cmpl cr0, r4, r5
- bge cr0, .cleareccend
- stmw r16, 0(r4)
- addi r4, r4, 64
- b .cleareccloop
+ se_cmpl r4, r5
+ se_bge .cleareccend
+ e_stmw r16, 0(r4)
+ e_addi r4, r4, 64
+ se_b .cleareccloop
.cleareccend:
/*
* Branch prediction enabled.
*/
- li r3, BOOT_BUCSR_DEFAULT
+ e_li r3, BOOT_BUCSR_DEFAULT
mtspr 1013, r3 /* BUCSR */
- blr
+ se_blr
#endif /* BOOT_PERFORM_CORE_INIT */
/*
@@ -135,52 +135,52 @@ _coreinit: .align 2
_ivinit:
/* MSR initialization.*/
- lis r3, BOOT_MSR_DEFAULT@h
- ori r3, r3, BOOT_MSR_DEFAULT@l
+ e_lis r3, BOOT_MSR_DEFAULT@h
+ e_or2i r3, BOOT_MSR_DEFAULT@l
mtMSR r3
/* IVPR initialization.*/
- lis r3, __ivpr_base__@h
- ori r3, r3, __ivpr_base__@l
+ e_lis r3, __ivpr_base__@h
+ e_or2i r3, __ivpr_base__@l
mtIVPR r3
- blr
+ se_blr
.section .ivors, "ax"
.globl IVORS
IVORS:
- b _IVOR0
+ e_b _IVOR0
.align 4
- b _IVOR1
+ e_b _IVOR1
.align 4
- b _IVOR2
+ e_b _IVOR2
.align 4
- b _IVOR3
+ e_b _IVOR3
.align 4
- b _IVOR4
+ e_b _IVOR4
.align 4
- b _IVOR5
+ e_b _IVOR5
.align 4
- b _IVOR6
+ e_b _IVOR6
.align 4
- b _IVOR7
+ e_b _IVOR7
.align 4
- b _IVOR8
+ e_b _IVOR8
.align 4
- b _IVOR9
+ e_b _IVOR9
.align 4
- b _IVOR10
+ e_b _IVOR10
.align 4
- b _IVOR11
+ e_b _IVOR11
.align 4
- b _IVOR12
+ e_b _IVOR12
.align 4
- b _IVOR13
+ e_b _IVOR13
.align 4
- b _IVOR14
+ e_b _IVOR14
.align 4
- b _IVOR15
+ e_b _IVOR15
.section .handlers, "ax"
@@ -207,7 +207,7 @@ _IVOR14: _IVOR15:
.global _unhandled_exception
_unhandled_exception:
- b _unhandled_exception
+ e_b _unhandled_exception
#endif /* !defined(__DOXYGEN__) */
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