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-rw-r--r--os/common/startup/ARMCAx-TZ/devices/SAMA5D2/boot.S9
1 files changed, 9 insertions, 0 deletions
diff --git a/os/common/startup/ARMCAx-TZ/devices/SAMA5D2/boot.S b/os/common/startup/ARMCAx-TZ/devices/SAMA5D2/boot.S
index 0ba357a0e..f8050f8c6 100644
--- a/os/common/startup/ARMCAx-TZ/devices/SAMA5D2/boot.S
+++ b/os/common/startup/ARMCAx-TZ/devices/SAMA5D2/boot.S
@@ -86,6 +86,15 @@ Boot_Handler:
ldr r1, =SFR_L2CC_HRAMC
str r0, [r1]
/*
+ * Enabling Cycle counter
+ */
+ mrc p15, 0, r0, c9, c12, 0 // read PMCR register
+ orr r0, r0, #(0x1) // set E bit 0 to enable counter
+ mcr p15, 0, r0, c9, c12, 0 // write r0
+ mrc p15, 0, r0, c9, c12, 1 // read PMCNTENSET register
+ orr r0, r0, #(0x1 << 31) // set bit 31 to enable counter
+ mcr p15, 0, r0, c9, c12, 1 // write r0
+ /*
* Configure the intial catching of the interrupts
*/
ldr r0, =SCR_RESET_VAL // IRQ and ABT to monitor in secure mode