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Diffstat (limited to 'os/common/ports/ARMCMx/compilers/GCC/ld/rules_STM32F7xx.ld')
-rw-r--r--os/common/ports/ARMCMx/compilers/GCC/ld/rules_STM32F7xx.ld150
1 files changed, 137 insertions, 13 deletions
diff --git a/os/common/ports/ARMCMx/compilers/GCC/ld/rules_STM32F7xx.ld b/os/common/ports/ARMCMx/compilers/GCC/ld/rules_STM32F7xx.ld
index 44ccf7bba..0035c7ac3 100644
--- a/os/common/ports/ARMCMx/compilers/GCC/ld/rules_STM32F7xx.ld
+++ b/os/common/ports/ARMCMx/compilers/GCC/ld/rules_STM32F7xx.ld
@@ -56,18 +56,18 @@ SECTIONS
constructors : ALIGN(4) SUBALIGN(4)
{
- PROVIDE(__init_array_start = .);
+ __init_array_start = .;
KEEP(*(SORT(.init_array.*)))
KEEP(*(.init_array))
- PROVIDE(__init_array_end = .);
+ __init_array_end = .;
} > flash_itcm AT > flash
destructors : ALIGN(4) SUBALIGN(4)
{
- PROVIDE(__fini_array_start = .);
+ __fini_array_start = .;
KEEP(*(.fini_array))
KEEP(*(SORT(.fini_array.*)))
- PROVIDE(__fini_array_end = .);
+ __fini_array_end = .;
} > flash_itcm AT > flash
.text : ALIGN(16) SUBALIGN(16)
@@ -85,9 +85,9 @@ SECTIONS
} > flash_itcm AT > flash
.ARM.exidx : {
- PROVIDE(__exidx_start = .);
+ __exidx_start = .;
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
- PROVIDE(__exidx_end = .);
+ __exidx_end = .;
} > flash_itcm AT > flash
.eh_frame_hdr :
@@ -110,16 +110,16 @@ SECTIONS
.rodata : ALIGN(4)
{
. = ALIGN(4);
- PROVIDE(__rodata_base__ = .);
+ __rodata_base__ = .;
*(.rodata)
*(.rodata.*)
. = ALIGN(4);
- PROVIDE(__rodata_end__ = .);
+ __rodata_end__ = .;
} > flash
+ /* Legacy symbol, not used anywhere.*/
. = ALIGN(4);
- _etext = .;
- _textdata = _etext;
+ PROVIDE(_etext = .);
/* Special section for exceptions stack.*/
.mstack :
@@ -167,92 +167,216 @@ SECTIONS
.data : ALIGN(4)
{
. = ALIGN(4);
+ PROVIDE(_textdata = LOADADDR(.data));
PROVIDE(_data = .);
+ _textdata_start = LOADADDR(.data);
+ _data_start = .;
*(.data)
*(.data.*)
*(.ramtext)
. = ALIGN(4);
PROVIDE(_edata = .);
+ _data_end = .;
} > DATA_RAM AT > flash
- .bss : ALIGN(4)
+ .bss (NOLOAD) : ALIGN(4)
{
. = ALIGN(4);
- PROVIDE(_bss_start = .);
+ _bss_start = .;
*(.bss)
*(.bss.*)
*(COMMON)
. = ALIGN(4);
- PROVIDE(_bss_end = .);
+ _bss_end = .;
PROVIDE(end = .);
} > BSS_RAM
+ .ram0_init : ALIGN(4)
+ {
+ . = ALIGN(4);
+ __ram0_init_text__ = LOADADDR(.ram0_init);
+ __ram0_init__ = .;
+ *(.ram0_init)
+ *(.ram0_init.*)
+ . = ALIGN(4);
+ } > ram0 AT > flash
+
.ram0 (NOLOAD) : ALIGN(4)
{
. = ALIGN(4);
+ __ram0_clear__ = .;
+ *(.ram0_clear)
+ *(.ram0_clear.*)
+ . = ALIGN(4);
+ __ram0_noinit__ = .;
*(.ram0)
*(.ram0.*)
. = ALIGN(4);
__ram0_free__ = .;
} > ram0
+ .ram1_init : ALIGN(4)
+ {
+ . = ALIGN(4);
+ __ram1_init_text__ = LOADADDR(.ram1_init);
+ __ram1_init__ = .;
+ *(.ram1_init)
+ *(.ram1_init.*)
+ . = ALIGN(4);
+ } > ram1 AT > flash
+
.ram1 (NOLOAD) : ALIGN(4)
{
. = ALIGN(4);
+ __ram1_clear__ = .;
+ *(.ram1_clear)
+ *(.ram1_clear.*)
+ . = ALIGN(4);
+ __ram1_noinit__ = .;
*(.ram1)
*(.ram1.*)
. = ALIGN(4);
__ram1_free__ = .;
} > ram1
+ .ram2_init : ALIGN(4)
+ {
+ . = ALIGN(4);
+ __ram2_init_text__ = LOADADDR(.ram2_init);
+ __ram2_init__ = .;
+ *(.ram2_init)
+ *(.ram2_init.*)
+ . = ALIGN(4);
+ } > ram2 AT > flash
+
.ram2 (NOLOAD) : ALIGN(4)
{
. = ALIGN(4);
+ __ram2_clear__ = .;
+ *(.ram2_clear)
+ *(.ram2_clear.*)
+ . = ALIGN(4);
+ __ram2_noinit__ = .;
*(.ram2)
*(.ram2.*)
. = ALIGN(4);
__ram2_free__ = .;
} > ram2
+ .ram3_init : ALIGN(4)
+ {
+ . = ALIGN(4);
+ __ram3_init_text__ = LOADADDR(.ram3_init);
+ __ram3_init__ = .;
+ *(.ram3_init)
+ *(.ram3_init.*)
+ . = ALIGN(4);
+ } > ram3 AT > flash
+
.ram3 (NOLOAD) : ALIGN(4)
{
. = ALIGN(4);
+ __ram3_clear__ = .;
+ *(.ram3_clear)
+ *(.ram3_clear.*)
+ . = ALIGN(4);
+ __ram3_noinit__ = .;
*(.ram3)
*(.ram3.*)
. = ALIGN(4);
__ram3_free__ = .;
} > ram3
+ .ram4_init : ALIGN(4)
+ {
+ . = ALIGN(4);
+ __ram4_init_text__ = LOADADDR(.ram4_init);
+ __ram4_init__ = .;
+ *(.ram4_init)
+ *(.ram4_init.*)
+ . = ALIGN(4);
+ } > ram4 AT > flash
+
.ram4 (NOLOAD) : ALIGN(4)
{
. = ALIGN(4);
+ __ram4_clear__ = .;
+ *(.ram4_clear)
+ *(.ram4_clear.*)
+ . = ALIGN(4);
+ __ram4_noinit__ = .;
*(.ram4)
*(.ram4.*)
. = ALIGN(4);
__ram4_free__ = .;
} > ram4
+ .ram5_init : ALIGN(4)
+ {
+ . = ALIGN(4);
+ __ram5_init_text__ = LOADADDR(.ram5_init);
+ __ram5_init__ = .;
+ *(.ram5_init)
+ *(.ram5_init.*)
+ . = ALIGN(4);
+ } > ram5 AT > flash
+
.ram5 (NOLOAD) : ALIGN(4)
{
. = ALIGN(4);
+ __ram5_clear__ = .;
+ *(.ram5_clear)
+ *(.ram5_clear.*)
+ . = ALIGN(4);
+ __ram5_noinit__ = .;
*(.ram5)
*(.ram5.*)
. = ALIGN(4);
__ram5_free__ = .;
} > ram5
+ .ram6_init : ALIGN(4)
+ {
+ . = ALIGN(4);
+ __ram6_init_text__ = LOADADDR(.ram6_init);
+ __ram6_init__ = .;
+ *(.ram6_init)
+ *(.ram6_init.*)
+ . = ALIGN(4);
+ } > ram6 AT > flash
+
.ram6 (NOLOAD) : ALIGN(4)
{
. = ALIGN(4);
+ __ram6_clear__ = .;
+ *(.ram6_clear)
+ *(.ram6_clear.*)
+ . = ALIGN(4);
+ __ram6_noinit__ = .;
*(.ram6)
*(.ram6.*)
. = ALIGN(4);
__ram6_free__ = .;
} > ram6
+ .ram7_init : ALIGN(4)
+ {
+ . = ALIGN(4);
+ __ram7_init_text__ = LOADADDR(.ram7_init);
+ __ram7_init__ = .;
+ *(.ram7_init)
+ *(.ram7_init.*)
+ . = ALIGN(4);
+ } > ram7 AT > flash
+
.ram7 (NOLOAD) : ALIGN(4)
{
. = ALIGN(4);
+ __ram7_clear__ = .;
+ *(.ram7_clear)
+ *(.ram7_clear.*)
+ . = ALIGN(4);
+ __ram7_noinit__ = .;
*(.ram7)
*(.ram7.*)
. = ALIGN(4);