diff options
Diffstat (limited to 'os/common/ports/ARM')
| -rw-r--r-- | os/common/ports/ARM/compilers/GCC/crt0.s | 155 | ||||
| -rw-r--r-- | os/common/ports/ARM/compilers/GCC/crt1.c | 75 | ||||
| -rw-r--r-- | os/common/ports/ARM/compilers/GCC/ld/LPC2148.ld | 46 | ||||
| -rw-r--r-- | os/common/ports/ARM/compilers/GCC/mk/startup_lpc214x.mk | 9 | ||||
| -rw-r--r-- | os/common/ports/ARM/compilers/GCC/rules.ld | 224 | ||||
| -rw-r--r-- | os/common/ports/ARM/compilers/GCC/rules.mk | 307 | ||||
| -rw-r--r-- | os/common/ports/ARM/compilers/GCC/vectors.s | 101 | ||||
| -rw-r--r-- | os/common/ports/ARM/devices/LPC214x/armparams.h | 65 | ||||
| -rw-r--r-- | os/common/ports/ARM/devices/LPC214x/lpc214x.h | 526 |
9 files changed, 0 insertions, 1508 deletions
diff --git a/os/common/ports/ARM/compilers/GCC/crt0.s b/os/common/ports/ARM/compilers/GCC/crt0.s deleted file mode 100644 index dea01fb83..000000000 --- a/os/common/ports/ARM/compilers/GCC/crt0.s +++ /dev/null @@ -1,155 +0,0 @@ -/*
- ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio.
-
- This file is part of ChibiOS.
-
- ChibiOS is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file crt0.s
- * @brief Generic ARM startup file.
- *
- * @addtogroup ARM_GCC_STARTUP
- * @{
- */
-
-#if !defined(__DOXYGEN__)
-
- .set MODE_USR, 0x10
- .set MODE_FIQ, 0x11
- .set MODE_IRQ, 0x12
- .set MODE_SVC, 0x13
- .set MODE_ABT, 0x17
- .set MODE_UND, 0x1B
- .set MODE_SYS, 0x1F
-
- .set I_BIT, 0x80
- .set F_BIT, 0x40
-
- .text
- .code 32
- .balign 4
-
-/*
- * Reset handler.
- */
- .global Reset_Handler
-Reset_Handler:
- /*
- * Stack pointers initialization.
- */
- ldr r0, =__stacks_end__
- /* Undefined */
- msr CPSR_c, #MODE_UND | I_BIT | F_BIT
- mov sp, r0
- ldr r1, =__und_stack_size__
- sub r0, r0, r1
- /* Abort */
- msr CPSR_c, #MODE_ABT | I_BIT | F_BIT
- mov sp, r0
- ldr r1, =__abt_stack_size__
- sub r0, r0, r1
- /* FIQ */
- msr CPSR_c, #MODE_FIQ | I_BIT | F_BIT
- mov sp, r0
- ldr r1, =__fiq_stack_size__
- sub r0, r0, r1
- /* IRQ */
- msr CPSR_c, #MODE_IRQ | I_BIT | F_BIT
- mov sp, r0
- ldr r1, =__irq_stack_size__
- sub r0, r0, r1
- /* Supervisor */
- msr CPSR_c, #MODE_SVC | I_BIT | F_BIT
- mov sp, r0
- ldr r1, =__svc_stack_size__
- sub r0, r0, r1
- /* System */
- msr CPSR_c, #MODE_SYS | I_BIT | F_BIT
- mov sp, r0
-// ldr r1, =__sys_stack_size__
-// sub r0, r0, r1
- /*
- * Early initialization.
- */
-#if !defined(THUMB_NO_INTERWORKING)
- bl __early_init
-#else /* defined(THUMB_NO_INTERWORKING) */
- add r0, pc, #1
- bx r0
- .code 16
- bl __early_init
- mov r0, pc
- bx r0
- .code 32
-#endif /* defined(THUMB_NO_INTERWORKING) */
-
- /*
- * Data initialization.
- * NOTE: It assumes that the DATA size is a multiple of 4.
- */
- ldr r1, =_textdata
- ldr r2, =_data
- ldr r3, =_edata
-dataloop:
- cmp r2, r3
- ldrlo r0, [r1], #4
- strlo r0, [r2], #4
- blo dataloop
- /*
- * BSS initialization.
- * NOTE: It assumes that the BSS size is a multiple of 4.
- */
- mov r0, #0
- ldr r1, =_bss_start
- ldr r2, =_bss_end
-bssloop:
- cmp r1, r2
- strlo r0, [r1], #4
- blo bssloop
- /*
- * Late initialization.
- */
-#if !defined(THUMB_NO_INTERWORKING)
- bl __late_init
-#else /* defined(THUMB_NO_INTERWORKING) */
- add r0, pc, #1
- bx r0
- .code 16
- bl __late_init
- mov r0, pc
- bx r0
- .code 32
-#endif /* defined(THUMB_NO_INTERWORKING) */
-
- /*
- * Main program invocation.
- */
-#if defined(THUMB_NO_INTERWORKING)
- add r0, pc, #1
- bx r0
- .code 16
- bl main
- ldr r1, =__default_exit
- bx r1
- .code 32
-#else /* !defined(THUMB_NO_INTERWORKING) */
- bl main
- b __default_exit
-#endif /* !defined(THUMB_NO_INTERWORKING) */
-
-#endif /* !defined(__DOXYGEN__) */
-
-/** @} */
diff --git a/os/common/ports/ARM/compilers/GCC/crt1.c b/os/common/ports/ARM/compilers/GCC/crt1.c deleted file mode 100644 index 68e22b95a..000000000 --- a/os/common/ports/ARM/compilers/GCC/crt1.c +++ /dev/null @@ -1,75 +0,0 @@ -/*
- ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio.
-
- This file is part of ChibiOS.
-
- ChibiOS is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file ARMCMx/compilers/GCC/crt1.c
- * @brief Startup stub functions.
- *
- * @addtogroup ARMCMx_GCC_STARTUP
- * @{
- */
-
-#include <stdbool.h>
-
-/**
- * @brief Early initialization.
- * @details This hook is invoked immediately after the stack initialization
- * and before the DATA and BSS segments initialization. The
- * default behavior is to do nothing.
- * @note This function is a weak symbol.
- */
-#if !defined(__DOXYGEN__)
-__attribute__((weak))
-#endif
-/*lint -save -e9075 [8.4] All symbols are invoked from asm context.*/
-void __early_init(void) {}
-/*lint -restore*/
-
-/**
- * @brief Late initialization.
- * @details This hook is invoked after the DATA and BSS segments
- * initialization and before any static constructor. The
- * default behavior is to do nothing.
- * @note This function is a weak symbol.
- */
-#if !defined(__DOXYGEN__)
-__attribute__((weak))
-#endif
-/*lint -save -e9075 [8.4] All symbols are invoked from asm context.*/
-void __late_init(void) {}
-/*lint -restore*/
-
-/**
- * @brief Default @p main() function exit handler.
- * @details This handler is invoked or the @p main() function exit. The
- * default behavior is to enter an infinite loop.
- * @note This function is a weak symbol.
- */
-#if !defined(__DOXYGEN__)
-__attribute__((noreturn, weak))
-#endif
-/*lint -save -e9075 [8.4] All symbols are invoked from asm context.*/
-void __default_exit(void) {
-/*lint -restore*/
-
- while (true) {
- }
-}
-
-/** @} */
diff --git a/os/common/ports/ARM/compilers/GCC/ld/LPC2148.ld b/os/common/ports/ARM/compilers/GCC/ld/LPC2148.ld deleted file mode 100644 index 1dbab64b5..000000000 --- a/os/common/ports/ARM/compilers/GCC/ld/LPC2148.ld +++ /dev/null @@ -1,46 +0,0 @@ -/*
- ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio.
-
- This file is part of ChibiOS.
-
- ChibiOS is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/*
- * LPC2148 memory setup.
- */
-MEMORY
-{
- flash : org = 0x00000000, len = 512k - 12k
- ram0 : org = 0x40000200, len = 32k - 0x200 - 288
- ram1 : org = 0x00000000, len = 0
- ram2 : org = 0x00000000, len = 0
- ram3 : org = 0x00000000, len = 0
- ram4 : org = 0x00000000, len = 0
- ram5 : org = 0x00000000, len = 0
- ram6 : org = 0x00000000, len = 0
- ram7 : org = 0x00000000, len = 0
-}
-
-/* RAM region to be used for stacks. This stack accommodates the processing
- of all exceptions and interrupts*/
-REGION_ALIAS("STACKS_RAM", ram0);
-
-/* RAM region to be used for data segment.*/
-REGION_ALIAS("DATA_RAM", ram0);
-
-/* RAM region to be used for BSS segment.*/
-REGION_ALIAS("BSS_RAM", ram0);
-
-INCLUDE rules.ld
diff --git a/os/common/ports/ARM/compilers/GCC/mk/startup_lpc214x.mk b/os/common/ports/ARM/compilers/GCC/mk/startup_lpc214x.mk deleted file mode 100644 index 4f1af1875..000000000 --- a/os/common/ports/ARM/compilers/GCC/mk/startup_lpc214x.mk +++ /dev/null @@ -1,9 +0,0 @@ -# List of the ChibiOS generic LPC214x file.
-STARTUPSRC = $(CHIBIOS)/os/common/ports/ARM/compilers/GCC/crt1.c
-
-STARTUPASM = $(CHIBIOS)/os/common/ports/ARM/compilers/GCC/vectors.s \
- $(CHIBIOS)/os/common/ports/ARM/compilers/GCC/crt0.s
-
-STARTUPINC = ${CHIBIOS}/os/common/ports/ARM/devices/LPC214x
-
-STARTUPLD = ${CHIBIOS}/os/common/ports/ARM/compilers/GCC/ld
diff --git a/os/common/ports/ARM/compilers/GCC/rules.ld b/os/common/ports/ARM/compilers/GCC/rules.ld deleted file mode 100644 index 6bda5170c..000000000 --- a/os/common/ports/ARM/compilers/GCC/rules.ld +++ /dev/null @@ -1,224 +0,0 @@ -/*
- ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio.
-
- This file is part of ChibiOS.
-
- ChibiOS is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-__stacks_total_size__ = __und_stack_size__ + __abt_stack_size__ + __fiq_stack_size__ + __irq_stack_size__ + __svc_stack_size__ + __sys_stack_size__;
-
-__ram0_start__ = ORIGIN(ram0);
-__ram0_size__ = LENGTH(ram0);
-__ram0_end__ = __ram0_start__ + __ram0_size__;
-__ram1_start__ = ORIGIN(ram1);
-__ram1_size__ = LENGTH(ram1);
-__ram1_end__ = __ram1_start__ + __ram1_size__;
-__ram2_start__ = ORIGIN(ram2);
-__ram2_size__ = LENGTH(ram2);
-__ram2_end__ = __ram2_start__ + __ram2_size__;
-__ram3_start__ = ORIGIN(ram3);
-__ram3_size__ = LENGTH(ram3);
-__ram3_end__ = __ram3_start__ + __ram3_size__;
-__ram4_start__ = ORIGIN(ram4);
-__ram4_size__ = LENGTH(ram4);
-__ram4_end__ = __ram4_start__ + __ram4_size__;
-__ram5_start__ = ORIGIN(ram5);
-__ram5_size__ = LENGTH(ram5);
-__ram5_end__ = __ram5_start__ + __ram5_size__;
-__ram6_start__ = ORIGIN(ram6);
-__ram6_size__ = LENGTH(ram6);
-__ram6_end__ = __ram6_start__ + __ram6_size__;
-__ram7_start__ = ORIGIN(ram7);
-__ram7_size__ = LENGTH(ram7);
-__ram7_end__ = __ram7_start__ + __ram7_size__;
-
-ENTRY(Reset_Handler)
-
-SECTIONS
-{
- . = 0;
- _text = .;
-
- startup : ALIGN(16) SUBALIGN(16)
- {
- KEEP(*(.vectors))
- } > flash
-
- constructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__init_array_start = .);
- KEEP(*(SORT(.init_array.*)))
- KEEP(*(.init_array))
- PROVIDE(__init_array_end = .);
- } > flash
-
- destructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__fini_array_start = .);
- KEEP(*(.fini_array))
- KEEP(*(SORT(.fini_array.*)))
- PROVIDE(__fini_array_end = .);
- } > flash
-
- .text : ALIGN(16) SUBALIGN(16)
- {
- *(.text)
- *(.text.*)
- *(.rodata)
- *(.rodata.*)
- *(.glue_7t)
- *(.glue_7)
- *(.gcc*)
- } > flash
-
- .ARM.extab :
- {
- *(.ARM.extab* .gnu.linkonce.armextab.*)
- } > flash
-
- .ARM.exidx : {
- PROVIDE(__exidx_start = .);
- *(.ARM.exidx* .gnu.linkonce.armexidx.*)
- PROVIDE(__exidx_end = .);
- } > flash
-
- .eh_frame_hdr :
- {
- *(.eh_frame_hdr)
- } > flash
-
- .eh_frame : ONLY_IF_RO
- {
- *(.eh_frame)
- } > flash
-
- .textalign : ONLY_IF_RO
- {
- . = ALIGN(8);
- } > flash
-
- . = ALIGN(4);
- _etext = .;
- _textdata = _etext;
-
- .stacks :
- {
- . = ALIGN(8);
- __stacks_base__ = .;
- . += __stacks_total_size__;
- . = ALIGN(8);
- __stacks_end__ = .;
- } > STACKS_RAM
-
- .data : ALIGN(4)
- {
- . = ALIGN(4);
- PROVIDE(_data = .);
- *(.data)
- *(.data.*)
- *(.ramtext)
- . = ALIGN(4);
- PROVIDE(_edata = .);
- } > DATA_RAM AT > flash
-
- .bss : ALIGN(4)
- {
- . = ALIGN(4);
- PROVIDE(_bss_start = .);
- *(.bss)
- *(.bss.*)
- *(COMMON)
- . = ALIGN(4);
- PROVIDE(_bss_end = .);
- PROVIDE(end = .);
- } > BSS_RAM
-
- .ram0 (NOLOAD) : ALIGN(4)
- {
- . = ALIGN(4);
- *(.ram0)
- *(.ram0.*)
- . = ALIGN(4);
- __ram0_free__ = .;
- } > ram0
-
- .ram1 (NOLOAD) : ALIGN(4)
- {
- . = ALIGN(4);
- *(.ram1)
- *(.ram1.*)
- . = ALIGN(4);
- __ram1_free__ = .;
- } > ram1
-
- .ram2 (NOLOAD) : ALIGN(4)
- {
- . = ALIGN(4);
- *(.ram2)
- *(.ram2.*)
- . = ALIGN(4);
- __ram2_free__ = .;
- } > ram2
-
- .ram3 (NOLOAD) : ALIGN(4)
- {
- . = ALIGN(4);
- *(.ram3)
- *(.ram3.*)
- . = ALIGN(4);
- __ram3_free__ = .;
- } > ram3
-
- .ram4 (NOLOAD) : ALIGN(4)
- {
- . = ALIGN(4);
- *(.ram4)
- *(.ram4.*)
- . = ALIGN(4);
- __ram4_free__ = .;
- } > ram4
-
- .ram5 (NOLOAD) : ALIGN(4)
- {
- . = ALIGN(4);
- *(.ram5)
- *(.ram5.*)
- . = ALIGN(4);
- __ram5_free__ = .;
- } > ram5
-
- .ram6 (NOLOAD) : ALIGN(4)
- {
- . = ALIGN(4);
- *(.ram6)
- *(.ram6.*)
- . = ALIGN(4);
- __ram6_free__ = .;
- } > ram6
-
- .ram7 (NOLOAD) : ALIGN(4)
- {
- . = ALIGN(4);
- *(.ram7)
- *(.ram7.*)
- . = ALIGN(4);
- __ram7_free__ = .;
- } > ram7
-}
-
-/* Heap default boundaries, it is defaulted to be the non-used part
- of ram0 region.*/
-__heap_base__ = __ram0_free__;
-__heap_end__ = __ram0_end__;
diff --git a/os/common/ports/ARM/compilers/GCC/rules.mk b/os/common/ports/ARM/compilers/GCC/rules.mk deleted file mode 100644 index b8f66a99e..000000000 --- a/os/common/ports/ARM/compilers/GCC/rules.mk +++ /dev/null @@ -1,307 +0,0 @@ -# ARM Cortex-Mx common makefile scripts and rules.
-
-##############################################################################
-# Processing options coming from the upper Makefile.
-#
-
-# Compiler options
-OPT = $(USE_OPT)
-COPT = $(USE_COPT)
-CPPOPT = $(USE_CPPOPT)
-
-# Garbage collection
-ifeq ($(USE_LINK_GC),yes)
- OPT += -ffunction-sections -fdata-sections -fno-common
- LDOPT := ,--gc-sections
-else
- LDOPT :=
-endif
-
-# Linker extra options
-ifneq ($(USE_LDOPT),)
- LDOPT := $(LDOPT),$(USE_LDOPT)
-endif
-
-# Link time optimizations
-ifeq ($(USE_LTO),yes)
- OPT += -flto
-endif
-
-# Undefined state stack size
-ifeq ($(USE_UND_STACKSIZE),)
- LDOPT := $(LDOPT),--defsym=__und_stack_size__=8
-else
- LDOPT := $(LDOPT),--defsym=__und_stack_size__=$(USE_UND_STACKSIZE)
-endif
-
-# Abort stack size
-ifeq ($(USE_ABT_STACKSIZE),)
- LDOPT := $(LDOPT),--defsym=__abt_stack_size__=8
-else
- LDOPT := $(LDOPT),--defsym=__abt_stack_size__=$(USE_ABT_STACKSIZE)
-endif
-
-# FIQ stack size
-ifeq ($(USE_FIQ_STACKSIZE),)
- LDOPT := $(LDOPT),--defsym=__fiq_stack_size__=64
-else
- LDOPT := $(LDOPT),--defsym=__fiq_stack_size__=$(USE_FIQ_STACKSIZE)
-endif
-
-# IRQ stack size
-ifeq ($(USE_IRQ_STACKSIZE),)
- LDOPT := $(LDOPT),--defsym=__irq_stack_size__=0x400
-else
- LDOPT := $(LDOPT),--defsym=__irq_stack_size__=$(USE_IRQ_STACKSIZE)
-endif
-
-# Supervisor stack size
-ifeq ($(USE_SUPERVISOR_STACKSIZE),)
- LDOPT := $(LDOPT),--defsym=__svc_stack_size__=8
-else
- LDOPT := $(LDOPT),--defsym=__svc_stack_size__=$(USE_SUPERVISOR_STACKSIZE)
-endif
-
-# System stack size
-ifeq ($(USE_SYSTEM_STACKSIZE),)
- LDOPT := $(LDOPT),--defsym=__sys_stack_size__=0x400
-else
- LDOPT := $(LDOPT),--defsym=__sys_stack_size__=$(USE_SYSTEM_STACKSIZE)
-endif
-
-# Output directory and files
-ifeq ($(BUILDDIR),)
- BUILDDIR = build
-endif
-ifeq ($(BUILDDIR),.)
- BUILDDIR = build
-endif
-OUTFILES = $(BUILDDIR)/$(PROJECT).elf $(BUILDDIR)/$(PROJECT).hex \
- $(BUILDDIR)/$(PROJECT).bin $(BUILDDIR)/$(PROJECT).dmp \
- $(BUILDDIR)/$(PROJECT).list
-
-
-# Source files groups and paths
-ifeq ($(USE_THUMB),yes)
- TCSRC += $(CSRC)
- TCPPSRC += $(CPPSRC)
-else
- ACSRC += $(CSRC)
- ACPPSRC += $(CPPSRC)
-endif
-ASRC = $(ACSRC)$(ACPPSRC)
-TSRC = $(TCSRC)$(TCPPSRC)
-SRCPATHS = $(sort $(dir $(ASMXSRC)) $(dir $(ASMSRC)) $(dir $(ASRC)) $(dir $(TSRC)))
-
-# Various directories
-OBJDIR = $(BUILDDIR)/obj
-LSTDIR = $(BUILDDIR)/lst
-
-# Object files groups
-ACOBJS = $(addprefix $(OBJDIR)/, $(notdir $(ACSRC:.c=.o)))
-ACPPOBJS = $(addprefix $(OBJDIR)/, $(notdir $(ACPPSRC:.cpp=.o)))
-TCOBJS = $(addprefix $(OBJDIR)/, $(notdir $(TCSRC:.c=.o)))
-TCPPOBJS = $(addprefix $(OBJDIR)/, $(notdir $(TCPPSRC:.cpp=.o)))
-ASMOBJS = $(addprefix $(OBJDIR)/, $(notdir $(ASMSRC:.s=.o)))
-ASMXOBJS = $(addprefix $(OBJDIR)/, $(notdir $(ASMXSRC:.S=.o)))
-OBJS = $(ASMXOBJS) $(ASMOBJS) $(ACOBJS) $(TCOBJS) $(ACPPOBJS) $(TCPPOBJS)
-
-# Paths
-IINCDIR = $(patsubst %,-I%,$(INCDIR) $(DINCDIR) $(UINCDIR))
-LLIBDIR = $(patsubst %,-L%,$(DLIBDIR) $(ULIBDIR))
-
-# Macros
-DEFS = $(DDEFS) $(UDEFS)
-ADEFS = $(DADEFS) $(UADEFS)
-
-# Libs
-LIBS = $(DLIBS) $(ULIBS)
-
-# Various settings
-MCFLAGS = -mcpu=$(MCU)
-ODFLAGS = -x --syms
-ASFLAGS = $(MCFLAGS) -Wa,-amhls=$(LSTDIR)/$(notdir $(<:.s=.lst)) $(ADEFS)
-ASXFLAGS = $(MCFLAGS) -Wa,-amhls=$(LSTDIR)/$(notdir $(<:.S=.lst)) $(ADEFS)
-CFLAGS = $(MCFLAGS) $(OPT) $(COPT) $(CWARN) -Wa,-alms=$(LSTDIR)/$(notdir $(<:.c=.lst)) $(DEFS)
-CPPFLAGS = $(MCFLAGS) $(OPT) $(CPPOPT) $(CPPWARN) -Wa,-alms=$(LSTDIR)/$(notdir $(<:.cpp=.lst)) $(DEFS)
-LDFLAGS = $(MCFLAGS) $(OPT) -nostartfiles $(LLIBDIR) -Wl,-Map=$(BUILDDIR)/$(PROJECT).map,--cref,--no-warn-mismatch,--library-path=$(RULESPATH),--script=$(LDSCRIPT)$(LDOPT)
-
-# Thumb interwork enabled only if needed because it kills performance.
-ifneq ($(TSRC),)
- CFLAGS += -DTHUMB_PRESENT
- CPPFLAGS += -DTHUMB_PRESENT
- ASFLAGS += -DTHUMB_PRESENT
- ifneq ($(ASRC),)
- # Mixed ARM and THUMB mode.
- CFLAGS += -mthumb-interwork
- CPPFLAGS += -mthumb-interwork
- ASFLAGS += -mthumb-interwork
- LDFLAGS += -mthumb-interwork
- else
- # Pure THUMB mode, THUMB C code cannot be called by ARM asm code directly.
- CFLAGS += -mno-thumb-interwork -DTHUMB_NO_INTERWORKING
- CPPFLAGS += -mno-thumb-interwork -DTHUMB_NO_INTERWORKING
- ASFLAGS += -mno-thumb-interwork -DTHUMB_NO_INTERWORKING -mthumb
- LDFLAGS += -mno-thumb-interwork -mthumb
- endif
-else
- # Pure ARM mode
- CFLAGS += -mno-thumb-interwork
- CPPFLAGS += -mno-thumb-interwork
- ASFLAGS += -mno-thumb-interwork
- LDFLAGS += -mno-thumb-interwork
-endif
-
-# Generate dependency information
-ASFLAGS += -MD -MP -MF .dep/$(@F).d
-CFLAGS += -MD -MP -MF .dep/$(@F).d
-CPPFLAGS += -MD -MP -MF .dep/$(@F).d
-
-# Paths where to search for sources
-VPATH = $(SRCPATHS)
-
-#
-# Makefile rules
-#
-
-all: PRE_MAKE_ALL_RULE_HOOK $(OBJS) $(OUTFILES) POST_MAKE_ALL_RULE_HOOK
-
-PRE_MAKE_ALL_RULE_HOOK:
-
-POST_MAKE_ALL_RULE_HOOK:
-
-$(OBJS): | $(BUILDDIR) $(OBJDIR) $(LSTDIR)
-
-$(BUILDDIR):
-ifneq ($(USE_VERBOSE_COMPILE),yes)
- @echo Compiler Options
- @echo $(CC) -c $(CFLAGS) -I. $(IINCDIR) main.c -o main.o
- @echo
-endif
- @mkdir -p $(BUILDDIR)
-
-$(OBJDIR):
- @mkdir -p $(OBJDIR)
-
-$(LSTDIR):
- @mkdir -p $(LSTDIR)
-
-$(ACPPOBJS) : $(OBJDIR)/%.o : %.cpp Makefile
-ifeq ($(USE_VERBOSE_COMPILE),yes)
- @echo
- $(CPPC) -c $(CPPFLAGS) $(AOPT) -I. $(IINCDIR) $< -o $@
-else
- @echo Compiling $(<F)
- @$(CPPC) -c $(CPPFLAGS) $(AOPT) -I. $(IINCDIR) $< -o $@
-endif
-
-$(TCPPOBJS) : $(OBJDIR)/%.o : %.cpp Makefile
-ifeq ($(USE_VERBOSE_COMPILE),yes)
- @echo
- $(CPPC) -c $(CPPFLAGS) $(TOPT) -I. $(IINCDIR) $< -o $@
-else
- @echo Compiling $(<F)
- @$(CPPC) -c $(CPPFLAGS) $(TOPT) -I. $(IINCDIR) $< -o $@
-endif
-
-$(ACOBJS) : $(OBJDIR)/%.o : %.c Makefile
-ifeq ($(USE_VERBOSE_COMPILE),yes)
- @echo
- $(CC) -c $(CFLAGS) $(AOPT) -I. $(IINCDIR) $< -o $@
-else
- @echo Compiling $(<F)
- @$(CC) -c $(CFLAGS) $(AOPT) -I. $(IINCDIR) $< -o $@
-endif
-
-$(TCOBJS) : $(OBJDIR)/%.o : %.c Makefile
-ifeq ($(USE_VERBOSE_COMPILE),yes)
- @echo
- $(CC) -c $(CFLAGS) $(TOPT) -I. $(IINCDIR) $< -o $@
-else
- @echo Compiling $(<F)
- @$(CC) -c $(CFLAGS) $(TOPT) -I. $(IINCDIR) $< -o $@
-endif
-
-$(ASMOBJS) : $(OBJDIR)/%.o : %.s Makefile
-ifeq ($(USE_VERBOSE_COMPILE),yes)
- @echo
- $(AS) -c $(ASFLAGS) -I. $(IINCDIR) $< -o $@
-else
- @echo Compiling $(<F)
- @$(AS) -c $(ASFLAGS) -I. $(IINCDIR) $< -o $@
-endif
-
-$(ASMXOBJS) : $(OBJDIR)/%.o : %.S Makefile
-ifeq ($(USE_VERBOSE_COMPILE),yes)
- @echo
- $(CC) -c $(ASXFLAGS) $(TOPT) -I. $(IINCDIR) $< -o $@
-else
- @echo Compiling $(<F)
- @$(CC) -c $(ASXFLAGS) $(TOPT) -I. $(IINCDIR) $< -o $@
-endif
-
-$(BUILDDIR)/$(PROJECT).elf: $(OBJS) $(LDSCRIPT)
-ifeq ($(USE_VERBOSE_COMPILE),yes)
- @echo
- $(LD) $(OBJS) $(LDFLAGS) $(LIBS) -o $@
-else
- @echo Linking $@
- @$(LD) $(OBJS) $(LDFLAGS) $(LIBS) -o $@
-endif
-
-%.hex: %.elf
-ifeq ($(USE_VERBOSE_COMPILE),yes)
- $(HEX) $< $@
-else
- @echo Creating $@
- @$(HEX) $< $@
-endif
-
-%.bin: %.elf
-ifeq ($(USE_VERBOSE_COMPILE),yes)
- $(BIN) $< $@
-else
- @echo Creating $@
- @$(BIN) $< $@
-endif
-
-%.dmp: %.elf
-ifeq ($(USE_VERBOSE_COMPILE),yes)
- $(OD) $(ODFLAGS) $< > $@
- $(SZ) $<
-else
- @echo Creating $@
- @$(OD) $(ODFLAGS) $< > $@
- @echo
- @$(SZ) $<
-endif
-
-%.list: %.elf
-ifeq ($(USE_VERBOSE_COMPILE),yes)
- $(OD) -S $< > $@
-else
- @echo Creating $@
- @$(OD) -S $< > $@
- @echo
- @echo Done
-endif
-
-lib: $(OBJS) $(BUILDDIR)/lib$(PROJECT).a
-
-$(BUILDDIR)/lib$(PROJECT).a: $(OBJS)
- @$(AR) -r $@ $^
- @echo
- @echo Done
-
-clean:
- @echo Cleaning
- -rm -fR .dep $(BUILDDIR)
- @echo
- @echo Done
-
-#
-# Include the dependency files, should be the last of the makefile
-#
--include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*)
-
-# *** EOF ***
diff --git a/os/common/ports/ARM/compilers/GCC/vectors.s b/os/common/ports/ARM/compilers/GCC/vectors.s deleted file mode 100644 index 971c42cdc..000000000 --- a/os/common/ports/ARM/compilers/GCC/vectors.s +++ /dev/null @@ -1,101 +0,0 @@ -/*
- ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio.
-
- This file is part of ChibiOS.
-
- ChibiOS is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file ARM/compilers/GCC/vectors.s
- * @brief Interrupt vectors for ARM devices.
- *
- * @defgroup ARM_VECTORS ARM Exception Vectors
- * @{
- */
-
-#if defined(__DOXYGEN__)
-/**
- * @brief Unhandled exceptions handler.
- * @details Any undefined exception vector points to this function by default.
- * This function simply stops the system into an infinite loop.
- * @note The default implementation is a weak symbol, the application
- * can override the default implementation.
- *
- * @notapi
- */
-void _unhandled_exception(void) {}
-#endif
-
-#if !defined(__DOXYGEN__)
-
- .section .vectors, "ax"
- .code 32
- .balign 4
-
-/*
- * System entry points.
- */
- .global _start
-_start:
- ldr pc, _reset
- ldr pc, _undefined
- ldr pc, _swi
- ldr pc, _prefetch
- ldr pc, _abort
- nop
- ldr pc, _irq
- ldr pc, _fiq
-
-_reset:
- .word Reset_Handler
-_undefined:
- .word Und_Handler
-_swi:
- .word Swi_Handler
-_prefetch:
- .word Prefetch_Handler
-_abort:
- .word Abort_Handler
-_fiq:
- .word Fiq_Handler
-_irq:
- .word Irq_Handler
-
-/*
- * Default exceptions handlers. The handlers are declared weak in order to be
- * replaced by the real handling code. Everything is defaulted to an infinite
- * loop.
- */
- .weak Reset_Handler
-Reset_Handler:
- .weak Und_Handler
-Und_Handler:
- .weak Swi_Handler
-Swi_Handler:
- .weak Prefetch_Handler
-Prefetch_Handler:
- .weak Abort_Handler
-Abort_Handler:
- .weak Fiq_Handler
-Fiq_Handler:
- .weak Irq_Handler
-Irq_Handler:
- .weak _unhandled_exception
-_unhandled_exception:
- b _unhandled_exception
-
-#endif
-
-/** @} */
diff --git a/os/common/ports/ARM/devices/LPC214x/armparams.h b/os/common/ports/ARM/devices/LPC214x/armparams.h deleted file mode 100644 index 9033e9e38..000000000 --- a/os/common/ports/ARM/devices/LPC214x/armparams.h +++ /dev/null @@ -1,65 +0,0 @@ -/*
- ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio.
-
- This file is part of ChibiOS.
-
- ChibiOS is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file armparams.h
- * @brief ARM parameters for the LPC214x.
- *
- * @defgroup ARM_LPC214x LPC214x Specific Parameters
- * @ingroup ARM_SPECIFIC
- * @details This file contains the ARM specific parameters for the
- * LPC214x platform.
- * @{
- */
-
-#ifndef _ARMPARAMS_H_
-#define _ARMPARAMS_H_
-
-/**
- * @brief ARM core model.
- */
-#define ARM_CORE ARM_CORE_ARM7TDMI
-
-/**
- * @brief Thumb-capable.
- */
-#define ARM_SUPPORTS_THUMB 1
-
-/**
- * @brief Thumb2-capable.
- */
-#define ARM_SUPPORTS_THUMB2 0
-
-/**
- * @brief Implementation of the wait-for-interrupt state enter.
- */
-#define ARM_WFI_IMPL (PCON = 1)
-
-#if !defined(_FROM_ASM_) || defined(__DOXYGEN__)
-/**
- * @brief Address of the IRQ vector register in the interrupt controller.
- */
-#define ARM_IRQ_VECTOR_REG 0xFFFFF030U
-#else
-#define ARM_IRQ_VECTOR_REG 0xFFFFF030
-#endif
-
-#endif /* _ARMPARAMS_H_ */
-
-/** @} */
diff --git a/os/common/ports/ARM/devices/LPC214x/lpc214x.h b/os/common/ports/ARM/devices/LPC214x/lpc214x.h deleted file mode 100644 index 4e0bc4fdb..000000000 --- a/os/common/ports/ARM/devices/LPC214x/lpc214x.h +++ /dev/null @@ -1,526 +0,0 @@ -/*
- ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio.
-
- This file is part of ChibiOS.
-
- ChibiOS is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file lpc214x.h
- * @brief LPC214x register definitions.
- */
-
-#ifndef _LPC214X_H_
-#define _LPC214X_H_
-
-typedef volatile uint8_t IOREG8;
-typedef volatile uint16_t IOREG16;
-typedef volatile uint32_t IOREG32;
-
-/*
- * System.
- */
-#define MEMMAP (*((IOREG32 *)0xE01FC040))
-#define PCON (*((IOREG32 *)0xE01FC0C0))
-#define PCONP (*((IOREG32 *)0xE01FC0C4))
-#define VPBDIV (*((IOREG32 *)0xE01FC100))
-#define EXTINT (*((IOREG32 *)0xE01FC140))
-#define INTWAKE (*((IOREG32 *)0xE01FC144))
-#define EXTMODE (*((IOREG32 *)0xE01FC148))
-#define EXTPOLAR (*((IOREG32 *)0xE01FC14C))
-#define RSID (*((IOREG32 *)0xE01FC180))
-#define CSPR (*((IOREG32 *)0xE01FC184))
-#define SCS (*((IOREG32 *)0xE01FC1A0))
-
-#define VPD_D4 0
-#define VPD_D1 1
-#define VPD_D2 2
-#define VPD_RESERVED 3
-
-#define PCTIM0 (1 << 1)
-#define PCTIM1 (1 << 2)
-#define PCUART0 (1 << 3)
-#define PCUART1 (1 << 4)
-#define PCPWM0 (1 << 5)
-#define PCI2C0 (1 << 7)
-#define PCSPI0 (1 << 8)
-#define PCRTC (1 << 9)
-#define PCSPI1 (1 << 10)
-#define PCAD0 (1 << 12)
-#define PCI2C1 (1 << 19)
-#define PCAD1 (1 << 20)
-#define PCUSB (1 << 31)
-#define PCALL (PCTIM0 | PCTIM1 | PCUART0 | PCUART1 | \
- PCPWM0 | PCI2C0 | PCSPI0 | PCRTC | PCSPI1 | \
- PCAD0 | PCI2C1 | PCAD1 | PCUSB)
-
-#define EINT0 1
-#define EINT1 2
-#define EINT2 4
-#define EINT3 8
-
-#define EXTWAKE0 1
-#define EXTWAKE1 2
-#define EXTWAKE2 4
-#define EXTWAKE3 8
-#define USBWAKE 0x20
-#define BODWAKE 0x4000
-#define RTCWAKE 0x8000
-
-#define EXTMODE0 1
-#define EXTMODE1 2
-#define EXTMODE2 4
-#define EXTMODE3 8
-
-#define EXTPOLAR0 1
-#define EXTPOLAR1 2
-#define EXTPOLAR2 4
-#define EXTPOLAR3 8
-
-typedef struct {
- IOREG32 PLL_CON;
- IOREG32 PLL_CFG;
- IOREG32 PLL_STAT;
- IOREG32 PLL_FEED;
-} PLL;
-
-#define PLL0Base ((PLL *)0xE01FC080)
-#define PLL1Base ((PLL *)0xE01FC0A0)
-#define PLL0CON (PLL0Base->PLL_CON)
-#define PLL0CFG (PLL0Base->PLL_CFG)
-#define PLL0STAT (PLL0Base->PLL_STAT)
-#define PLL0FEED (PLL0Base->PLL_FEED)
-#define PLL1CON (PLL1Base->PLL_CON)
-#define PLL1CFG (PLL1Base->PLL_CFG)
-#define PLL1STAT (PLL1Base->PLL_STAT)
-#define PLL1FEED (PLL1Base->PLL_FEED)
-
-/*
- * Pins.
- */
-typedef struct {
- IOREG32 PS_SEL0;
- IOREG32 PS_SEL1;
- IOREG32 _dummy[3];
- IOREG32 PS_SEL2;
-} PS;
-
-#define PSBase ((PS *)0xE002C000)
-#define PINSEL0 (PSBase->PS_SEL0)
-#define PINSEL1 (PSBase->PS_SEL1)
-#define PINSEL2 (PSBase->PS_SEL2)
-
-/*
- * VIC
- */
-#define SOURCE_WDT 0
-#define SOURCE_ARMCore0 2
-#define SOURCE_ARMCore1 3
-#define SOURCE_Timer0 4
-#define SOURCE_Timer1 5
-#define SOURCE_UART0 6
-#define SOURCE_UART1 7
-#define SOURCE_PWM0 8
-#define SOURCE_I2C0 9
-#define SOURCE_SPI0 10
-#define SOURCE_SPI1 11
-#define SOURCE_PLL 12
-#define SOURCE_RTC 13
-#define SOURCE_EINT0 14
-#define SOURCE_EINT1 15
-#define SOURCE_EINT2 16
-#define SOURCE_EINT3 17
-#define SOURCE_ADC0 18
-#define SOURCE_I2C1 19
-#define SOURCE_BOD 20
-#define SOURCE_ADC1 21
-#define SOURCE_USB 22
-
-#define INTMASK(n) (1 << (n))
-#define ALLINTMASK (INTMASK(SOURCE_WDT) | INTMASK(SOURCE_ARMCore0) | \
- INTMASK(SOURCE_ARMCore1) | INTMASK(SOURCE_Timer0) | \
- INTMASK(SOURCE_Timer1) | INTMASK(SOURCE_UART0) | \
- INTMASK(SOURCE_UART1) | INTMASK(SOURCE_PWM0) | \
- INTMASK(SOURCE_I2C0) | INTMASK(SOURCE_SPI0) | \
- INTMASK(SOURCE_SPI1) | INTMASK(SOURCE_PLL) | \
- INTMASK(SOURCE_RTC) | INTMASK(SOURCE_EINT0) | \
- INTMASK(SOURCE_EINT1) | INTMASK(SOURCE_EINT2) | \
- INTMASK(SOURCE_EINT3) | INTMASK(SOURCE_ADC0) | \
- INTMASK(SOURCE_I2C1) | INTMASK(SOURCE_BOD) | \
- INTMASK(SOURCE_ADC1) | INTMASK(SOURCE_USB))
-
-typedef struct {
- IOREG32 VIC_IRQStatus;
- IOREG32 VIC_FIQStatus;
- IOREG32 VIC_RawIntr;
- IOREG32 VIC_IntSelect;
- IOREG32 VIC_IntEnable;
- IOREG32 VIC_IntEnClear;
- IOREG32 VIC_SoftInt;
- IOREG32 VIC_SoftIntClear;
- IOREG32 VIC_Protection;
- IOREG32 unused1[3];
- IOREG32 VIC_VectAddr;
- IOREG32 VIC_DefVectAddr;
- IOREG32 unused2[50];
- IOREG32 VIC_VectAddrs[16];
- IOREG32 unused3[48];
- IOREG32 VIC_VectCntls[16];
-} VIC;
-
-#define VICBase ((VIC *)0xFFFFF000)
-#define VICVectorsBase ((IOREG32 *)0xFFFFF100)
-#define VICControlsBase ((IOREG32 *)0xFFFFF200)
-
-#define VICIRQStatus (VICBase->VIC_IRQStatus)
-#define VICFIQStatus (VICBase->VIC_FIQStatus)
-#define VICRawIntr (VICBase->VIC_RawIntr)
-#define VICIntSelect (VICBase->VIC_IntSelect)
-#define VICIntEnable (VICBase->VIC_IntEnable)
-#define VICIntEnClear (VICBase->VIC_IntEnClear)
-#define VICSoftInt (VICBase->VIC_SoftInt)
-#define VICSoftIntClear (VICBase->VIC_SoftIntClear)
-#define VICProtection (VICBase->VIC_Protection)
-#define VICVectAddr (VICBase->VIC_VectAddr)
-#define VICDefVectAddr (VICBase->VIC_DefVectAddr)
-
-#define VICVectAddrs(n) (VICBase->VIC_VectAddrs[n])
-#define VICVectCntls(n) (VICBase->VIC_VectCntls[n])
-
-/*
- * MAM.
- */
-typedef struct {
- IOREG32 MAM_Control;
- IOREG32 MAM_Timing;
-} MAM;
-
-#define MAMBase ((MAM *)0xE01FC000)
-#define MAMCR (MAMBase->MAM_Control)
-#define MAMTIM (MAMBase->MAM_Timing)
-
-/*
- * GPIO - FIO.
- */
-typedef struct {
- IOREG32 IO_PIN;
- IOREG32 IO_SET;
- IOREG32 IO_DIR;
- IOREG32 IO_CLR;
-} GPIO;
-
-#define GPIO0Base ((GPIO *)0xE0028000)
-#define IO0PIN (GPIO0Base->IO_PIN)
-#define IO0SET (GPIO0Base->IO_SET)
-#define IO0DIR (GPIO0Base->IO_DIR)
-#define IO0CLR (GPIO0Base->IO_CLR)
-
-#define GPIO1Base ((GPIO *)0xE0028010)
-#define IO1PIN (GPIO1Base->IO_PIN)
-#define IO1SET (GPIO1Base->IO_SET)
-#define IO1DIR (GPIO1Base->IO_DIR)
-#define IO1CLR (GPIO1Base->IO_CLR)
-
-typedef struct {
- IOREG32 FIO_DIR;
- IOREG32 unused1;
- IOREG32 unused2;
- IOREG32 unused3;
- IOREG32 FIO_MASK;
- IOREG32 FIO_PIN;
- IOREG32 FIO_SET;
- IOREG32 FIO_CLR;
-} FIO;
-
-#define FIO0Base ((FIO *)0x3FFFC000)
-#define FIO0DIR (FIO0Base->FIO_DIR)
-#define FIO0MASK (FIO0Base->FIO_MASK)
-#define FIO0PIN (FIO0Base->FIO_PIN)
-#define FIO0SET (FIO0Base->FIO_SET)
-#define FIO0CLR (FIO0Base->FIO_CLR)
-
-#define FIO1Base ((FIO *)0x3FFFC020)
-#define FIO1DIR (FIO1Base->FIO_DIR)
-#define FIO1MASK (FIO1Base->FIO_MASK)
-#define FIO1PIN (FIO1Base->FIO_PIN)
-#define FIO1SET (FIO1Base->FIO_SET)
-#define FIO1CLR (FIO1Base->FIO_CLR)
-
-/*
- * UART.
- */
-typedef struct {
- union {
- IOREG32 UART_RBR;
- IOREG32 UART_THR;
- IOREG32 UART_DLL;
- };
- union {
- IOREG32 UART_IER;
- IOREG32 UART_DLM;
- };
- union {
- IOREG32 UART_IIR;
- IOREG32 UART_FCR;
- };
- IOREG32 UART_LCR;
- IOREG32 UART_MCR;
- IOREG32 UART_LSR;
- IOREG32 unused18;
- IOREG32 UART_SCR;
- IOREG32 UART_ACR;
- IOREG32 unused24;
- IOREG32 UART_FDR;
- IOREG32 unused2C;
- IOREG32 UART_TER;
-} UART;
-
-#define U0Base ((UART *)0xE000C000)
-#define U0RBR (U0Base->UART_RBR)
-#define U0THR (U0Base->UART_THR)
-#define U0DLL (U0Base->UART_DLL)
-#define U0IER (U0Base->UART_IER)
-#define U0DLM (U0Base->UART_DLM)
-#define U0IIR (U0Base->UART_IIR)
-#define U0FCR (U0Base->UART_FCR)
-#define U0LCR (U0Base->UART_LCR)
-#define U0LSR (U0Base->UART_LSR)
-#define U0SCR (U0Base->UART_SCR)
-#define U0ACR (U0Base->UART_ACR)
-#define U0FDR (U0Base->UART_FDR)
-#define U0TER (U0Base->UART_TER)
-
-#define U1Base ((UART *)0xE0010000)
-#define U1RBR (U1Base->UART_RBR)
-#define U1THR (U1Base->UART_THR)
-#define U1DLL (U1Base->UART_DLL)
-#define U1IER (U1Base->UART_IER)
-#define U1DLM (U1Base->UART_DLM)
-#define U1IIR (U1Base->UART_IIR)
-#define U1FCR (U1Base->UART_FCR)
-#define U1MCR (U1Base->UART_MCR)
-#define U1LCR (U1Base->UART_LCR)
-#define U1LSR (U1Base->UART_LSR)
-#define U1SCR (U1Base->UART_SCR)
-#define U1ACR (U1Base->UART_ACR)
-#define U1FDR (U1Base->UART_FDR)
-#define U1TER (U1Base->UART_TER)
-
-#define IIR_SRC_MASK 0x0F
-#define IIR_SRC_NONE 0x01
-#define IIR_SRC_TX 0x02
-#define IIR_SRC_RX 0x04
-#define IIR_SRC_ERROR 0x06
-#define IIR_SRC_TIMEOUT 0x0C
-
-#define IER_RBR 1
-#define IER_THRE 2
-#define IER_STATUS 4
-
-#define IIR_INT_PENDING 1
-
-#define LCR_WL5 0
-#define LCR_WL6 1
-#define LCR_WL7 2
-#define LCR_WL8 3
-#define LCR_STOP1 0
-#define LCR_STOP2 4
-#define LCR_NOPARITY 0
-#define LCR_PARITYODD 0x08
-#define LCR_PARITYEVEN 0x18
-#define LCR_PARITYONE 0x28
-#define LCR_PARITYZERO 0x38
-#define LCR_BREAK_ON 0x40
-#define LCR_DLAB 0x80
-
-#define FCR_ENABLE 1
-#define FCR_RXRESET 2
-#define FCR_TXRESET 4
-#define FCR_TRIGGER0 0
-#define FCR_TRIGGER1 0x40
-#define FCR_TRIGGER2 0x80
-#define FCR_TRIGGER3 0xC0
-
-#define LSR_RBR_FULL 1
-#define LSR_OVERRUN 2
-#define LSR_PARITY 4
-#define LSR_FRAMING 8
-#define LSR_BREAK 0x10
-#define LSR_THRE 0x20
-#define LSR_TEMT 0x40
-#define LSR_RXFE 0x80
-
-#define TER_ENABLE 0x80
-
-/*
- * SSP.
- */
-typedef struct {
- IOREG32 SSP_CR0;
- IOREG32 SSP_CR1;
- IOREG32 SSP_DR;
- IOREG32 SSP_SR;
- IOREG32 SSP_CPSR;
- IOREG32 SSP_IMSC;
- IOREG32 SSP_RIS;
- IOREG32 SSP_MIS;
- IOREG32 SSP_ICR;
-} SSP;
-
-#define SSPBase ((SSP *)0xE0068000)
-#define SSPCR0 (SSPBase->SSP_CR0)
-#define SSPCR1 (SSPBase->SSP_CR1)
-#define SSPDR (SSPBase->SSP_DR)
-#define SSPSR (SSPBase->SSP_SR)
-#define SSPCPSR (SSPBase->SSP_CPSR)
-#define SSPIMSC (SSPBase->SSP_IMSC)
-#define SSPRIS (SSPBase->SSP_RIS)
-#define SSPMIS (SSPBase->SSP_MIS)
-#define SSPICR (SSPBase->SSP_ICR)
-
-#define CR0_DSSMASK 0x0F
-#define CR0_DSS4BIT 3
-#define CR0_DSS5BIT 4
-#define CR0_DSS6BIT 5
-#define CR0_DSS7BIT 6
-#define CR0_DSS8BIT 7
-#define CR0_DSS9BIT 8
-#define CR0_DSS10BIT 9
-#define CR0_DSS11BIT 0xA
-#define CR0_DSS12BIT 0xB
-#define CR0_DSS13BIT 0xC
-#define CR0_DSS14BIT 0xD
-#define CR0_DSS15BIT 0xE
-#define CR0_DSS16BIT 0xF
-#define CR0_FRFSPI 0
-#define CR0_FRFSSI 0x10
-#define CR0_FRFMW 0x20
-#define CR0_CPOL 0x40
-#define CR0_CPHA 0x80
-#define CR0_CLOCKRATE(n) ((n) << 8)
-
-#define CR1_LBM 1
-#define CR1_SSE 2
-#define CR1_MS 4
-#define CR1_SOD 8
-
-#define SR_TFE 1
-#define SR_TNF 2
-#define SR_RNE 4
-#define SR_RFF 8
-#define SR_BSY 0x10
-
-#define IMSC_ROR 1
-#define IMSC_RT 2
-#define IMSC_RX 4
-#define IMSC_TX 8
-
-#define RIS_ROR 1
-#define RIS_RT 2
-#define RIS_RX 4
-#define RIS_TX 8
-
-#define MIS_ROR 1
-#define MIS_RT 2
-#define MIS_RX 4
-#define MIS_TX 8
-
-#define ICR_ROR 1
-#define ICR_RT 2
-
-/*
- * Timers/Counters.
- */
-typedef struct {
- IOREG32 TC_IR;
- IOREG32 TC_TCR;
- IOREG32 TC_TC;
- IOREG32 TC_PR;
- IOREG32 TC_PC;
- IOREG32 TC_MCR;
- IOREG32 TC_MR0;
- IOREG32 TC_MR1;
- IOREG32 TC_MR2;
- IOREG32 TC_MR3;
- IOREG32 TC_CCR;
- IOREG32 TC_CR0;
- IOREG32 TC_CR1;
- IOREG32 TC_CR2;
- IOREG32 TC_CR3;
- IOREG32 TC_EMR;
- IOREG32 TC_CTCR;
-} TC;
-
-#define T0Base ((TC *)0xE0004000)
-#define T0IR (T0Base->TC_IR)
-#define T0TCR (T0Base->TC_TCR)
-#define T0TC (T0Base->TC_TC)
-#define T0PR (T0Base->TC_PR)
-#define T0PC (T0Base->TC_PC)
-#define T0MCR (T0Base->TC_MCR)
-#define T0MR0 (T0Base->TC_MR0)
-#define T0MR1 (T0Base->TC_MR1)
-#define T0MR2 (T0Base->TC_MR2)
-#define T0MR3 (T0Base->TC_MR3)
-#define T0CCR (T0Base->TC_CCR)
-#define T0CR0 (T0Base->TC_CR0)
-#define T0CR1 (T0Base->TC_CR1)
-#define T0CR2 (T0Base->TC_CR2)
-#define T0CR3 (T0Base->TC_CR3)
-#define T0EMR (T0Base->TC_EMR)
-#define T0CTCR (T0Base->TC_CTCR)
-
-#define T1Base ((TC *)0xE0008000)
-#define T1IR (T1Base->TC_IR)
-#define T1TCR (T1Base->TC_TCR)
-#define T1TC (T1Base->TC_TC)
-#define T1PR (T1Base->TC_PR)
-#define T1PC (T1Base->TC_PC)
-#define T1MCR (T1Base->TC_MCR)
-#define T1MR0 (T1Base->TC_MR0)
-#define T1MR1 (T1Base->TC_MR1)
-#define T1MR2 (T1Base->TC_MR2)
-#define T1MR3 (T1Base->TC_MR3)
-#define T1CCR (T1Base->TC_CCR)
-#define T1CR0 (T1Base->TC_CR0)
-#define T1CR1 (T1Base->TC_CR1)
-#define T1CR2 (T1Base->TC_CR2)
-#define T1CR3 (T1Base->TC_CR3)
-#define T1EMR (T1Base->TC_EMR)
-#define T1CTCR (T1Base->TC_CTCR)
-
-/*
- * Watchdog.
- */
-typedef struct {
- IOREG32 WD_MOD;
- IOREG32 WD_TC;
- IOREG32 WD_FEED;
- IOREG32 WD_TV;
-} WD;
-
-#define WDBase ((WD *)0xE0000000)
-#define WDMOD (WDBase->WD_MOD)
-#define WDTC (WDBase->WD_TC)
-#define WDFEED (WDBase->WD_FEED)
-#define WDTV (WDBase->WD_TV)
-
-/*
- * DAC.
- */
-#define DACR (*((IOREG32 *)0xE006C000))
-
-#endif /* _LPC214X_H_ */
-
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