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-rw-r--r--demos/ARMCM3-STM32F103-GCC/board.c46
1 files changed, 46 insertions, 0 deletions
diff --git a/demos/ARMCM3-STM32F103-GCC/board.c b/demos/ARMCM3-STM32F103-GCC/board.c
index 1d689bee8..09636cb9d 100644
--- a/demos/ARMCM3-STM32F103-GCC/board.c
+++ b/demos/ARMCM3-STM32F103-GCC/board.c
@@ -22,14 +22,55 @@
#include "board.h"
/*
+ * Wait states setting is a function of the system clock. Those are the
+ * recommended values, there should not be need to change them.
+ */
+#if SYSCLK <= 24000000
+#define FLASHBITS 0x00000010
+#else
+#if SYSCLK <= 48000000
+#define FLASHBITS 0x00000011
+#else
+#define FLASHBITS 0x00000012
+#endif
+#endif
+
+/*
* Hardware initialization goes here.
* NOTE: Interrupts are still disabled.
*/
void hwinit(void) {
/*
+ * Clocks and PLL initialization.
+ */
+ // HSI setup.
+ RCC->CR = 0x00000083; // Enforces a known state (HSI ON).
+ while (!(RCC->CR & (1 << 1)))
+ ; // Waits until HSI stable, it should already be.
+ // HSE setup.
+ RCC->CR |= (1 << 16); // HSE ON.
+ while (!(RCC->CR & (1 << 17)))
+ ; // Waits until HSE stable.
+ // PLL setup.
+ RCC->CFGR |= PLLPREBITS | PLLMULBITS | PLLSRCBITS;
+ RCC->CR |= (1 << 24); // PLL ON.
+ while (!(RCC->CR & (1 << 25)))
+ ; // Waits until PLL stable.
+ // Clock sources.
+ RCC->CFGR |= AHBBITS | PPRE1BITS | PPRE2BITS | ADCPREBITS |
+ USBPREBITS | MCOSRCBITS;
+
+ /*
+ * Flash setup and final clock selection.
+ */
+ FLASH->ACR = FLASHBITS; // Flash wait states depending on clock.
+ RCC->CFGR |= SYSSRCBITS; // Switches on the PLL clock.
+
+ /*
* I/O ports initialization as specified in board.h.
*/
+ RCC->APB2ENR = 0x0000003D; // Ports A-D enabled, AFIO enabled.
GPIOA->CRL = VAL_GPIOACRL;
GPIOA->CRH = VAL_GPIOACRH;
GPIOA->ODR = VAL_GPIOAODR;
@@ -45,4 +86,9 @@ void hwinit(void) {
GPIOD->CRL = VAL_GPIODCRL;
GPIOD->CRH = VAL_GPIODCRH;
GPIOD->ODR = VAL_GPIODODR;
+
+ /*
+ * NVIC/SCB setup.
+ */
+ SCB->AIRCR = (0x5FA << 16) | (0x5 << 8); // PRIGROUP = 5 (2:6).
}