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-rw-r--r--boards/ARDUINO_MEGA/board.c27
1 files changed, 0 insertions, 27 deletions
diff --git a/boards/ARDUINO_MEGA/board.c b/boards/ARDUINO_MEGA/board.c
index a33d693ad..16ad40ab3 100644
--- a/boards/ARDUINO_MEGA/board.c
+++ b/boards/ARDUINO_MEGA/board.c
@@ -62,20 +62,6 @@ const PALConfig pal_default_config =
#endif /* HAL_USE_PAL */
/**
- * @brief Timer0 interrupt handler.
- */
-CH_IRQ_HANDLER(TIMER0_COMPA_vect) {
-
- CH_IRQ_PROLOGUE();
-
- chSysLockFromIsr();
- chSysTimerHandlerI();
- chSysUnlockFromIsr();
-
- CH_IRQ_EPILOGUE();
-}
-
-/**
* Board-specific initialization code.
*/
void boardInit(void) {
@@ -86,17 +72,4 @@ void boardInit(void) {
EICRA = 0x00;
EICRB = 0x00;
EIMSK = 0x00;
-
- /*
- * Timer 0 setup.
- */
- TCCR0A = (1 << WGM01) | (0 << WGM00) | /* CTC mode. */
- (0 << COM0A1) | (0 << COM0A0) | /* OC0A disabled. */
- (0 << COM0B1) | (0 << COM0B0); /* OC0B disabled. */
- TCCR0B = (0 << WGM02) | /* CTC mode. */
- (0 << CS02) | (1 << CS01) | (1 << CS00); /* CLK/64 clock. */
- OCR0A = F_CPU / 64 / CH_FREQUENCY - 1;
- TCNT0 = 0; /* Reset counter. */
- TIFR0 = (1 << OCF0A); /* Reset pending. */
- TIMSK0 = (1 << OCIE0A); /* IRQ on compare. */
}