diff options
| -rw-r--r-- | demos/KINETIS/RT-FREEDOM-K20D50M/mcuconf.h | 16 | ||||
| -rw-r--r-- | os/hal/boards/FREESCALE_FREEDOM_K20D50M/board.h | 5 |
2 files changed, 14 insertions, 7 deletions
diff --git a/demos/KINETIS/RT-FREEDOM-K20D50M/mcuconf.h b/demos/KINETIS/RT-FREEDOM-K20D50M/mcuconf.h index b9870b60f..a39e553f4 100644 --- a/demos/KINETIS/RT-FREEDOM-K20D50M/mcuconf.h +++ b/demos/KINETIS/RT-FREEDOM-K20D50M/mcuconf.h @@ -22,10 +22,22 @@ /* Select the MCU clocking mode below by enabling the appropriate block. */
-/* FEI mode */
+/* Disable all clock intialization */
+#define KINETIS_NO_INIT FALSE
+
+/* PEE mode - external 8 MHz crystal with PLL for 48 MHz core/system clock. */
+#if 1
+#define KINETIS_MCG_MODE KINETIS_MCG_MODE_PEE
+#define KINETIS_XTAL_FREQUENCY 8000000UL
+#define KINETIS_SYSCLK_FREQUENCY 48000000UL
+#endif
+
+/* FEI mode - 48 MHz with internal 32.768 kHz crystal */
#if 0
#define KINETIS_MCG_MODE KINETIS_MCG_MODE_FEI
-#define KINETIS_SYSCLK_FREQUENCY 21000000UL
+#define KINETIS_MCG_FLL_DMX32 1 /* Fine-tune for 32.768 kHz */
+#define KINETIS_MCG_FLL_DRS 1 /* 1464x FLL factor */
+#define KINETIS_SYSCLK_FREQUENCY 47972352UL /* 32.768 kHz * 1464 (~48 MHz) */
#endif /* 0 */
/* FEE mode - 24 MHz with external 32.768 kHz crystal */
diff --git a/os/hal/boards/FREESCALE_FREEDOM_K20D50M/board.h b/os/hal/boards/FREESCALE_FREEDOM_K20D50M/board.h index b84e905e2..e3f6979af 100644 --- a/os/hal/boards/FREESCALE_FREEDOM_K20D50M/board.h +++ b/os/hal/boards/FREESCALE_FREEDOM_K20D50M/board.h @@ -27,11 +27,6 @@ #define BOARD_FREESCALE_FREEDOM_K20D50M
#define BOARD_NAME "Freescale Freedom K20D50M"
-/* External 8 MHz crystal with PLL for 48 MHz core/system clock. */
-#define KINETIS_SYSCLK_FREQUENCY 48000000UL
-#define KINETIS_MCG_MODE KINETIS_MCG_MODE_PEE
-#define KINETIS_XTAL_FREQUENCY 8000000UL
-
#if !defined(_FROM_ASM_)
#ifdef __cplusplus
extern "C" {
|