diff options
| -rw-r--r-- | os/hal/ports/STM32/LLD/USARTv1/hal_serial_lld.c | 12 | ||||
| -rw-r--r-- | os/hal/ports/STM32/LLD/USARTv1/hal_uart_lld.c | 12 | ||||
| -rw-r--r-- | os/hal/ports/STM32/LLD/USARTv2/hal_serial_lld.c | 17 | ||||
| -rw-r--r-- | os/hal/ports/STM32/LLD/USARTv2/hal_uart_lld.c | 10 | ||||
| -rw-r--r-- | readme.txt | 3 | 
5 files changed, 45 insertions, 9 deletions
diff --git a/os/hal/ports/STM32/LLD/USARTv1/hal_serial_lld.c b/os/hal/ports/STM32/LLD/USARTv1/hal_serial_lld.c index 6b837356a..17d08b7a3 100644 --- a/os/hal/ports/STM32/LLD/USARTv1/hal_serial_lld.c +++ b/os/hal/ports/STM32/LLD/USARTv1/hal_serial_lld.c @@ -99,6 +99,7 @@ static const SerialConfig default_config =   * @param[in] config    the architecture-dependent serial driver configuration
   */
  static void usart_init(SerialDriver *sdp, const SerialConfig *config) {
 +  uint32_t fck;
    USART_TypeDef *u = sdp->usart;
    /* Baud rate setting.*/
 @@ -107,9 +108,16 @@ static void usart_init(SerialDriver *sdp, const SerialConfig *config) {  #else
    if (sdp->usart == USART1)
  #endif
 -    u->BRR = STM32_PCLK2 / config->speed;
 +    fck = STM32_PCLK2 / config->speed;
    else
 -    u->BRR = STM32_PCLK1 / config->speed;
 +    fck = STM32_PCLK1 / config->speed;
 +
 +  /* Correcting USARTDIV when oversampling by 8 instead of 16.
 +     Fraction is still 4 bits wide, but only lower 3 bits used.
 +     Mantissa is doubled, but Fraction is left the same.*/
 +  if (config->cr1 & USART_CR1_OVER8)
 +    fck = ((fck & ~7) * 2) | (fck & 7);
 +  u->BRR = fck;
    /* Note that some bits are enforced.*/
    u->CR2 = config->cr2 | USART_CR2_LBDIE;
 diff --git a/os/hal/ports/STM32/LLD/USARTv1/hal_uart_lld.c b/os/hal/ports/STM32/LLD/USARTv1/hal_uart_lld.c index 3242e1478..c10944226 100644 --- a/os/hal/ports/STM32/LLD/USARTv1/hal_uart_lld.c +++ b/os/hal/ports/STM32/LLD/USARTv1/hal_uart_lld.c @@ -196,6 +196,7 @@ static void usart_stop(UARTDriver *uartp) {   * @param[in] uartp     pointer to the @p UARTDriver object
   */
  static void usart_start(UARTDriver *uartp) {
 +  uint32_t fck;
    uint16_t cr1;
    USART_TypeDef *u = uartp->usart;
 @@ -208,9 +209,16 @@ static void usart_start(UARTDriver *uartp) {  #else
    if (uartp->usart == USART1)
  #endif
 -    u->BRR = STM32_PCLK2 / uartp->config->speed;
 +    fck = STM32_PCLK2 / uartp->config->speed;
    else
 -    u->BRR = STM32_PCLK1 / uartp->config->speed;
 +    fck = STM32_PCLK1 / uartp->config->speed;
 +
 +  /* Correcting USARTDIV when oversampling by 8 instead of 16.
 +     Fraction is still 4 bits wide, but only lower 3 bits used.
 +     Mantissa is doubled, but Fraction is left the same.*/
 +  if (uartp->config->cr1 & USART_CR1_OVER8)
 +    fck = ((fck & ~7) * 2) | (fck & 7);
 +  u->BRR = fck;
    /* Resetting eventual pending status flags.*/
    (void)u->SR;  /* SR reset step 1.*/
 diff --git a/os/hal/ports/STM32/LLD/USARTv2/hal_serial_lld.c b/os/hal/ports/STM32/LLD/USARTv2/hal_serial_lld.c index 4b5f20836..e4d521bd7 100644 --- a/os/hal/ports/STM32/LLD/USARTv2/hal_serial_lld.c +++ b/os/hal/ports/STM32/LLD/USARTv2/hal_serial_lld.c @@ -213,17 +213,26 @@ static uint8_t sd_out_buflp1[STM32_SERIAL_LPUART1_OUT_BUF_SIZE];   * @param[in] config    the architecture-dependent serial driver configuration
   */
  static void usart_init(SerialDriver *sdp, const SerialConfig *config) {
 +  uint32_t fck;
    USART_TypeDef *u = sdp->usart;
    /* Baud rate setting.*/
  #if STM32_SERIAL_USE_LPUART1
 -  if ( sdp == &LPSD1 )
 -  {
 -      u->BRR = (uint32_t)( ( (uint64_t)sdp->clock * 256 ) / config->speed);
 +  if ( sdp == &LPSD1 ) {
 +    fck = (uint32_t)(((uint64_t)sdp->clock * 256 ) / config->speed);
    }
    else
  #endif
 -  u->BRR = (uint32_t)(sdp->clock / config->speed);
 +  {
 +    fck = (uint32_t)(sdp->clock / config->speed);
 +  }
 +
 +  /* Correcting USARTDIV when oversampling by 8 instead of 16.
 +     Fraction is still 4 bits wide, but only lower 3 bits used.
 +     Mantissa is doubled, but Fraction is left the same.*/
 +  if (config->cr1 & USART_CR1_OVER8)
 +    fck = ((fck & ~7) * 2) | (fck & 7);
 +  u->BRR = fck;
    /* Note that some bits are enforced.*/
    u->CR2 = config->cr2 | USART_CR2_LBDIE;
 diff --git a/os/hal/ports/STM32/LLD/USARTv2/hal_uart_lld.c b/os/hal/ports/STM32/LLD/USARTv2/hal_uart_lld.c index 62624b50d..1c4cafd81 100644 --- a/os/hal/ports/STM32/LLD/USARTv2/hal_uart_lld.c +++ b/os/hal/ports/STM32/LLD/USARTv2/hal_uart_lld.c @@ -252,6 +252,7 @@ static void usart_stop(UARTDriver *uartp) {   * @param[in] uartp     pointer to the @p UARTDriver object
   */
  static void usart_start(UARTDriver *uartp) {
 +  uint32_t fck;
    uint32_t cr1;
    const uint32_t tmo = uartp->config->timeout;
    USART_TypeDef *u = uartp->usart;
 @@ -260,7 +261,14 @@ static void usart_start(UARTDriver *uartp) {    usart_stop(uartp);
    /* Baud rate setting.*/
 -  u->BRR = (uint32_t)(uartp->clock / uartp->config->speed);
 +  fck = (uint32_t)(uartp->clock / uartp->config->speed);
 +
 +  /* Correcting USARTDIV when oversampling by 8 instead of 16.
 +     Fraction is still 4 bits wide, but only lower 3 bits used.
 +     Mantissa is doubled, but Fraction is left the same.*/
 +  if (uartp->config->cr1 & USART_CR1_OVER8)
 +    fck = ((fck & ~7) * 2) | (fck & 7);
 +  u->BRR = fck;
    /* Resetting eventual pending status flags.*/
    u->ICR = 0xFFFFFFFFU;
 diff --git a/readme.txt b/readme.txt index c075e27b6..161cc4c44 100644 --- a/readme.txt +++ b/readme.txt @@ -126,6 +126,9 @@  - EX:  Updated LIS302DL to 1.1.0 (backported to 18.2.1).
  - EX:  Updated LPS25H to 1.1.0 (backported to 18.2.1).
  - EX:  Updated LSM303DLHC to 1.1.0 (backported to 18.2.1).
 +- HAL: Fixed Invalid divider settings in Serial and UART STM32 drivers
 +       when USART_CR1_OVER8 is specified (bug #951)(backported to 18.2.2
 +       and 17.6.5).
  - NIL: Fixed missing extern declaration in IAR Cortex-M port (bug #950)
         (backported to 18.2.2 and 17.6.5).
  - HAL: Fixed ASCR register invalid handling in STM32 GPIOv3 driver (bug #949)
  | 
