aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
-rw-r--r--demos/ARMCM3-STM32F103/iar/ch.icf8
-rw-r--r--docs/reports/STM32F103-72-IAR.txt22
-rw-r--r--os/ports/IAR/ARMCMx/STM32/vectors.s4
-rw-r--r--os/ports/IAR/ARMCMx/cstartup.s4
4 files changed, 19 insertions, 19 deletions
diff --git a/demos/ARMCM3-STM32F103/iar/ch.icf b/demos/ARMCM3-STM32F103/iar/ch.icf
index c14393d39..0aedf5910 100644
--- a/demos/ARMCM3-STM32F103/iar/ch.icf
+++ b/demos/ARMCM3-STM32F103/iar/ch.icf
@@ -13,15 +13,15 @@ define symbol __ICFEDIT_size_cstack__ = 0x400;
define symbol __ICFEDIT_size_heap__ = 0x400;
/**** End of ICF editor section. ###ICF###*/
-/* Size of the Process Stack.*/
-define symbol __ICFEDIT_size_pstack__ = 0x400;
+/* Size of the IRQ Stack (Main Stack).*/
+define symbol __ICFEDIT_size_irqstack__ = 0x400;
define memory mem with size = 4G;
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
-define block PSTACK with alignment = 8, size = __ICFEDIT_size_pstack__ { };
+define block IRQSTACK with alignment = 8, size = __ICFEDIT_size_irqstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
define block SYSHEAP with alignment = 8, size = 0 { };
@@ -32,6 +32,6 @@ keep { section .intvec };
place at address mem:__ICFEDIT_intvec_start__ { section .intvec };
place in ROM_region { readonly };
-place in RAM_region { block PSTACK, block CSTACK, readwrite, block HEAP, block SYSHEAP};
+place in RAM_region { block IRQSTACK, block CSTACK, readwrite, block HEAP, block SYSHEAP};
define exported symbol __heap_end__ = end(RAM_region) + 1;
diff --git a/docs/reports/STM32F103-72-IAR.txt b/docs/reports/STM32F103-72-IAR.txt
index 7271148c2..0ad93a193 100644
--- a/docs/reports/STM32F103-72-IAR.txt
+++ b/docs/reports/STM32F103-72-IAR.txt
@@ -98,43 +98,43 @@ Compiler: IAR C/C++ Compiler for ARM 6.10.1.32143
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.1 (Benchmark, messages #1)
---- Score : 237878 msgs/S, 475756 ctxswc/S
+--- Score : 237880 msgs/S, 475760 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.2 (Benchmark, messages #2)
---- Score : 206433 msgs/S, 412866 ctxswc/S
+--- Score : 206437 msgs/S, 412874 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.3 (Benchmark, messages #3)
---- Score : 204665 msgs/S, 409330 ctxswc/S
+--- Score : 204672 msgs/S, 409344 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.4 (Benchmark, context switch)
---- Score : 861656 ctxswc/S
+--- Score : 861664 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.5 (Benchmark, threads, full cycle)
---- Score : 149983 threads/S
+--- Score : 149986 threads/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.6 (Benchmark, threads, create only)
---- Score : 226631 threads/S
+--- Score : 228798 threads/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.7 (Benchmark, mass reschedule, 5 threads)
---- Score : 68158 reschedules/S, 408948 ctxswc/S
+--- Score : 68159 reschedules/S, 408954 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.8 (Benchmark, round robin context switching)
---- Score : 459040 ctxswc/S
+--- Score : 459052 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.9 (Benchmark, I/O Queues throughput)
---- Score : 535124 bytes/S
+--- Score : 523436 bytes/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.10 (Benchmark, virtual timers set/reset)
---- Score : 674546 timers/S
+--- Score : 674558 timers/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.11 (Benchmark, semaphores wait/signal)
@@ -142,7 +142,7 @@ Compiler: IAR C/C++ Compiler for ARM 6.10.1.32143
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.12 (Benchmark, mutexes lock/unlock)
---- Score : 627420 lock+unlock/S
+--- Score : 621992 lock+unlock/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.13 (Benchmark, RAM footprint)
diff --git a/os/ports/IAR/ARMCMx/STM32/vectors.s b/os/ports/IAR/ARMCMx/STM32/vectors.s
index 28eab1943..193150f38 100644
--- a/os/ports/IAR/ARMCMx/STM32/vectors.s
+++ b/os/ports/IAR/ARMCMx/STM32/vectors.s
@@ -30,7 +30,7 @@
AAPCS INTERWORK, VFP_COMPATIBLE, RWPI_COMPATIBLE
PRESERVE8
- SECTION CSTACK:DATA:NOROOT(3)
+ SECTION IRQSTACK:DATA:NOROOT(3)
SECTION .intvec:CODE:NOROOT(2)
EXTERN __iar_program_start
@@ -39,7 +39,7 @@
DATA
__vector_table:
- DCD SFE(CSTACK)
+ DCD SFE(IRQSTACK)
DCD __iar_program_start
DCD NMIVector
DCD HardFaultVector
diff --git a/os/ports/IAR/ARMCMx/cstartup.s b/os/ports/IAR/ARMCMx/cstartup.s
index 4f60492ce..e01cb6dd3 100644
--- a/os/ports/IAR/ARMCMx/cstartup.s
+++ b/os/ports/IAR/ARMCMx/cstartup.s
@@ -27,7 +27,7 @@ CONTROL_USE_PSP SET 2
AAPCS INTERWORK, VFP_COMPATIBLE, ROPI
PRESERVE8
- SECTION PSTACK:DATA:NOROOT(3)
+ SECTION CSTACK:DATA:NOROOT(3)
SECTION .intvec:CODE:NOROOT(3)
PUBLIC __iar_program_start
@@ -41,7 +41,7 @@ CONTROL_USE_PSP SET 2
THUMB
__iar_program_start:
cpsid i
- ldr r0, =sfe(PSTACK)
+ ldr r0, =sfe(CSTACK)
msr PSP, r0
movs r0, #CONTROL_MODE_PRIVILEGED | CONTROL_USE_PSP
msr CONTROL, r0