aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
-rw-r--r--os/hal/ports/STM32/LLD/xWDGv1/wdg_lld.c16
-rw-r--r--testhal/STM32/STM32F3xx/WDG/Makefile2
-rw-r--r--testhal/STM32/STM32F3xx/WDG/main.c4
3 files changed, 18 insertions, 4 deletions
diff --git a/os/hal/ports/STM32/LLD/xWDGv1/wdg_lld.c b/os/hal/ports/STM32/LLD/xWDGv1/wdg_lld.c
index bdcfb383a..8ea82a958 100644
--- a/os/hal/ports/STM32/LLD/xWDGv1/wdg_lld.c
+++ b/os/hal/ports/STM32/LLD/xWDGv1/wdg_lld.c
@@ -81,19 +81,33 @@ void wdg_lld_init(void) {
*/
void wdg_lld_start(WDGDriver *wdgp) {
- /* Unlock IWDG.*/
+#if 1
+ /* Enable IWDG and unlock for write.*/
+ wdgp->wdg->KR = KR_KEY_ENABLE;
wdgp->wdg->KR = KR_KEY_WRITE;
/* Write configuration.*/
wdgp->wdg->PR = wdgp->config->pr;
wdgp->wdg->RLR = wdgp->config->rlr;
+ while (wdgp->wdg->SR != 0)
+ ;
+
+ /* This also triggers a refresh.*/
wdgp->wdg->WINR = wdgp->config->winr;
+#else
+ /* Unlock IWDG.*/
+ wdgp->wdg->KR = KR_KEY_WRITE;
+
+ /* Write configuration.*/
+ wdgp->wdg->PR = wdgp->config->pr;
+ wdgp->wdg->RLR = wdgp->config->rlr;
while (wdgp->wdg->SR != 0)
;
/* Start operations.*/
wdgp->wdg->KR = KR_KEY_RELOAD;
wdgp->wdg->KR = KR_KEY_ENABLE;
+#endif
}
/**
diff --git a/testhal/STM32/STM32F3xx/WDG/Makefile b/testhal/STM32/STM32F3xx/WDG/Makefile
index c01cfa725..fe9e06861 100644
--- a/testhal/STM32/STM32F3xx/WDG/Makefile
+++ b/testhal/STM32/STM32F3xx/WDG/Makefile
@@ -5,7 +5,7 @@
# Compiler options here.
ifeq ($(USE_OPT),)
- USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16
+ USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16
endif
# C specific options here (added to USE_OPT).
diff --git a/testhal/STM32/STM32F3xx/WDG/main.c b/testhal/STM32/STM32F3xx/WDG/main.c
index aeec0e35a..5c9cb11a5 100644
--- a/testhal/STM32/STM32F3xx/WDG/main.c
+++ b/testhal/STM32/STM32F3xx/WDG/main.c
@@ -18,10 +18,10 @@
#include "hal.h"
/*
- * Watchdog deadline set to one second (LSI=40000 / 4 / 1000).
+ * Watchdog deadline set to more than one second (LSI=40000 / (64 * 1000)).
*/
static const WDGConfig wdgcfg = {
- STM32_IWDG_PR_4,
+ STM32_IWDG_PR_64,
STM32_IWDG_RL(1000),
STM32_IWDG_WIN_DISABLED
};