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-rw-r--r--demos/ARM7-AT91SAM7S-FATFS-GCC/chconf.h20
-rw-r--r--demos/ARM7-AT91SAM7S-GCC/chconf.h20
-rw-r--r--demos/ARM7-AT91SAM7X-FATFS-GCC/chconf.h20
-rw-r--r--demos/ARM7-AT91SAM7X-GCC/chconf.h20
-rw-r--r--demos/ARM7-AT91SAM7X-LWIP-GCC/chconf.h20
-rw-r--r--demos/ARM7-AT91SAM7X-UIP-GCC/chconf.h20
-rw-r--r--demos/ARM7-LPC214x-FATFS-GCC/chconf.h20
-rw-r--r--demos/ARM7-LPC214x-G++/chconf.h20
-rw-r--r--demos/ARM7-LPC214x-GCC/chconf.h20
-rw-r--r--demos/ARMCM0-LPC1114-LPCXPRESSO/chconf.h20
-rw-r--r--demos/ARMCM3-LPC1343-LPCXPRESSO/chconf.h20
-rw-r--r--demos/ARMCM3-STM32F100-DISCOVERY/chconf.h20
-rw-r--r--demos/ARMCM3-STM32F103-FATFS-GCC/chconf.h20
-rw-r--r--demos/ARMCM3-STM32F103-G++/chconf.h20
-rw-r--r--demos/ARMCM3-STM32F103/chconf.h20
-rw-r--r--demos/ARMCM3-STM32F103ZG/chconf.h20
-rw-r--r--demos/ARMCM3-STM32F107/chconf.h20
-rw-r--r--demos/AVR-AT90CANx-GCC/chconf.h20
-rw-r--r--demos/AVR-ATmega128-GCC/chconf.h20
-rw-r--r--demos/MSP430-MSP430x1611-GCC/chconf.h20
-rw-r--r--demos/PPC-SPC563-GCC/chconf.h20
-rw-r--r--demos/Posix-GCC/chconf.h20
-rw-r--r--demos/STM8L-STM8L152-DISCOVERY-STVD/demo/chconf.h20
-rw-r--r--demos/STM8S-STM8S105-DISCOVERY-STVD/demo/chconf.h20
-rw-r--r--demos/STM8S-STM8S208-RC/chconf.h20
-rw-r--r--demos/Win32-MinGW/chconf.h20
-rw-r--r--os/kernel/include/chschd.h6
-rw-r--r--os/kernel/src/chsys.c2
-rw-r--r--os/kernel/templates/chconf.h20
-rw-r--r--os/kernel/templates/chcore.h8
-rw-r--r--os/ports/GCC/ARM/chcore.h14
-rw-r--r--os/ports/GCC/ARMCMx/old/chcore_v7m.c15
-rw-r--r--os/ports/GCC/ARMCMx/old/chcore_v7m.h10
-rw-r--r--os/ports/GCC/AVR/chcore.c4
-rw-r--r--os/ports/GCC/AVR/chcore.h14
-rw-r--r--os/ports/GCC/MSP430/chcore.h12
-rw-r--r--os/ports/GCC/PPC/chcore.h12
-rw-r--r--os/ports/GCC/SIMIA32/chcore.h10
-rw-r--r--os/ports/IAR/ARMCMx/chcore.h2
-rw-r--r--os/ports/IAR/ARMCMx/chcore_v6m.h10
-rw-r--r--os/ports/IAR/ARMCMx/chcore_v7m.h14
-rw-r--r--os/ports/RC/STM8/chcore.h12
-rw-r--r--os/ports/RVCT/ARMCMx/chcore.h2
-rw-r--r--os/ports/RVCT/ARMCMx/chcore_v6m.h10
-rw-r--r--os/ports/RVCT/ARMCMx/chcore_v7m.h14
-rw-r--r--os/ports/cosmic/STM8/chcore.h12
-rw-r--r--test/coverage/chconf.h20
-rw-r--r--testhal/LPC11xx/IRQ_STORM/chconf.h20
-rw-r--r--testhal/LPC13xx/IRQ_STORM/chconf.h20
-rw-r--r--testhal/STM32/ADC/chconf.h20
-rw-r--r--testhal/STM32/CAN/chconf.h20
-rw-r--r--testhal/STM32/GPT/chconf.h20
-rw-r--r--testhal/STM32/IRQ_STORM/chconf.h20
-rw-r--r--testhal/STM32/PWM-ICU/chconf.h20
-rw-r--r--testhal/STM32/SDIO/chconf.h20
-rw-r--r--testhal/STM32/SPI/chconf.h20
-rw-r--r--testhal/STM32/UART/chconf.h20
-rw-r--r--testhal/STM32/USB_CDC/chconf.h20
-rw-r--r--testhal/STM32/USB_MSC/chconf.h20
-rw-r--r--testhal/STM8S/SPI/demo/chconf.h20
60 files changed, 75 insertions, 928 deletions
diff --git a/demos/ARM7-AT91SAM7S-FATFS-GCC/chconf.h b/demos/ARM7-AT91SAM7S-FATFS-GCC/chconf.h
index 14109b635..ccde82347 100644
--- a/demos/ARM7-AT91SAM7S-FATFS-GCC/chconf.h
+++ b/demos/ARM7-AT91SAM7S-FATFS-GCC/chconf.h
@@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
-/**
- * @brief Exotic optimization.
- * @details If defined then a CPU register is used as storage for the global
- * @p currp variable. Caching this variable in a register greatly
- * improves both space and time OS efficiency. A side effect is that
- * one less register has to be saved during the context switch
- * resulting in lower RAM usage and faster context switch.
- *
- * @note This option is only usable with the GCC compiler and is only useful
- * on processors with many registers like ARM cores.
- * @note If this option is enabled then ALL the libraries linked to the
- * ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
- * -ffixed-@<reg@>.
- * @note This option must be enabled in the Makefile, it is listed here for
- * documentation only.
- */
-#if defined(__DOXYGEN__)
-#define CH_CURRP_REGISTER_CACHE "reg"
-#endif
-
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/
diff --git a/demos/ARM7-AT91SAM7S-GCC/chconf.h b/demos/ARM7-AT91SAM7S-GCC/chconf.h
index 14109b635..ccde82347 100644
--- a/demos/ARM7-AT91SAM7S-GCC/chconf.h
+++ b/demos/ARM7-AT91SAM7S-GCC/chconf.h
@@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
-/**
- * @brief Exotic optimization.
- * @details If defined then a CPU register is used as storage for the global
- * @p currp variable. Caching this variable in a register greatly
- * improves both space and time OS efficiency. A side effect is that
- * one less register has to be saved during the context switch
- * resulting in lower RAM usage and faster context switch.
- *
- * @note This option is only usable with the GCC compiler and is only useful
- * on processors with many registers like ARM cores.
- * @note If this option is enabled then ALL the libraries linked to the
- * ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
- * -ffixed-@<reg@>.
- * @note This option must be enabled in the Makefile, it is listed here for
- * documentation only.
- */
-#if defined(__DOXYGEN__)
-#define CH_CURRP_REGISTER_CACHE "reg"
-#endif
-
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/
diff --git a/demos/ARM7-AT91SAM7X-FATFS-GCC/chconf.h b/demos/ARM7-AT91SAM7X-FATFS-GCC/chconf.h
index 14109b635..ccde82347 100644
--- a/demos/ARM7-AT91SAM7X-FATFS-GCC/chconf.h
+++ b/demos/ARM7-AT91SAM7X-FATFS-GCC/chconf.h
@@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
-/**
- * @brief Exotic optimization.
- * @details If defined then a CPU register is used as storage for the global
- * @p currp variable. Caching this variable in a register greatly
- * improves both space and time OS efficiency. A side effect is that
- * one less register has to be saved during the context switch
- * resulting in lower RAM usage and faster context switch.
- *
- * @note This option is only usable with the GCC compiler and is only useful
- * on processors with many registers like ARM cores.
- * @note If this option is enabled then ALL the libraries linked to the
- * ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
- * -ffixed-@<reg@>.
- * @note This option must be enabled in the Makefile, it is listed here for
- * documentation only.
- */
-#if defined(__DOXYGEN__)
-#define CH_CURRP_REGISTER_CACHE "reg"
-#endif
-
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/
diff --git a/demos/ARM7-AT91SAM7X-GCC/chconf.h b/demos/ARM7-AT91SAM7X-GCC/chconf.h
index 14109b635..ccde82347 100644
--- a/demos/ARM7-AT91SAM7X-GCC/chconf.h
+++ b/demos/ARM7-AT91SAM7X-GCC/chconf.h
@@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
-/**
- * @brief Exotic optimization.
- * @details If defined then a CPU register is used as storage for the global
- * @p currp variable. Caching this variable in a register greatly
- * improves both space and time OS efficiency. A side effect is that
- * one less register has to be saved during the context switch
- * resulting in lower RAM usage and faster context switch.
- *
- * @note This option is only usable with the GCC compiler and is only useful
- * on processors with many registers like ARM cores.
- * @note If this option is enabled then ALL the libraries linked to the
- * ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
- * -ffixed-@<reg@>.
- * @note This option must be enabled in the Makefile, it is listed here for
- * documentation only.
- */
-#if defined(__DOXYGEN__)
-#define CH_CURRP_REGISTER_CACHE "reg"
-#endif
-
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/
diff --git a/demos/ARM7-AT91SAM7X-LWIP-GCC/chconf.h b/demos/ARM7-AT91SAM7X-LWIP-GCC/chconf.h
index 4c2ee5818..c117dccdd 100644
--- a/demos/ARM7-AT91SAM7X-LWIP-GCC/chconf.h
+++ b/demos/ARM7-AT91SAM7X-LWIP-GCC/chconf.h
@@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
-/**
- * @brief Exotic optimization.
- * @details If defined then a CPU register is used as storage for the global
- * @p currp variable. Caching this variable in a register greatly
- * improves both space and time OS efficiency. A side effect is that
- * one less register has to be saved during the context switch
- * resulting in lower RAM usage and faster context switch.
- *
- * @note This option is only usable with the GCC compiler and is only useful
- * on processors with many registers like ARM cores.
- * @note If this option is enabled then ALL the libraries linked to the
- * ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
- * -ffixed-@<reg@>.
- * @note This option must be enabled in the Makefile, it is listed here for
- * documentation only.
- */
-#if defined(__DOXYGEN__)
-#define CH_CURRP_REGISTER_CACHE "reg"
-#endif
-
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/
diff --git a/demos/ARM7-AT91SAM7X-UIP-GCC/chconf.h b/demos/ARM7-AT91SAM7X-UIP-GCC/chconf.h
index 14109b635..ccde82347 100644
--- a/demos/ARM7-AT91SAM7X-UIP-GCC/chconf.h
+++ b/demos/ARM7-AT91SAM7X-UIP-GCC/chconf.h
@@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
-/**
- * @brief Exotic optimization.
- * @details If defined then a CPU register is used as storage for the global
- * @p currp variable. Caching this variable in a register greatly
- * improves both space and time OS efficiency. A side effect is that
- * one less register has to be saved during the context switch
- * resulting in lower RAM usage and faster context switch.
- *
- * @note This option is only usable with the GCC compiler and is only useful
- * on processors with many registers like ARM cores.
- * @note If this option is enabled then ALL the libraries linked to the
- * ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
- * -ffixed-@<reg@>.
- * @note This option must be enabled in the Makefile, it is listed here for
- * documentation only.
- */
-#if defined(__DOXYGEN__)
-#define CH_CURRP_REGISTER_CACHE "reg"
-#endif
-
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/
diff --git a/demos/ARM7-LPC214x-FATFS-GCC/chconf.h b/demos/ARM7-LPC214x-FATFS-GCC/chconf.h
index 14109b635..ccde82347 100644
--- a/demos/ARM7-LPC214x-FATFS-GCC/chconf.h
+++ b/demos/ARM7-LPC214x-FATFS-GCC/chconf.h
@@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
-/**
- * @brief Exotic optimization.
- * @details If defined then a CPU register is used as storage for the global
- * @p currp variable. Caching this variable in a register greatly
- * improves both space and time OS efficiency. A side effect is that
- * one less register has to be saved during the context switch
- * resulting in lower RAM usage and faster context switch.
- *
- * @note This option is only usable with the GCC compiler and is only useful
- * on processors with many registers like ARM cores.
- * @note If this option is enabled then ALL the libraries linked to the
- * ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
- * -ffixed-@<reg@>.
- * @note This option must be enabled in the Makefile, it is listed here for
- * documentation only.
- */
-#if defined(__DOXYGEN__)
-#define CH_CURRP_REGISTER_CACHE "reg"
-#endif
-
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/
diff --git a/demos/ARM7-LPC214x-G++/chconf.h b/demos/ARM7-LPC214x-G++/chconf.h
index 14109b635..ccde82347 100644
--- a/demos/ARM7-LPC214x-G++/chconf.h
+++ b/demos/ARM7-LPC214x-G++/chconf.h
@@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
-/**
- * @brief Exotic optimization.
- * @details If defined then a CPU register is used as storage for the global
- * @p currp variable. Caching this variable in a register greatly
- * improves both space and time OS efficiency. A side effect is that
- * one less register has to be saved during the context switch
- * resulting in lower RAM usage and faster context switch.
- *
- * @note This option is only usable with the GCC compiler and is only useful
- * on processors with many registers like ARM cores.
- * @note If this option is enabled then ALL the libraries linked to the
- * ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
- * -ffixed-@<reg@>.
- * @note This option must be enabled in the Makefile, it is listed here for
- * documentation only.
- */
-#if defined(__DOXYGEN__)
-#define CH_CURRP_REGISTER_CACHE "reg"
-#endif
-
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/
diff --git a/demos/ARM7-LPC214x-GCC/chconf.h b/demos/ARM7-LPC214x-GCC/chconf.h
index 14109b635..ccde82347 100644
--- a/demos/ARM7-LPC214x-GCC/chconf.h
+++ b/demos/ARM7-LPC214x-GCC/chconf.h
@@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
-/**
- * @brief Exotic optimization.
- * @details If defined then a CPU register is used as storage for the global
- * @p currp variable. Caching this variable in a register greatly
- * improves both space and time OS efficiency. A side effect is that
- * one less register has to be saved during the context switch
- * resulting in lower RAM usage and faster context switch.
- *
- * @note This option is only usable with the GCC compiler and is only useful
- * on processors with many registers like ARM cores.
- * @note If this option is enabled then ALL the libraries linked to the
- * ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
- * -ffixed-@<reg@>.
- * @note This option must be enabled in the Makefile, it is listed here for
- * documentation only.
- */
-#if defined(__DOXYGEN__)
-#define CH_CURRP_REGISTER_CACHE "reg"
-#endif
-
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/
diff --git a/demos/ARMCM0-LPC1114-LPCXPRESSO/chconf.h b/demos/ARMCM0-LPC1114-LPCXPRESSO/chconf.h
index 14109b635..ccde82347 100644
--- a/demos/ARMCM0-LPC1114-LPCXPRESSO/chconf.h
+++ b/demos/ARMCM0-LPC1114-LPCXPRESSO/chconf.h
@@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
-/**
- * @brief Exotic optimization.
- * @details If defined then a CPU register is used as storage for the global
- * @p currp variable. Caching this variable in a register greatly
- * improves both space and time OS efficiency. A side effect is that
- * one less register has to be saved during the context switch
- * resulting in lower RAM usage and faster context switch.
- *
- * @note This option is only usable with the GCC compiler and is only useful
- * on processors with many registers like ARM cores.
- * @note If this option is enabled then ALL the libraries linked to the
- * ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
- * -ffixed-@<reg@>.
- * @note This option must be enabled in the Makefile, it is listed here for
- * documentation only.
- */
-#if defined(__DOXYGEN__)
-#define CH_CURRP_REGISTER_CACHE "reg"
-#endif
-
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/
diff --git a/demos/ARMCM3-LPC1343-LPCXPRESSO/chconf.h b/demos/ARMCM3-LPC1343-LPCXPRESSO/chconf.h
index 14109b635..ccde82347 100644
--- a/demos/ARMCM3-LPC1343-LPCXPRESSO/chconf.h
+++ b/demos/ARMCM3-LPC1343-LPCXPRESSO/chconf.h
@@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
-/**
- * @brief Exotic optimization.
- * @details If defined then a CPU register is used as storage for the global
- * @p currp variable. Caching this variable in a register greatly
- * improves both space and time OS efficiency. A side effect is that
- * one less register has to be saved during the context switch
- * resulting in lower RAM usage and faster context switch.
- *
- * @note This option is only usable with the GCC compiler and is only useful
- * on processors with many registers like ARM cores.
- * @note If this option is enabled then ALL the libraries linked to the
- * ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
- * -ffixed-@<reg@>.
- * @note This option must be enabled in the Makefile, it is listed here for
- * documentation only.
- */
-#if defined(__DOXYGEN__)
-#define CH_CURRP_REGISTER_CACHE "reg"
-#endif
-
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/
diff --git a/demos/ARMCM3-STM32F100-DISCOVERY/chconf.h b/demos/ARMCM3-STM32F100-DISCOVERY/chconf.h
index 14109b635..ccde82347 100644
--- a/demos/ARMCM3-STM32F100-DISCOVERY/chconf.h
+++ b/demos/ARMCM3-STM32F100-DISCOVERY/chconf.h
@@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
-/**
- * @brief Exotic optimization.
- * @details If defined then a CPU register is used as storage for the global
- * @p currp variable. Caching this variable in a register greatly
- * improves both space and time OS efficiency. A side effect is that
- * one less register has to be saved during the context switch
- * resulting in lower RAM usage and faster context switch.
- *
- * @note This option is only usable with the GCC compiler and is only useful
- * on processors with many registers like ARM cores.
- * @note If this option is enabled then ALL the libraries linked to the
- * ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
- * -ffixed-@<reg@>.
- * @note This option must be enabled in the Makefile, it is listed here for
- * documentation only.
- */
-#if defined(__DOXYGEN__)
-#define CH_CURRP_REGISTER_CACHE "reg"
-#endif
-
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/
diff --git a/demos/ARMCM3-STM32F103-FATFS-GCC/chconf.h b/demos/ARMCM3-STM32F103-FATFS-GCC/chconf.h
index 14109b635..ccde82347 100644
--- a/demos/ARMCM3-STM32F103-FATFS-GCC/chconf.h
+++ b/demos/ARMCM3-STM32F103-FATFS-GCC/chconf.h
@@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
-/**
- * @brief Exotic optimization.
- * @details If defined then a CPU register is used as storage for the global
- * @p currp variable. Caching this variable in a register greatly
- * improves both space and time OS efficiency. A side effect is that
- * one less register has to be saved during the context switch
- * resulting in lower RAM usage and faster context switch.
- *
- * @note This option is only usable with the GCC compiler and is only useful
- * on processors with many registers like ARM cores.
- * @note If this option is enabled then ALL the libraries linked to the
- * ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
- * -ffixed-@<reg@>.
- * @note This option must be enabled in the Makefile, it is listed here for
- * documentation only.
- */
-#if defined(__DOXYGEN__)
-#define CH_CURRP_REGISTER_CACHE "reg"
-#endif
-
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/
diff --git a/demos/ARMCM3-STM32F103-G++/chconf.h b/demos/ARMCM3-STM32F103-G++/chconf.h
index 14109b635..ccde82347 100644
--- a/demos/ARMCM3-STM32F103-G++/chconf.h
+++ b/demos/ARMCM3-STM32F103-G++/chconf.h
@@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
-/**
- * @brief Exotic optimization.
- * @details If defined then a CPU register is used as storage for the global
- * @p currp variable. Caching this variable in a register greatly
- * improves both space and time OS efficiency. A side effect is that
- * one less register has to be saved during the context switch
- * resulting in lower RAM usage and faster context switch.
- *
- * @note This option is only usable with the GCC compiler and is only useful
- * on processors with many registers like ARM cores.
- * @note If this option is enabled then ALL the libraries linked to the
- * ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
- * -ffixed-@<reg@>.
- * @note This option must be enabled in the Makefile, it is listed here for
- * documentation only.
- */
-#if defined(__DOXYGEN__)
-#define CH_CURRP_REGISTER_CACHE "reg"
-#endif
-
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/
diff --git a/demos/ARMCM3-STM32F103/chconf.h b/demos/ARMCM3-STM32F103/chconf.h
index 14109b635..ccde82347 100644
--- a/demos/ARMCM3-STM32F103/chconf.h
+++ b/demos/ARMCM3-STM32F103/chconf.h
@@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
-/**
- * @brief Exotic optimization.
- * @details If defined then a CPU register is used as storage for the global
- * @p currp variable. Caching this variable in a register greatly
- * improves both space and time OS efficiency. A side effect is that
- * one less register has to be saved during the context switch
- * resulting in lower RAM usage and faster context switch.
- *
- * @note This option is only usable with the GCC compiler and is only useful
- * on processors with many registers like ARM cores.
- * @note If this option is enabled then ALL the libraries linked to the
- * ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
- * -ffixed-@<reg@>.
- * @note This option must be enabled in the Makefile, it is listed here for
- * documentation only.
- */
-#if defined(__DOXYGEN__)
-#define CH_CURRP_REGISTER_CACHE "reg"
-#endif
-
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/
diff --git a/demos/ARMCM3-STM32F103ZG/chconf.h b/demos/ARMCM3-STM32F103ZG/chconf.h
index 14109b635..ccde82347 100644
--- a/demos/ARMCM3-STM32F103ZG/chconf.h
+++ b/demos/ARMCM3-STM32F103ZG/chconf.h
@@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
-/**
- * @brief Exotic optimization.
- * @details If defined then a CPU register is used as storage for the global
- * @p currp variable. Caching this variable in a register greatly
- * improves both space and time OS efficiency. A side effect is that
- * one less register has to be saved during the context switch
- * resulting in lower RAM usage and faster context switch.
- *
- * @note This option is only usable with the GCC compiler and is only useful
- * on processors with many registers like ARM cores.
- * @note If this option is enabled then ALL the libraries linked to the
- * ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
- * -ffixed-@<reg@>.
- * @note This option must be enabled in the Makefile, it is listed here for
- * documentation only.
- */
-#if defined(__DOXYGEN__)
-#define CH_CURRP_REGISTER_CACHE "reg"
-#endif
-
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/
diff --git a/demos/ARMCM3-STM32F107/chconf.h b/demos/ARMCM3-STM32F107/chconf.h
index 14109b635..ccde82347 100644
--- a/demos/ARMCM3-STM32F107/chconf.h
+++ b/demos/ARMCM3-STM32F107/chconf.h
@@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
-/**
- * @brief Exotic optimization.
- * @details If defined then a CPU register is used as storage for the global
- * @p currp variable. Caching this variable in a register greatly
- * improves both space and time OS efficiency. A side effect is that
- * one less register has to be saved during the context switch
- * resulting in lower RAM usage and faster context switch.
- *
- * @note This option is only usable with the GCC compiler and is only useful
- * on processors with many registers like ARM cores.
- * @note If this option is enabled then ALL the libraries linked to the
- * ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
- * -ffixed-@<reg@>.
- * @note This option must be enabled in the Makefile, it is listed here for
- * documentation only.
- */
-#if defined(__DOXYGEN__)
-#define CH_CURRP_REGISTER_CACHE "reg"
-#endif
-
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/
diff --git a/demos/AVR-AT90CANx-GCC/chconf.h b/demos/AVR-AT90CANx-GCC/chconf.h
index 3d5fefb9f..b941ca77d 100644
--- a/demos/AVR-AT90CANx-GCC/chconf.h
+++ b/demos/AVR-AT90CANx-GCC/chconf.h
@@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
-/**
- * @brief Exotic optimization.
- * @details If defined then a CPU register is used as storage for the global
- * @p currp variable. Caching this variable in a register greatly
- * improves both space and time OS efficiency. A side effect is that
- * one less register has to be saved during the context switch
- * resulting in lower RAM usage and faster context switch.
- *
- * @note This option is only usable with the GCC compiler and is only useful
- * on processors with many registers like ARM cores.
- * @note If this option is enabled then ALL the libraries linked to the
- * ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
- * -ffixed-@<reg@>.
- * @note This option must be enabled in the Makefile, it is listed here for
- * documentation only.
- */
-#if defined(__DOXYGEN__)
-#define CH_CURRP_REGISTER_CACHE "reg"
-#endif
-
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/
diff --git a/demos/AVR-ATmega128-GCC/chconf.h b/demos/AVR-ATmega128-GCC/chconf.h
index 3d5fefb9f..b941ca77d 100644
--- a/demos/AVR-ATmega128-GCC/chconf.h
+++ b/demos/AVR-ATmega128-GCC/chconf.h
@@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
-/**
- * @brief Exotic optimization.
- * @details If defined then a CPU register is used as storage for the global
- * @p currp variable. Caching this variable in a register greatly
- * improves both space and time OS efficiency. A side effect is that
- * one less register has to be saved during the context switch
- * resulting in lower RAM usage and faster context switch.
- *
- * @note This option is only usable with the GCC compiler and is only useful
- * on processors with many registers like ARM cores.
- * @note If this option is enabled then ALL the libraries linked to the
- * ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
- * -ffixed-@<reg@>.
- * @note This option must be enabled in the Makefile, it is listed here for
- * documentation only.
- */
-#if defined(__DOXYGEN__)
-#define CH_CURRP_REGISTER_CACHE "reg"
-#endif
-
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/
diff --git a/demos/MSP430-MSP430x1611-GCC/chconf.h b/demos/MSP430-MSP430x1611-GCC/chconf.h
index d0679aa2b..dcddb9a23 100644
--- a/demos/MSP430-MSP430x1611-GCC/chconf.h
+++ b/demos/MSP430-MSP430x1611-GCC/chconf.h
@@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
-/**
- * @brief Exotic optimization.
- * @details If defined then a CPU register is used as storage for the global
- * @p currp variable. Caching this variable in a register greatly
- * improves both space and time OS efficiency. A side effect is that
- * one less register has to be saved during the context switch
- * resulting in lower RAM usage and faster context switch.
- *
- * @note This option is only usable with the GCC compiler and is only useful
- * on processors with many registers like ARM cores.
- * @note If this option is enabled then ALL the libraries linked to the
- * ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
- * -ffixed-@<reg@>.
- * @note This option must be enabled in the Makefile, it is listed here for
- * documentation only.
- */
-#if defined(__DOXYGEN__)
-#define CH_CURRP_REGISTER_CACHE "reg"
-#endif
-
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/
diff --git a/demos/PPC-SPC563-GCC/chconf.h b/demos/PPC-SPC563-GCC/chconf.h
index 14109b635..ccde82347 100644
--- a/demos/PPC-SPC563-GCC/chconf.h
+++ b/demos/PPC-SPC563-GCC/chconf.h
@@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
-/**
- * @brief Exotic optimization.
- * @details If defined then a CPU register is used as storage for the global
- * @p currp variable. Caching this variable in a register greatly
- * improves both space and time OS efficiency. A side effect is that
- * one less register has to be saved during the context switch
- * resulting in lower RAM usage and faster context switch.
- *
- * @note This option is only usable with the GCC compiler and is only useful
- * on processors with many registers like ARM cores.
- * @note If this option is enabled then ALL the libraries linked to the
- * ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
- * -ffixed-@<reg@>.
- * @note This option must be enabled in the Makefile, it is listed here for
- * documentation only.
- */
-#if defined(__DOXYGEN__)
-#define CH_CURRP_REGISTER_CACHE "reg"
-#endif
-
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/
diff --git a/demos/Posix-GCC/chconf.h b/demos/Posix-GCC/chconf.h
index 6c00f9851..cda9cabab 100644
--- a/demos/Posix-GCC/chconf.h
+++ b/demos/Posix-GCC/chconf.h
@@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
-/**
- * @brief Exotic optimization.
- * @details If defined then a CPU register is used as storage for the global
- * @p currp variable. Caching this variable in a register greatly
- * improves both space and time OS efficiency. A side effect is that
- * one less register has to be saved during the context switch
- * resulting in lower RAM usage and faster context switch.
- *
- * @note This option is only usable with the GCC compiler and is only useful
- * on processors with many registers like ARM cores.
- * @note If this option is enabled then ALL the libraries linked to the
- * ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
- * -ffixed-@<reg@>.
- * @note This option must be enabled in the Makefile, it is listed here for
- * documentation only.
- */
-#if defined(__DOXYGEN__)
-#define CH_CURRP_REGISTER_CACHE "reg"
-#endif
-
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/
diff --git a/demos/STM8L-STM8L152-DISCOVERY-STVD/demo/chconf.h b/demos/STM8L-STM8L152-DISCOVERY-STVD/demo/chconf.h
index b76fd0017..3f42e3885 100644
--- a/demos/STM8L-STM8L152-DISCOVERY-STVD/demo/chconf.h
+++ b/demos/STM8L-STM8L152-DISCOVERY-STVD/demo/chconf.h
@@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED FALSE
#endif
-/**
- * @brief Exotic optimization.
- * @details If defined then a CPU register is used as storage for the global
- * @p currp variable. Caching this variable in a register greatly
- * improves both space and time OS efficiency. A side effect is that
- * one less register has to be saved during the context switch
- * resulting in lower RAM usage and faster context switch.
- *
- * @note This option is only usable with the GCC compiler and is only useful
- * on processors with many registers like ARM cores.
- * @note If this option is enabled then ALL the libraries linked to the
- * ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
- * -ffixed-@<reg@>.
- * @note This option must be enabled in the Makefile, it is listed here for
- * documentation only.
- */
-#if defined(__DOXYGEN__)
-#define CH_CURRP_REGISTER_CACHE "reg"
-#endif
-
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/
diff --git a/demos/STM8S-STM8S105-DISCOVERY-STVD/demo/chconf.h b/demos/STM8S-STM8S105-DISCOVERY-STVD/demo/chconf.h
index b76fd0017..3f42e3885 100644
--- a/demos/STM8S-STM8S105-DISCOVERY-STVD/demo/chconf.h
+++ b/demos/STM8S-STM8S105-DISCOVERY-STVD/demo/chconf.h
@@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED FALSE
#endif
-/**
- * @brief Exotic optimization.
- * @details If defined then a CPU register is used as storage for the global
- * @p currp variable. Caching this variable in a register greatly
- * improves both space and time OS efficiency. A side effect is that
- * one less register has to be saved during the context switch
- * resulting in lower RAM usage and faster context switch.
- *
- * @note This option is only usable with the GCC compiler and is only useful
- * on processors with many registers like ARM cores.
- * @note If this option is enabled then ALL the libraries linked to the
- * ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
- * -ffixed-@<reg@>.
- * @note This option must be enabled in the Makefile, it is listed here for
- * documentation only.
- */
-#if defined(__DOXYGEN__)
-#define CH_CURRP_REGISTER_CACHE "reg"
-#endif
-
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/
diff --git a/demos/STM8S-STM8S208-RC/chconf.h b/demos/STM8S-STM8S208-RC/chconf.h
index b76fd0017..3f42e3885 100644
--- a/demos/STM8S-STM8S208-RC/chconf.h
+++ b/demos/STM8S-STM8S208-RC/chconf.h
@@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED FALSE
#endif
-/**
- * @brief Exotic optimization.
- * @details If defined then a CPU register is used as storage for the global
- * @p currp variable. Caching this variable in a register greatly
- * improves both space and time OS efficiency. A side effect is that
- * one less register has to be saved during the context switch
- * resulting in lower RAM usage and faster context switch.
- *
- * @note This option is only usable with the GCC compiler and is only useful
- * on processors with many registers like ARM cores.
- * @note If this option is enabled then ALL the libraries linked to the
- * ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
- * -ffixed-@<reg@>.
- * @note This option must be enabled in the Makefile, it is listed here for
- * documentation only.
- */
-#if defined(__DOXYGEN__)
-#define CH_CURRP_REGISTER_CACHE "reg"
-#endif
-
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/
diff --git a/demos/Win32-MinGW/chconf.h b/demos/Win32-MinGW/chconf.h
index 6c00f9851..cda9cabab 100644
--- a/demos/Win32-MinGW/chconf.h
+++ b/demos/Win32-MinGW/chconf.h
@@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
-/**
- * @brief Exotic optimization.
- * @details If defined then a CPU register is used as storage for the global
- * @p currp variable. Caching this variable in a register greatly
- * improves both space and time OS efficiency. A side effect is that
- * one less register has to be saved during the context switch
- * resulting in lower RAM usage and faster context switch.
- *
- * @note This option is only usable with the GCC compiler and is only useful
- * on processors with many registers like ARM cores.
- * @note If this option is enabled then ALL the libraries linked to the
- * ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
- * -ffixed-@<reg@>.
- * @note This option must be enabled in the Makefile, it is listed here for
- * documentation only.
- */
-#if defined(__DOXYGEN__)
-#define CH_CURRP_REGISTER_CACHE "reg"
-#endif
-
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/
diff --git a/os/kernel/include/chschd.h b/os/kernel/include/chschd.h
index 1cd8e0664..e154da863 100644
--- a/os/kernel/include/chschd.h
+++ b/os/kernel/include/chschd.h
@@ -84,10 +84,8 @@ typedef struct {
#if CH_TIME_QUANTUM > 0
cnt_t r_preempt; /**< @brief Round robin counter. */
#endif
-#ifndef CH_CURRP_REGISTER_CACHE
Thread *r_current; /**< @brief The currently running
thread. */
-#endif
} ReadyList;
#endif /* !defined(PORT_OPTIMIZED_READYLIST_STRUCT) */
@@ -103,11 +101,7 @@ extern ReadyList rlist;
* (currp = something), use @p setcurrp() instead.
*/
#if !defined(PORT_OPTIMIZED_CURRP) || defined(__DOXYGEN__)
-#if !defined(CH_CURRP_REGISTER_CACHE) || defined(__DOXYGEN__)
#define currp rlist.r_current
-#else /* defined(CH_CURRP_REGISTER_CACHE) */
-register Thread *currp asm(CH_CURRP_REGISTER_CACHE);
-#endif /* defined(CH_CURRP_REGISTER_CACHE) */
#endif /* !defined(PORT_OPTIMIZED_CURRP) */
/**
diff --git a/os/kernel/src/chsys.c b/os/kernel/src/chsys.c
index 13a1a53fa..6892ec73a 100644
--- a/os/kernel/src/chsys.c
+++ b/os/kernel/src/chsys.c
@@ -38,7 +38,7 @@
#if !CH_NO_IDLE_THREAD || defined(__DOXYGEN__)
/**
* @brief Idle thread working area.
- * @see IDLE_THREAD_STACK_SIZE
+ * @see PORT_IDLE_THREAD_STACK_SIZE
*/
WORKING_AREA(_idle_thread_wa, PORT_IDLE_THREAD_STACK_SIZE);
diff --git a/os/kernel/templates/chconf.h b/os/kernel/templates/chconf.h
index 14109b635..ccde82347 100644
--- a/os/kernel/templates/chconf.h
+++ b/os/kernel/templates/chconf.h
@@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
-/**
- * @brief Exotic optimization.
- * @details If defined then a CPU register is used as storage for the global
- * @p currp variable. Caching this variable in a register greatly
- * improves both space and time OS efficiency. A side effect is that
- * one less register has to be saved during the context switch
- * resulting in lower RAM usage and faster context switch.
- *
- * @note This option is only usable with the GCC compiler and is only useful
- * on processors with many registers like ARM cores.
- * @note If this option is enabled then ALL the libraries linked to the
- * ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
- * -ffixed-@<reg@>.
- * @note This option must be enabled in the Makefile, it is listed here for
- * documentation only.
- */
-#if defined(__DOXYGEN__)
-#define CH_CURRP_REGISTER_CACHE "reg"
-#endif
-
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/
diff --git a/os/kernel/templates/chcore.h b/os/kernel/templates/chcore.h
index 2c69362b2..5c8236c7b 100644
--- a/os/kernel/templates/chcore.h
+++ b/os/kernel/templates/chcore.h
@@ -47,10 +47,10 @@
* @brief Stack size for the system idle thread.
* @details This size depends on the idle thread implementation, usually
* the idle thread should take no more space than those reserved
- * by @p INT_REQUIRED_STACK.
+ * by @p PORT_INT_REQUIRED_STACK.
*/
#ifndef PORT_IDLE_THREAD_STACK_SIZE
-#define PORT_IDLE_THREAD_STACK_SIZE 0
+#define PORT_IDLE_THREAD_STACK_SIZE 0
#endif
/**
@@ -62,7 +62,7 @@
* @p extctx is known to be zero.
*/
#ifndef PORT_INT_REQUIRED_STACK
-#define PORT_INT_REQUIRED_STACK 0
+#define PORT_INT_REQUIRED_STACK 0
#endif
/*===========================================================================*/
@@ -151,7 +151,7 @@ struct context {
#define THD_WA_SIZE(n) STACK_ALIGN(sizeof(Thread) + \
sizeof(struct intctx) + \
sizeof(struct extctx) + \
- (n) + (INT_REQUIRED_STACK))
+ (n) + (PORT_INT_REQUIRED_STACK))
/**
* @brief Static working area allocation.
diff --git a/os/ports/GCC/ARM/chcore.h b/os/ports/GCC/ARM/chcore.h
index b67fb9c1b..5a36d82c8 100644
--- a/os/ports/GCC/ARM/chcore.h
+++ b/os/ports/GCC/ARM/chcore.h
@@ -155,9 +155,7 @@ struct intctx {
regarm_t r4;
regarm_t r5;
regarm_t r6;
-#ifndef CH_CURRP_REGISTER_CACHE
regarm_t r7;
-#endif
regarm_t r8;
regarm_t r9;
regarm_t r10;
@@ -192,12 +190,12 @@ struct context {
* @brief Stack size for the system idle thread.
* @details This size depends on the idle thread implementation, usually
* the idle thread should take no more space than those reserved
- * by @p INT_REQUIRED_STACK.
+ * by @p PORT_INT_REQUIRED_STACK.
* @note In this port it is set to 4 because the idle thread does have
* a stack frame when compiling without optimizations.
*/
-#ifndef IDLE_THREAD_STACK_SIZE
-#define IDLE_THREAD_STACK_SIZE 4
+#ifndef PORT_IDLE_THREAD_STACK_SIZE
+#define PORT_IDLE_THREAD_STACK_SIZE 4
#endif
/**
@@ -210,8 +208,8 @@ struct context {
* @note In this port 0x10 is a safe value, it can be reduced after careful
* analysis of the generated code.
*/
-#ifndef INT_REQUIRED_STACK
-#define INT_REQUIRED_STACK 0x10
+#ifndef PORT_INT_REQUIRED_STACK
+#define PORT_INT_REQUIRED_STACK 0x10
#endif
/**
@@ -225,7 +223,7 @@ struct context {
#define THD_WA_SIZE(n) STACK_ALIGN(sizeof(Thread) + \
sizeof(struct intctx) + \
sizeof(struct extctx) + \
- (n) + (INT_REQUIRED_STACK))
+ (n) + (PORT_INT_REQUIRED_STACK))
/**
* @brief Static working area allocation.
diff --git a/os/ports/GCC/ARMCMx/old/chcore_v7m.c b/os/ports/GCC/ARMCMx/old/chcore_v7m.c
index bd888cd01..244ff396e 100644
--- a/os/ports/GCC/ARMCMx/old/chcore_v7m.c
+++ b/os/ports/GCC/ARMCMx/old/chcore_v7m.c
@@ -54,7 +54,6 @@ void SysTickVector(void) {
chSysUnlockFromIsr();
}
-#if !defined(CH_CURRP_REGISTER_CACHE)
#define PUSH_CONTEXT(sp, prio) { \
asm volatile ("mrs %0, PSP \n\t" \
"stmdb %0!, {r3-r11,lr}" : \
@@ -67,20 +66,6 @@ void SysTickVector(void) {
"msr BASEPRI, r3 \n\t" \
"bx lr" : "=r" (sp) : "r" (sp)); \
}
-#else /* defined(CH_CURRP_REGISTER_CACHE) */
-#define PUSH_CONTEXT(sp, prio) { \
- asm volatile ("mrs %0, PSP \n\t" \
- "stmdb %0!, {r3-r6,r8-r11, lr}" : \
- "=r" (sp) : "r" (sp), "r" (prio)); \
-}
-
-#define POP_CONTEXT(sp) { \
- asm volatile ("ldmia %0!, {r3-r6,r8-r11, lr} \n\t" \
- "msr PSP, %0 \n\t" \
- "msr BASEPRI, r3 \n\t" \
- "bx lr" : "=r" (sp) : "r" (sp)); \
-}
-#endif /* defined(CH_CURRP_REGISTER_CACHE) */
/**
* @brief SVC vector.
diff --git a/os/ports/GCC/ARMCMx/old/chcore_v7m.h b/os/ports/GCC/ARMCMx/old/chcore_v7m.h
index 93e701202..b94afdca3 100644
--- a/os/ports/GCC/ARMCMx/old/chcore_v7m.h
+++ b/os/ports/GCC/ARMCMx/old/chcore_v7m.h
@@ -96,12 +96,12 @@ struct intctx {
* @brief Stack size for the system idle thread.
* @details This size depends on the idle thread implementation, usually
* the idle thread should take no more space than those reserved
- * by @p INT_REQUIRED_STACK.
+ * by @p PORT_INT_REQUIRED_STACK.
* @note In this port it is set to 4 because the idle thread does have
* a stack frame when compiling without optimizations.
*/
-#ifndef IDLE_THREAD_STACK_SIZE
-#define IDLE_THREAD_STACK_SIZE 4
+#ifndef PORT_IDLE_THREAD_STACK_SIZE
+#define PORT_IDLE_THREAD_STACK_SIZE 4
#endif
/**
@@ -113,8 +113,8 @@ struct intctx {
* @p extctx is known to be zero.
* @note This port requires no extra stack space for interrupt handling.
*/
-#ifndef INT_REQUIRED_STACK
-#define INT_REQUIRED_STACK 0
+#ifndef PORT_INT_REQUIRED_STACK
+#define PORT_INT_REQUIRED_STACK 0
#endif
/**
diff --git a/os/ports/GCC/AVR/chcore.c b/os/ports/GCC/AVR/chcore.c
index 166c0d1b1..7cb0dda07 100644
--- a/os/ports/GCC/AVR/chcore.c
+++ b/os/ports/GCC/AVR/chcore.c
@@ -51,10 +51,8 @@ void port_switch(Thread *ntp, Thread *otp) {
asm volatile ("push r5");
asm volatile ("push r6");
asm volatile ("push r7");
-#ifndef CH_CURRP_REGISTER_CACHE
asm volatile ("push r8");
asm volatile ("push r9");
-#endif
asm volatile ("push r10");
asm volatile ("push r11");
asm volatile ("push r12");
@@ -88,10 +86,8 @@ void port_switch(Thread *ntp, Thread *otp) {
asm volatile ("pop r12");
asm volatile ("pop r11");
asm volatile ("pop r10");
-#ifndef CH_CURRP_REGISTER_CACHE
asm volatile ("pop r9");
asm volatile ("pop r8");
-#endif
asm volatile ("pop r7");
asm volatile ("pop r6");
asm volatile ("pop r5");
diff --git a/os/ports/GCC/AVR/chcore.h b/os/ports/GCC/AVR/chcore.h
index 4377c5047..5e1c4d954 100644
--- a/os/ports/GCC/AVR/chcore.h
+++ b/os/ports/GCC/AVR/chcore.h
@@ -105,10 +105,8 @@ struct intctx {
uint8_t r12;
uint8_t r11;
uint8_t r10;
-#ifndef CH_CURRP_REGISTER_CACHE
uint8_t r9;
uint8_t r8;
-#endif
uint8_t r7;
uint8_t r6;
uint8_t r5;
@@ -149,11 +147,11 @@ struct context {
* @brief Stack size for the system idle thread.
* @details This size depends on the idle thread implementation, usually
* the idle thread should take no more space than those reserved
- * by @p INT_REQUIRED_STACK.
+ * by @p PORT_INT_REQUIRED_STACK.
* @note In this port it is set to 8.
*/
-#ifndef IDLE_THREAD_STACK_SIZE
-#define IDLE_THREAD_STACK_SIZE 8
+#ifndef PORT_IDLE_THREAD_STACK_SIZE
+#define PORT_IDLE_THREAD_STACK_SIZE 8
#endif
/**
@@ -165,8 +163,8 @@ struct context {
* @p extctx is known to be zero.
* @note In this port the default is 32 bytes per thread.
*/
-#ifndef INT_REQUIRED_STACK
-#define INT_REQUIRED_STACK 32
+#ifndef PORT_INT_REQUIRED_STACK
+#define PORT_INT_REQUIRED_STACK 32
#endif
/**
@@ -180,7 +178,7 @@ struct context {
#define THD_WA_SIZE(n) STACK_ALIGN(sizeof(Thread) + \
(sizeof(struct intctx) - 1) + \
(sizeof(struct extctx) - 1) + \
- (n) + (INT_REQUIRED_STACK))
+ (n) + (PORT_INT_REQUIRED_STACK))
/**
* @brief Static working area allocation.
diff --git a/os/ports/GCC/MSP430/chcore.h b/os/ports/GCC/MSP430/chcore.h
index 5cb88ab3d..f70a34438 100644
--- a/os/ports/GCC/MSP430/chcore.h
+++ b/os/ports/GCC/MSP430/chcore.h
@@ -122,10 +122,10 @@ struct context {
* @brief Stack size for the system idle thread.
* @details This size depends on the idle thread implementation, usually
* the idle thread should take no more space than those reserved
- * by @p INT_REQUIRED_STACK.
+ * by @p PORT_INT_REQUIRED_STACK.
*/
-#ifndef IDLE_THREAD_STACK_SIZE
-#define IDLE_THREAD_STACK_SIZE 0
+#ifndef PORT_IDLE_THREAD_STACK_SIZE
+#define PORT_IDLE_THREAD_STACK_SIZE 0
#endif
/**
@@ -137,8 +137,8 @@ struct context {
* @p extctx is known to be zero.
* @note In this port the default is 32 bytes per thread.
*/
-#ifndef INT_REQUIRED_STACK
-#define INT_REQUIRED_STACK 32
+#ifndef PORT_INT_REQUIRED_STACK
+#define PORT_INT_REQUIRED_STACK 32
#endif
/**
@@ -152,7 +152,7 @@ struct context {
#define THD_WA_SIZE(n) STACK_ALIGN(sizeof(Thread) + \
sizeof(struct intctx) + \
sizeof(struct extctx) + \
- (n) + (INT_REQUIRED_STACK))
+ (n) + (PORT_INT_REQUIRED_STACK))
/**
* @brief Static working area allocation.
diff --git a/os/ports/GCC/PPC/chcore.h b/os/ports/GCC/PPC/chcore.h
index 058379923..30e5f717c 100644
--- a/os/ports/GCC/PPC/chcore.h
+++ b/os/ports/GCC/PPC/chcore.h
@@ -185,10 +185,10 @@ struct context {
* @brief Stack size for the system idle thread.
* @details This size depends on the idle thread implementation, usually
* the idle thread should take no more space than those reserved
- * by @p INT_REQUIRED_STACK.
+ * by @p PORT_INT_REQUIRED_STACK.
*/
-#ifndef IDLE_THREAD_STACK_SIZE
-#define IDLE_THREAD_STACK_SIZE 0
+#ifndef PORT_IDLE_THREAD_STACK_SIZE
+#define PORT_IDLE_THREAD_STACK_SIZE 0
#endif
/**
@@ -199,8 +199,8 @@ struct context {
* separate interrupt stack and the stack space between @p intctx and
* @p extctx is known to be zero.
*/
-#ifndef INT_REQUIRED_STACK
-#define INT_REQUIRED_STACK 128
+#ifndef PORT_INT_REQUIRED_STACK
+#define PORT_INT_REQUIRED_STACK 128
#endif
/**
@@ -214,7 +214,7 @@ struct context {
#define THD_WA_SIZE(n) STACK_ALIGN(sizeof(Thread) + \
sizeof(struct intctx) + \
sizeof(struct extctx) + \
- (n) + (INT_REQUIRED_STACK))
+ (n) + (PORT_INT_REQUIRED_STACK))
/**
* @brief Static working area allocation.
diff --git a/os/ports/GCC/SIMIA32/chcore.h b/os/ports/GCC/SIMIA32/chcore.h
index 266cfd955..05dc05db4 100644
--- a/os/ports/GCC/SIMIA32/chcore.h
+++ b/os/ports/GCC/SIMIA32/chcore.h
@@ -108,8 +108,8 @@ struct context {
/**
* Stack size for the system idle thread.
*/
-#ifndef IDLE_THREAD_STACK_SIZE
-#define IDLE_THREAD_STACK_SIZE 256
+#ifndef PORT_IDLE_THREAD_STACK_SIZE
+#define PORT_IDLE_THREAD_STACK_SIZE 256
#endif
/**
@@ -118,8 +118,8 @@ struct context {
* It requires stack space because the simulated "interrupt handlers" can
* invoke host library functions inside so it better have a lot of space.
*/
-#ifndef INT_REQUIRED_STACK
-#define INT_REQUIRED_STACK 16384
+#ifndef PORT_INT_REQUIRED_STACK
+#define PORT_INT_REQUIRED_STACK 16384
#endif
/**
@@ -134,7 +134,7 @@ struct context {
sizeof(void *) * 4 + \
sizeof(struct intctx) + \
sizeof(struct extctx) + \
- (n) + (INT_REQUIRED_STACK))
+ (n) + (PORT_INT_REQUIRED_STACK))
/**
* Macro used to allocate a thread working area aligned as both position and
diff --git a/os/ports/IAR/ARMCMx/chcore.h b/os/ports/IAR/ARMCMx/chcore.h
index 3854de61e..9c6a63730 100644
--- a/os/ports/IAR/ARMCMx/chcore.h
+++ b/os/ports/IAR/ARMCMx/chcore.h
@@ -302,7 +302,7 @@ struct context {
#define THD_WA_SIZE(n) STACK_ALIGN(sizeof(Thread) + \
sizeof(struct intctx) + \
sizeof(struct extctx) + \
- (n) + (INT_REQUIRED_STACK))
+ (n) + (PORT_INT_REQUIRED_STACK))
/**
* @brief Static working area allocation.
diff --git a/os/ports/IAR/ARMCMx/chcore_v6m.h b/os/ports/IAR/ARMCMx/chcore_v6m.h
index a2d5ef577..41b656532 100644
--- a/os/ports/IAR/ARMCMx/chcore_v6m.h
+++ b/os/ports/IAR/ARMCMx/chcore_v6m.h
@@ -76,13 +76,13 @@ struct intctx {
* @brief Stack size for the system idle thread.
* @details This size depends on the idle thread implementation, usually
* the idle thread should take no more space than those reserved
- * by @p INT_REQUIRED_STACK.
+ * by @p PORT_INT_REQUIRED_STACK.
* @note In this port it is set to 8 because the idle thread does have
* a stack frame when compiling without optimizations. You may
* reduce this value to zero when compiling with optimizations.
*/
-#ifndef IDLE_THREAD_STACK_SIZE
-#define IDLE_THREAD_STACK_SIZE 16
+#ifndef PORT_IDLE_THREAD_STACK_SIZE
+#define PORT_IDLE_THREAD_STACK_SIZE 16
#endif
/**
@@ -96,8 +96,8 @@ struct intctx {
* @p chSchDoRescheduleI() can have a stack frame, expecially with
* compiler optimizations disabled.
*/
-#ifndef INT_REQUIRED_STACK
-#define INT_REQUIRED_STACK 16
+#ifndef PORT_INT_REQUIRED_STACK
+#define PORT_INT_REQUIRED_STACK 16
#endif
/**
diff --git a/os/ports/IAR/ARMCMx/chcore_v7m.h b/os/ports/IAR/ARMCMx/chcore_v7m.h
index 9c5d700ee..31be9a04a 100644
--- a/os/ports/IAR/ARMCMx/chcore_v7m.h
+++ b/os/ports/IAR/ARMCMx/chcore_v7m.h
@@ -49,9 +49,7 @@ struct intctx {
regarm_t r4;
regarm_t r5;
regarm_t r6;
-#ifndef CH_CURRP_REGISTER_CACHE
regarm_t r7;
-#endif
regarm_t r8;
regarm_t r9;
regarm_t r10;
@@ -78,13 +76,13 @@ struct intctx {
* @brief Stack size for the system idle thread.
* @details This size depends on the idle thread implementation, usually
* the idle thread should take no more space than those reserved
- * by @p INT_REQUIRED_STACK.
- * @note In this port it is set to 8 because the idle thread does have
+ * by @p PORT_INT_REQUIRED_STACK.
+ * @note In this port it is set to 16 because the idle thread does have
* a stack frame when compiling without optimizations. You may
* reduce this value to zero when compiling with optimizations.
*/
-#ifndef IDLE_THREAD_STACK_SIZE
-#define IDLE_THREAD_STACK_SIZE 8
+#ifndef PORT_IDLE_THREAD_STACK_SIZE
+#define PORT_IDLE_THREAD_STACK_SIZE 16
#endif
/**
@@ -98,8 +96,8 @@ struct intctx {
* @p chSchDoRescheduleI() can have a stack frame, expecially with
* compiler optimizations disabled.
*/
-#ifndef INT_REQUIRED_STACK
-#define INT_REQUIRED_STACK 16
+#ifndef PORT_INT_REQUIRED_STACK
+#define PORT_INT_REQUIRED_STACK 16
#endif
/**
diff --git a/os/ports/RC/STM8/chcore.h b/os/ports/RC/STM8/chcore.h
index ed10b564e..4de8bea54 100644
--- a/os/ports/RC/STM8/chcore.h
+++ b/os/ports/RC/STM8/chcore.h
@@ -147,10 +147,10 @@ struct stm8_startctx {
* @brief Stack size for the system idle thread.
* @details This size depends on the idle thread implementation, usually
* the idle thread should take no more space than those reserved
- * by @p INT_REQUIRED_STACK.
+ * by @p PORT_INT_REQUIRED_STACK.
*/
-#ifndef IDLE_THREAD_STACK_SIZE
-#define IDLE_THREAD_STACK_SIZE 0
+#ifndef PORT_IDLE_THREAD_STACK_SIZE
+#define PORT_IDLE_THREAD_STACK_SIZE 0
#endif
/**
@@ -158,8 +158,8 @@ struct stm8_startctx {
* @details This is a safe value, you may trim it down after reading the
* right size in the map file.
*/
-#ifndef INT_REQUIRED_STACK
-#define INT_REQUIRED_STACK 48
+#ifndef PORT_INT_REQUIRED_STACK
+#define PORT_INT_REQUIRED_STACK 48
#endif
/**
@@ -173,7 +173,7 @@ struct stm8_startctx {
#define THD_WA_SIZE(n) STACK_ALIGN(sizeof(Thread) + \
(sizeof(struct intctx) - 1) + \
(sizeof(struct extctx) - 1) + \
- (n) + (INT_REQUIRED_STACK))
+ (n) + (PORT_INT_REQUIRED_STACK))
/**
* @brief Static working area allocation.
diff --git a/os/ports/RVCT/ARMCMx/chcore.h b/os/ports/RVCT/ARMCMx/chcore.h
index aa8fe2483..767f71923 100644
--- a/os/ports/RVCT/ARMCMx/chcore.h
+++ b/os/ports/RVCT/ARMCMx/chcore.h
@@ -305,7 +305,7 @@ struct context {
#define THD_WA_SIZE(n) STACK_ALIGN(sizeof(Thread) + \
sizeof(struct intctx) + \
sizeof(struct extctx) + \
- (n) + (INT_REQUIRED_STACK))
+ (n) + (PORT_INT_REQUIRED_STACK))
/**
* @brief Static working area allocation.
diff --git a/os/ports/RVCT/ARMCMx/chcore_v6m.h b/os/ports/RVCT/ARMCMx/chcore_v6m.h
index 9c5e35b33..1c4af7da9 100644
--- a/os/ports/RVCT/ARMCMx/chcore_v6m.h
+++ b/os/ports/RVCT/ARMCMx/chcore_v6m.h
@@ -76,13 +76,13 @@ struct intctx {
* @brief Stack size for the system idle thread.
* @details This size depends on the idle thread implementation, usually
* the idle thread should take no more space than those reserved
- * by @p INT_REQUIRED_STACK.
+ * by @p PORT_INT_REQUIRED_STACK.
* @note In this port it is set to 8 because the idle thread does have
* a stack frame when compiling without optimizations. You may
* reduce this value to zero when compiling with optimizations.
*/
-#ifndef IDLE_THREAD_STACK_SIZE
-#define IDLE_THREAD_STACK_SIZE 16
+#ifndef PORT_IDLE_THREAD_STACK_SIZE
+#define PORT_IDLE_THREAD_STACK_SIZE 16
#endif
/**
@@ -96,8 +96,8 @@ struct intctx {
* @p chSchDoRescheduleI() can have a stack frame, expecially with
* compiler optimizations disabled.
*/
-#ifndef INT_REQUIRED_STACK
-#define INT_REQUIRED_STACK 16
+#ifndef PORT_INT_REQUIRED_STACK
+#define PORT_INT_REQUIRED_STACK 16
#endif
/**
diff --git a/os/ports/RVCT/ARMCMx/chcore_v7m.h b/os/ports/RVCT/ARMCMx/chcore_v7m.h
index 3a4cbe381..7f7d8c5be 100644
--- a/os/ports/RVCT/ARMCMx/chcore_v7m.h
+++ b/os/ports/RVCT/ARMCMx/chcore_v7m.h
@@ -49,9 +49,7 @@ struct intctx {
regarm_t r4;
regarm_t r5;
regarm_t r6;
-#ifndef CH_CURRP_REGISTER_CACHE
regarm_t r7;
-#endif
regarm_t r8;
regarm_t r9;
regarm_t r10;
@@ -78,13 +76,13 @@ struct intctx {
* @brief Stack size for the system idle thread.
* @details This size depends on the idle thread implementation, usually
* the idle thread should take no more space than those reserved
- * by @p INT_REQUIRED_STACK.
- * @note In this port it is set to 8 because the idle thread does have
+ * by @p PORT_INT_REQUIRED_STACK.
+ * @note In this port it is set to 16 because the idle thread does have
* a stack frame when compiling without optimizations. You may
* reduce this value to zero when compiling with optimizations.
*/
-#ifndef IDLE_THREAD_STACK_SIZE
-#define IDLE_THREAD_STACK_SIZE 8
+#ifndef PORT_IDLE_THREAD_STACK_SIZE
+#define PORT_IDLE_THREAD_STACK_SIZE 16
#endif
/**
@@ -98,8 +96,8 @@ struct intctx {
* @p chSchDoRescheduleI() can have a stack frame, expecially with
* compiler optimizations disabled.
*/
-#ifndef INT_REQUIRED_STACK
-#define INT_REQUIRED_STACK 16
+#ifndef PORT_INT_REQUIRED_STACK
+#define PORT_INT_REQUIRED_STACK 16
#endif
/**
diff --git a/os/ports/cosmic/STM8/chcore.h b/os/ports/cosmic/STM8/chcore.h
index 615116736..e154b8914 100644
--- a/os/ports/cosmic/STM8/chcore.h
+++ b/os/ports/cosmic/STM8/chcore.h
@@ -145,10 +145,10 @@ struct stm8_startctx {
* @brief Stack size for the system idle thread.
* @details This size depends on the idle thread implementation, usually
* the idle thread should take no more space than those reserved
- * by @p INT_REQUIRED_STACK.
+ * by @p PORT_INT_REQUIRED_STACK.
*/
-#ifndef IDLE_THREAD_STACK_SIZE
-#define IDLE_THREAD_STACK_SIZE 0
+#ifndef PORT_IDLE_THREAD_STACK_SIZE
+#define PORT_IDLE_THREAD_STACK_SIZE 0
#endif
/**
@@ -156,8 +156,8 @@ struct stm8_startctx {
* @details This is a safe value, you may trim it down after reading the
* right size in the map file.
*/
-#ifndef INT_REQUIRED_STACK
-#define INT_REQUIRED_STACK 48
+#ifndef PORT_INT_REQUIRED_STACK
+#define PORT_INT_REQUIRED_STACK 48
#endif
/**
@@ -171,7 +171,7 @@ struct stm8_startctx {
#define THD_WA_SIZE(n) STACK_ALIGN(sizeof(Thread) + \
(sizeof(struct intctx) - 1) + \
(sizeof(struct extctx) - 1) + \
- (n) + (INT_REQUIRED_STACK))
+ (n) + (PORT_INT_REQUIRED_STACK))
/**
* @brief Static working area allocation.
diff --git a/test/coverage/chconf.h b/test/coverage/chconf.h
index 1810540d5..f1cce630a 100644
--- a/test/coverage/chconf.h
+++ b/test/coverage/chconf.h
@@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED FALSE
#endif
-/**
- * @brief Exotic optimization.
- * @details If defined then a CPU register is used as storage for the global
- * @p currp variable. Caching this variable in a register greatly
- * improves both space and time OS efficiency. A side effect is that
- * one less register has to be saved during the context switch
- * resulting in lower RAM usage and faster context switch.
- *
- * @note This option is only usable with the GCC compiler and is only useful
- * on processors with many registers like ARM cores.
- * @note If this option is enabled then ALL the libraries linked to the
- * ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
- * -ffixed-@<reg@>.
- * @note This option must be enabled in the Makefile, it is listed here for
- * documentation only.
- */
-#if defined(__DOXYGEN__)
-#define CH_CURRP_REGISTER_CACHE "reg"
-#endif
-
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/
diff --git a/testhal/LPC11xx/IRQ_STORM/chconf.h b/testhal/LPC11xx/IRQ_STORM/chconf.h
index 14109b635..ccde82347 100644
--- a/testhal/LPC11xx/IRQ_STORM/chconf.h
+++ b/testhal/LPC11xx/IRQ_STORM/chconf.h
@@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
-/**
- * @brief Exotic optimization.
- * @details If defined then a CPU register is used as storage for the global
- * @p currp variable. Caching this variable in a register greatly
- * improves both space and time OS efficiency. A side effect is that
- * one less register has to be saved during the context switch
- * resulting in lower RAM usage and faster context switch.
- *
- * @note This option is only usable with the GCC compiler and is only useful
- * on processors with many registers like ARM cores.
- * @note If this option is enabled then ALL the libraries linked to the
- * ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
- * -ffixed-@<reg@>.
- * @note This option must be enabled in the Makefile, it is listed here for
- * documentation only.
- */
-#if defined(__DOXYGEN__)
-#define CH_CURRP_REGISTER_CACHE "reg"
-#endif
-
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/
diff --git a/testhal/LPC13xx/IRQ_STORM/chconf.h b/testhal/LPC13xx/IRQ_STORM/chconf.h
index 14109b635..ccde82347 100644
--- a/testhal/LPC13xx/IRQ_STORM/chconf.h
+++ b/testhal/LPC13xx/IRQ_STORM/chconf.h
@@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
-/**
- * @brief Exotic optimization.
- * @details If defined then a CPU register is used as storage for the global
- * @p currp variable. Caching this variable in a register greatly
- * improves both space and time OS efficiency. A side effect is that
- * one less register has to be saved during the context switch
- * resulting in lower RAM usage and faster context switch.
- *
- * @note This option is only usable with the GCC compiler and is only useful
- * on processors with many registers like ARM cores.
- * @note If this option is enabled then ALL the libraries linked to the
- * ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
- * -ffixed-@<reg@>.
- * @note This option must be enabled in the Makefile, it is listed here for
- * documentation only.
- */
-#if defined(__DOXYGEN__)
-#define CH_CURRP_REGISTER_CACHE "reg"
-#endif
-
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/
diff --git a/testhal/STM32/ADC/chconf.h b/testhal/STM32/ADC/chconf.h
index 14109b635..ccde82347 100644
--- a/testhal/STM32/ADC/chconf.h
+++ b/testhal/STM32/ADC/chconf.h
@@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
-/**
- * @brief Exotic optimization.
- * @details If defined then a CPU register is used as storage for the global
- * @p currp variable. Caching this variable in a register greatly
- * improves both space and time OS efficiency. A side effect is that
- * one less register has to be saved during the context switch
- * resulting in lower RAM usage and faster context switch.
- *
- * @note This option is only usable with the GCC compiler and is only useful
- * on processors with many registers like ARM cores.
- * @note If this option is enabled then ALL the libraries linked to the
- * ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
- * -ffixed-@<reg@>.
- * @note This option must be enabled in the Makefile, it is listed here for
- * documentation only.
- */
-#if defined(__DOXYGEN__)
-#define CH_CURRP_REGISTER_CACHE "reg"
-#endif
-
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/
diff --git a/testhal/STM32/CAN/chconf.h b/testhal/STM32/CAN/chconf.h
index 14109b635..ccde82347 100644
--- a/testhal/STM32/CAN/chconf.h
+++ b/testhal/STM32/CAN/chconf.h
@@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
-/**
- * @brief Exotic optimization.
- * @details If defined then a CPU register is used as storage for the global
- * @p currp variable. Caching this variable in a register greatly
- * improves both space and time OS efficiency. A side effect is that
- * one less register has to be saved during the context switch
- * resulting in lower RAM usage and faster context switch.
- *
- * @note This option is only usable with the GCC compiler and is only useful
- * on processors with many registers like ARM cores.
- * @note If this option is enabled then ALL the libraries linked to the
- * ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
- * -ffixed-@<reg@>.
- * @note This option must be enabled in the Makefile, it is listed here for
- * documentation only.
- */
-#if defined(__DOXYGEN__)
-#define CH_CURRP_REGISTER_CACHE "reg"
-#endif
-
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/
diff --git a/testhal/STM32/GPT/chconf.h b/testhal/STM32/GPT/chconf.h
index 14109b635..ccde82347 100644
--- a/testhal/STM32/GPT/chconf.h
+++ b/testhal/STM32/GPT/chconf.h
@@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
-/**
- * @brief Exotic optimization.
- * @details If defined then a CPU register is used as storage for the global
- * @p currp variable. Caching this variable in a register greatly
- * improves both space and time OS efficiency. A side effect is that
- * one less register has to be saved during the context switch
- * resulting in lower RAM usage and faster context switch.
- *
- * @note This option is only usable with the GCC compiler and is only useful
- * on processors with many registers like ARM cores.
- * @note If this option is enabled then ALL the libraries linked to the
- * ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
- * -ffixed-@<reg@>.
- * @note This option must be enabled in the Makefile, it is listed here for
- * documentation only.
- */
-#if defined(__DOXYGEN__)
-#define CH_CURRP_REGISTER_CACHE "reg"
-#endif
-
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/
diff --git a/testhal/STM32/IRQ_STORM/chconf.h b/testhal/STM32/IRQ_STORM/chconf.h
index 14109b635..ccde82347 100644
--- a/testhal/STM32/IRQ_STORM/chconf.h
+++ b/testhal/STM32/IRQ_STORM/chconf.h
@@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
-/**
- * @brief Exotic optimization.
- * @details If defined then a CPU register is used as storage for the global
- * @p currp variable. Caching this variable in a register greatly
- * improves both space and time OS efficiency. A side effect is that
- * one less register has to be saved during the context switch
- * resulting in lower RAM usage and faster context switch.
- *
- * @note This option is only usable with the GCC compiler and is only useful
- * on processors with many registers like ARM cores.
- * @note If this option is enabled then ALL the libraries linked to the
- * ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
- * -ffixed-@<reg@>.
- * @note This option must be enabled in the Makefile, it is listed here for
- * documentation only.
- */
-#if defined(__DOXYGEN__)
-#define CH_CURRP_REGISTER_CACHE "reg"
-#endif
-
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/
diff --git a/testhal/STM32/PWM-ICU/chconf.h b/testhal/STM32/PWM-ICU/chconf.h
index 14109b635..ccde82347 100644
--- a/testhal/STM32/PWM-ICU/chconf.h
+++ b/testhal/STM32/PWM-ICU/chconf.h
@@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
-/**
- * @brief Exotic optimization.
- * @details If defined then a CPU register is used as storage for the global
- * @p currp variable. Caching this variable in a register greatly
- * improves both space and time OS efficiency. A side effect is that
- * one less register has to be saved during the context switch
- * resulting in lower RAM usage and faster context switch.
- *
- * @note This option is only usable with the GCC compiler and is only useful
- * on processors with many registers like ARM cores.
- * @note If this option is enabled then ALL the libraries linked to the
- * ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
- * -ffixed-@<reg@>.
- * @note This option must be enabled in the Makefile, it is listed here for
- * documentation only.
- */
-#if defined(__DOXYGEN__)
-#define CH_CURRP_REGISTER_CACHE "reg"
-#endif
-
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/
diff --git a/testhal/STM32/SDIO/chconf.h b/testhal/STM32/SDIO/chconf.h
index 14109b635..ccde82347 100644
--- a/testhal/STM32/SDIO/chconf.h
+++ b/testhal/STM32/SDIO/chconf.h
@@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
-/**
- * @brief Exotic optimization.
- * @details If defined then a CPU register is used as storage for the global
- * @p currp variable. Caching this variable in a register greatly
- * improves both space and time OS efficiency. A side effect is that
- * one less register has to be saved during the context switch
- * resulting in lower RAM usage and faster context switch.
- *
- * @note This option is only usable with the GCC compiler and is only useful
- * on processors with many registers like ARM cores.
- * @note If this option is enabled then ALL the libraries linked to the
- * ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
- * -ffixed-@<reg@>.
- * @note This option must be enabled in the Makefile, it is listed here for
- * documentation only.
- */
-#if defined(__DOXYGEN__)
-#define CH_CURRP_REGISTER_CACHE "reg"
-#endif
-
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/
diff --git a/testhal/STM32/SPI/chconf.h b/testhal/STM32/SPI/chconf.h
index 14109b635..ccde82347 100644
--- a/testhal/STM32/SPI/chconf.h
+++ b/testhal/STM32/SPI/chconf.h
@@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
-/**
- * @brief Exotic optimization.
- * @details If defined then a CPU register is used as storage for the global
- * @p currp variable. Caching this variable in a register greatly
- * improves both space and time OS efficiency. A side effect is that
- * one less register has to be saved during the context switch
- * resulting in lower RAM usage and faster context switch.
- *
- * @note This option is only usable with the GCC compiler and is only useful
- * on processors with many registers like ARM cores.
- * @note If this option is enabled then ALL the libraries linked to the
- * ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
- * -ffixed-@<reg@>.
- * @note This option must be enabled in the Makefile, it is listed here for
- * documentation only.
- */
-#if defined(__DOXYGEN__)
-#define CH_CURRP_REGISTER_CACHE "reg"
-#endif
-
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/
diff --git a/testhal/STM32/UART/chconf.h b/testhal/STM32/UART/chconf.h
index 14109b635..ccde82347 100644
--- a/testhal/STM32/UART/chconf.h
+++ b/testhal/STM32/UART/chconf.h
@@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
-/**
- * @brief Exotic optimization.
- * @details If defined then a CPU register is used as storage for the global
- * @p currp variable. Caching this variable in a register greatly
- * improves both space and time OS efficiency. A side effect is that
- * one less register has to be saved during the context switch
- * resulting in lower RAM usage and faster context switch.
- *
- * @note This option is only usable with the GCC compiler and is only useful
- * on processors with many registers like ARM cores.
- * @note If this option is enabled then ALL the libraries linked to the
- * ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
- * -ffixed-@<reg@>.
- * @note This option must be enabled in the Makefile, it is listed here for
- * documentation only.
- */
-#if defined(__DOXYGEN__)
-#define CH_CURRP_REGISTER_CACHE "reg"
-#endif
-
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/
diff --git a/testhal/STM32/USB_CDC/chconf.h b/testhal/STM32/USB_CDC/chconf.h
index 14109b635..ccde82347 100644
--- a/testhal/STM32/USB_CDC/chconf.h
+++ b/testhal/STM32/USB_CDC/chconf.h
@@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
-/**
- * @brief Exotic optimization.
- * @details If defined then a CPU register is used as storage for the global
- * @p currp variable. Caching this variable in a register greatly
- * improves both space and time OS efficiency. A side effect is that
- * one less register has to be saved during the context switch
- * resulting in lower RAM usage and faster context switch.
- *
- * @note This option is only usable with the GCC compiler and is only useful
- * on processors with many registers like ARM cores.
- * @note If this option is enabled then ALL the libraries linked to the
- * ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
- * -ffixed-@<reg@>.
- * @note This option must be enabled in the Makefile, it is listed here for
- * documentation only.
- */
-#if defined(__DOXYGEN__)
-#define CH_CURRP_REGISTER_CACHE "reg"
-#endif
-
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/
diff --git a/testhal/STM32/USB_MSC/chconf.h b/testhal/STM32/USB_MSC/chconf.h
index 14109b635..ccde82347 100644
--- a/testhal/STM32/USB_MSC/chconf.h
+++ b/testhal/STM32/USB_MSC/chconf.h
@@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
-/**
- * @brief Exotic optimization.
- * @details If defined then a CPU register is used as storage for the global
- * @p currp variable. Caching this variable in a register greatly
- * improves both space and time OS efficiency. A side effect is that
- * one less register has to be saved during the context switch
- * resulting in lower RAM usage and faster context switch.
- *
- * @note This option is only usable with the GCC compiler and is only useful
- * on processors with many registers like ARM cores.
- * @note If this option is enabled then ALL the libraries linked to the
- * ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
- * -ffixed-@<reg@>.
- * @note This option must be enabled in the Makefile, it is listed here for
- * documentation only.
- */
-#if defined(__DOXYGEN__)
-#define CH_CURRP_REGISTER_CACHE "reg"
-#endif
-
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/
diff --git a/testhal/STM8S/SPI/demo/chconf.h b/testhal/STM8S/SPI/demo/chconf.h
index b76fd0017..3f42e3885 100644
--- a/testhal/STM8S/SPI/demo/chconf.h
+++ b/testhal/STM8S/SPI/demo/chconf.h
@@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED FALSE
#endif
-/**
- * @brief Exotic optimization.
- * @details If defined then a CPU register is used as storage for the global
- * @p currp variable. Caching this variable in a register greatly
- * improves both space and time OS efficiency. A side effect is that
- * one less register has to be saved during the context switch
- * resulting in lower RAM usage and faster context switch.
- *
- * @note This option is only usable with the GCC compiler and is only useful
- * on processors with many registers like ARM cores.
- * @note If this option is enabled then ALL the libraries linked to the
- * ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
- * -ffixed-@<reg@>.
- * @note This option must be enabled in the Makefile, it is listed here for
- * documentation only.
- */
-#if defined(__DOXYGEN__)
-#define CH_CURRP_REGISTER_CACHE "reg"
-#endif
-
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/