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-rw-r--r--boards/OLIMEX_AVR_CAN/board.c6
-rw-r--r--boards/OLIMEX_AVR_MT_128/board.c6
-rw-r--r--os/hal/platforms/AVR/pal_lld.c10
-rw-r--r--os/hal/platforms/AVR/pal_lld.h34
-rw-r--r--os/hal/platforms/AVR/platform.dox47
5 files changed, 93 insertions, 10 deletions
diff --git a/boards/OLIMEX_AVR_CAN/board.c b/boards/OLIMEX_AVR_CAN/board.c
index 4e808d501..e22d72d48 100644
--- a/boards/OLIMEX_AVR_CAN/board.c
+++ b/boards/OLIMEX_AVR_CAN/board.c
@@ -44,6 +44,12 @@ const PALConfig pal_default_config =
#if defined(PORTE)
{VAL_PORTE, VAL_DDRE},
#endif
+#if defined(PORTF)
+ {VAL_PORTF, VAL_DDRF},
+#endif
+#if defined(PORTG)
+ {VAL_PORTG, VAL_DDRG},
+#endif
};
#endif /* HAL_USE_PAL */
diff --git a/boards/OLIMEX_AVR_MT_128/board.c b/boards/OLIMEX_AVR_MT_128/board.c
index 90b0f7306..c3f97cfff 100644
--- a/boards/OLIMEX_AVR_MT_128/board.c
+++ b/boards/OLIMEX_AVR_MT_128/board.c
@@ -44,6 +44,12 @@ const PALConfig pal_default_config =
#if defined(PORTE)
{VAL_PORTE, VAL_DDRE},
#endif
+#if defined(PORTF)
+ {VAL_PORTF, VAL_DDRF},
+#endif
+#if defined(PORTG)
+ {VAL_PORTG, VAL_DDRG},
+#endif
};
#endif /* HAL_USE_PAL */
diff --git a/os/hal/platforms/AVR/pal_lld.c b/os/hal/platforms/AVR/pal_lld.c
index 2f3174934..0676047ac 100644
--- a/os/hal/platforms/AVR/pal_lld.c
+++ b/os/hal/platforms/AVR/pal_lld.c
@@ -85,6 +85,16 @@ void _pal_lld_init(const PALConfig *config) {
PORTE = config->porte.out;
DDRE = config->porte.dir;
#endif
+
+#if defined(PORTF) || defined(__DOXYGEN__)
+ PORTF = config->portf.out;
+ DDRF = config->portf.dir;
+#endif
+
+#if defined(PORTG) || defined(__DOXYGEN__)
+ PORTG = config->portg.out;
+ DDRG = config->portg.dir;
+#endif
}
/**
diff --git a/os/hal/platforms/AVR/pal_lld.h b/os/hal/platforms/AVR/pal_lld.h
index a2d1f8714..fe64029d0 100644
--- a/os/hal/platforms/AVR/pal_lld.h
+++ b/os/hal/platforms/AVR/pal_lld.h
@@ -43,24 +43,30 @@
/*===========================================================================*/
/**
- * @brief Width, in bits, of an I/O port.
+ * @brief Width, in bits, of an I/O port.
*/
#define PAL_IOPORTS_WIDTH 8
/**
- * @brief Whole port mask.
- * @brief This macro specifies all the valid bits into a port.
+ * @brief Whole port mask.
+ * @details This macro specifies all the valid bits into a port.
*/
#define PAL_WHOLE_PORT ((ioportmask_t)0xFF)
/**
- * @brief AVR setup registers.
+ * @brief AVR setup registers.
*/
typedef struct {
uint8_t out;
uint8_t dir;
} avr_gpio_setup_t;
+/**
+ * @brief AVR registers block.
+ * @note On some devices registers do not follow this layout on some
+ * ports, the ports with abnormal layout cannot be used through
+ * the PAL driver. Example: PORT F on Mega128.
+ */
typedef struct {
volatile uint8_t in;
volatile uint8_t dir;
@@ -90,6 +96,12 @@ typedef struct {
#if defined(PORTE) || defined(__DOXYGEN__)
avr_gpio_setup_t porte;
#endif
+#if defined(PORTF) || defined(__DOXYGEN__)
+ avr_gpio_setup_t portf;
+#endif
+#if defined(PORTG) || defined(__DOXYGEN__)
+ avr_gpio_setup_t portg;
+#endif
} PALConfig;
/**
@@ -149,6 +161,20 @@ typedef avr_gpio_registers_t *ioportid_t;
#define IOPORT5 ((volatile avr_gpio_registers_t *)&PINE)
#endif
+#if defined(PORTF) || defined(__DOXYGEN__)
+/**
+ * @brief GPIO port F identifier.
+ */
+#define IOPORT6 ((volatile avr_gpio_registers_t *)&PINF)
+#endif
+
+#if defined(PORTG) || defined(__DOXYGEN__)
+/**
+ * @brief GPIO port G identifier.
+ */
+#define IOPORT7 ((volatile avr_gpio_registers_t *)&PING)
+#endif
+
/*===========================================================================*/
/* Implementation, some of the following macros could be implemented as */
/* functions, if so please put them in pal_lld.c. */
diff --git a/os/hal/platforms/AVR/platform.dox b/os/hal/platforms/AVR/platform.dox
index 2ac2256b9..a004113b0 100644
--- a/os/hal/platforms/AVR/platform.dox
+++ b/os/hal/platforms/AVR/platform.dox
@@ -37,14 +37,49 @@
/**
* @defgroup AVR_PAL AVR PAL Support
- * @details The AVR PAL driver uses the GPIO peripherals.
+ * @details The AVR PAL driver uses the PORT peripherals.
*
* @section avr_pal_1 Supported HW resources
- * - GPIOA.
- * - GPIOB.
- * - GPIOC.
- * - GPIOD.
- * - GPIOE.
+ * - PORTA.
+ * - PORTB.
+ * - PORTC.
+ * - PORTD.
+ * - PORTE.
+ * - PORTF.
+ * - PORTG.
+ * .
+ * @section avr_pal_2 AVR PAL driver implementation features
+ * The AVR PAL driver implementation fully supports the following hardware
+ * capabilities:
+ * - 8 bits wide ports.
+ * - Atomic set/reset functions.
+ * - Output latched regardless of the pad setting.
+ * - Direct read of input pads regardless of the pad setting.
+ * .
+ * @section avr_pal_3 Supported PAL setup modes
+ * The AVR PAL driver supports the following I/O modes:
+ * - @p PAL_MODE_RESET.
+ * - @p PAL_MODE_UNCONNECTED.
+ * - @p PAL_MODE_INPUT.
+ * - @p PAL_MODE_INPUT_PULLUP.
+ * - @p PAL_MODE_INPUT_ANALOG.
+ * - @p PAL_MODE_OUTPUT_PUSHPULL.
+ * .
+ * Any attempt to setup an invalid mode is ignored.
+ *
+ * @section avr_pal_4 Suboptimal behavior
+ * The AVR PORT is less than optimal in several areas, the limitations
+ * should be taken in account while using the PAL driver:
+ * - Pad/port toggling operations are not atomic.
+ * - Pad/group mode setup is not atomic.
+ * - Group set+reset function is not atomic.
+ * - Writing on pads/groups/ports programmed as input with pull-up
+ * resistor changes the resistor setting because the output latch is
+ * used for resistor selection.
+ * - The PORT registers layout on some devices is not regular (it does
+ * not have contiguous PIN, DDR, PORT registers in this order), such
+ * ports cannot be accessed using the PAL driver. For example, PORT F
+ * on ATmega128. Verify the user manual of your device.
* .
* @ingroup AVR_DRIVERS
*/