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-rw-r--r--os/hal/platforms/STM32F1xx/hal_lld.c4
-rw-r--r--os/hal/platforms/STM32F2xx/hal_lld.c4
-rw-r--r--os/hal/platforms/STM32F4xx/hal_lld.c4
-rw-r--r--os/hal/platforms/STM32L1xx/hal_lld.c4
-rw-r--r--readme.txt3
5 files changed, 19 insertions, 0 deletions
diff --git a/os/hal/platforms/STM32F1xx/hal_lld.c b/os/hal/platforms/STM32F1xx/hal_lld.c
index 53bafb1b5..9fda0b3e7 100644
--- a/os/hal/platforms/STM32F1xx/hal_lld.c
+++ b/os/hal/platforms/STM32F1xx/hal_lld.c
@@ -215,6 +215,10 @@ void stm32_clock_init(void) {
; /* Wait until HSI is the source.*/
#if STM32_HSE_ENABLED
+#if defined(STM32_HSE_BYPASS)
+ /* HSE Bypass.*/
+ RCC->CR |= RCC_CR_HSEBYP;
+#endif
/* HSE activation.*/
RCC->CR |= RCC_CR_HSEON;
while (!(RCC->CR & RCC_CR_HSERDY))
diff --git a/os/hal/platforms/STM32F2xx/hal_lld.c b/os/hal/platforms/STM32F2xx/hal_lld.c
index 75d217c69..8cfad815c 100644
--- a/os/hal/platforms/STM32F2xx/hal_lld.c
+++ b/os/hal/platforms/STM32F2xx/hal_lld.c
@@ -149,6 +149,10 @@ void stm32_clock_init(void) {
; /* Waits until HSI is stable. */
#if STM32_HSE_ENABLED
+#if defined(STM32_HSE_BYPASS)
+ /* HSE Bypass.*/
+ RCC->CR |= RCC_CR_HSEBYP;
+#endif
/* HSE activation.*/
RCC->CR |= RCC_CR_HSEON;
while ((RCC->CR & RCC_CR_HSERDY) == 0)
diff --git a/os/hal/platforms/STM32F4xx/hal_lld.c b/os/hal/platforms/STM32F4xx/hal_lld.c
index 44de90602..8982da7b9 100644
--- a/os/hal/platforms/STM32F4xx/hal_lld.c
+++ b/os/hal/platforms/STM32F4xx/hal_lld.c
@@ -151,6 +151,10 @@ void stm32_clock_init(void) {
; /* Waits until HSI is stable. */
#if STM32_HSE_ENABLED
+#if defined(STM32_HSE_BYPASS)
+ /* HSE Bypass.*/
+ RCC->CR |= RCC_CR_HSEBYP;
+#endif
/* HSE activation.*/
RCC->CR |= RCC_CR_HSEON;
while ((RCC->CR & RCC_CR_HSERDY) == 0)
diff --git a/os/hal/platforms/STM32L1xx/hal_lld.c b/os/hal/platforms/STM32L1xx/hal_lld.c
index 1d28df62b..43ba6832d 100644
--- a/os/hal/platforms/STM32L1xx/hal_lld.c
+++ b/os/hal/platforms/STM32L1xx/hal_lld.c
@@ -165,6 +165,10 @@ void stm32_clock_init(void) {
#endif
#if STM32_HSE_ENABLED
+#if defined(STM32_HSE_BYPASS)
+ /* HSE Bypass.*/
+ RCC->CR |= RCC_CR_HSEBYP;
+#endif
/* HSE activation.*/
RCC->CR |= RCC_CR_HSEON;
while ((RCC->CR & RCC_CR_HSERDY) == 0)
diff --git a/readme.txt b/readme.txt
index 1bfe7fcdb..fef1cac36 100644
--- a/readme.txt
+++ b/readme.txt
@@ -117,6 +117,9 @@
3484947)(backported to 2.4.1).
- FIX: Fixed various minor documentation errors (bug 3484942)(backported
to 2.4.1).
+- NEW: Added HSE oscillator bypass capability to the STM32 clock
+ initialization, it is enabled by adding STM32_HSE_BYPASS to your
+ board.h file.
- NEW: Updated the MSP port to work with the latest MSPGCC compiler (4.6.3
LTS 20120406 unpatched), now the old MSPGCC 3.2.3 is no more supported
(backported to 2.4.1).