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-rw-r--r--os/hal/ports/STM32/STM32F0xx/stm32_registry.h16
1 files changed, 8 insertions, 8 deletions
diff --git a/os/hal/ports/STM32/STM32F0xx/stm32_registry.h b/os/hal/ports/STM32/STM32F0xx/stm32_registry.h
index ba43d7170..eeb26b96d 100644
--- a/os/hal/ports/STM32/STM32F0xx/stm32_registry.h
+++ b/os/hal/ports/STM32/STM32F0xx/stm32_registry.h
@@ -1922,7 +1922,7 @@
STM32_DMA_STREAM_ID_MSK(1, 5) |\
STM32_DMA_STREAM_ID_MSK(1, 6) |\
STM32_DMA_STREAM_ID_MSK(2, 2) |\
- STM32_DMA_STREAM_ID_MSK(2, 3)))
+ STM32_DMA_STREAM_ID_MSK(2, 3))
#define STM32_USART1_RX_DMA_CHN 0x00880888
#define STM32_USART1_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 2) |\
STM32_DMA_STREAM_ID_MSK(1, 4) |\
@@ -1938,7 +1938,7 @@
STM32_DMA_STREAM_ID_MSK(1, 5) |\
STM32_DMA_STREAM_ID_MSK(1, 6) |\
STM32_DMA_STREAM_ID_MSK(2, 2) |\
- STM32_DMA_STREAM_ID_MSK(2, 3)))
+ STM32_DMA_STREAM_ID_MSK(2, 3))
#define STM32_USART2_RX_DMA_CHN 0x00990999
#define STM32_USART2_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 2) |\
STM32_DMA_STREAM_ID_MSK(1, 4) |\
@@ -1954,7 +1954,7 @@
STM32_DMA_STREAM_ID_MSK(1, 5) |\
STM32_DMA_STREAM_ID_MSK(1, 6) |\
STM32_DMA_STREAM_ID_MSK(2, 2) |\
- STM32_DMA_STREAM_ID_MSK(2, 3)))
+ STM32_DMA_STREAM_ID_MSK(2, 3))
#define STM32_USART3_RX_DMA_CHN 0x00AA0AAA
#define STM32_USART3_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 2) |\
STM32_DMA_STREAM_ID_MSK(1, 4) |\
@@ -1970,7 +1970,7 @@
STM32_DMA_STREAM_ID_MSK(1, 5) |\
STM32_DMA_STREAM_ID_MSK(1, 6) |\
STM32_DMA_STREAM_ID_MSK(2, 2) |\
- STM32_DMA_STREAM_ID_MSK(2, 3)))
+ STM32_DMA_STREAM_ID_MSK(2, 3))
#define STM32_UART4_RX_DMA_CHN 0x00BB0BBB
#define STM32_UART4_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 2) |\
STM32_DMA_STREAM_ID_MSK(1, 4) |\
@@ -1986,7 +1986,7 @@
STM32_DMA_STREAM_ID_MSK(1, 5) |\
STM32_DMA_STREAM_ID_MSK(1, 6) |\
STM32_DMA_STREAM_ID_MSK(2, 2) |\
- STM32_DMA_STREAM_ID_MSK(2, 3)))
+ STM32_DMA_STREAM_ID_MSK(2, 3))
#define STM32_UART5_RX_DMA_CHN 0x00CC0CCC
#define STM32_UART5_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 2) |\
STM32_DMA_STREAM_ID_MSK(1, 4) |\
@@ -2002,7 +2002,7 @@
STM32_DMA_STREAM_ID_MSK(1, 5) |\
STM32_DMA_STREAM_ID_MSK(1, 6) |\
STM32_DMA_STREAM_ID_MSK(2, 2) |\
- STM32_DMA_STREAM_ID_MSK(2, 3)))
+ STM32_DMA_STREAM_ID_MSK(2, 3))
#define STM32_USART6_RX_DMA_CHN 0x00DD0DDD
#define STM32_USART6_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 2) |\
STM32_DMA_STREAM_ID_MSK(1, 4) |\
@@ -2018,7 +2018,7 @@
STM32_DMA_STREAM_ID_MSK(1, 5) |\
STM32_DMA_STREAM_ID_MSK(1, 6) |\
STM32_DMA_STREAM_ID_MSK(2, 2) |\
- STM32_DMA_STREAM_ID_MSK(2, 3)))
+ STM32_DMA_STREAM_ID_MSK(2, 3))
#define STM32_UART7_RX_DMA_CHN 0x00EE0EEE
#define STM32_UART7_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 2) |\
STM32_DMA_STREAM_ID_MSK(1, 4) |\
@@ -2034,7 +2034,7 @@
STM32_DMA_STREAM_ID_MSK(1, 5) |\
STM32_DMA_STREAM_ID_MSK(1, 6) |\
STM32_DMA_STREAM_ID_MSK(2, 2) |\
- STM32_DMA_STREAM_ID_MSK(2, 3)))
+ STM32_DMA_STREAM_ID_MSK(2, 3))
#define STM32_UART8_RX_DMA_CHN 0x00FF0FFF
#define STM32_UART8_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 2) |\
STM32_DMA_STREAM_ID_MSK(1, 4) |\