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-rw-r--r--os/hal/ports/STM32/LLD/ADCv4/hal_adc_lld.c10
-rw-r--r--testhal/STM32/multi/ADC/debug/STM32-ADC (Select ELF file)(OpenOCD, Flash and Run).launch2
2 files changed, 7 insertions, 5 deletions
diff --git a/os/hal/ports/STM32/LLD/ADCv4/hal_adc_lld.c b/os/hal/ports/STM32/LLD/ADCv4/hal_adc_lld.c
index b45aef900..6762ec8e6 100644
--- a/os/hal/ports/STM32/LLD/ADCv4/hal_adc_lld.c
+++ b/os/hal/ports/STM32/LLD/ADCv4/hal_adc_lld.c
@@ -153,16 +153,18 @@ static void adc_lld_calibrate(ADCDriver *adcp) {
osalDbgAssert(adcp->adcm->CR == ADC_CR_ADVREGEN, "invalid register state");
- adcp->adcm->CR = adcp->config->calibration & (ADC_CR_ADCALDIF |
- ADC_CR_ADCALLIN);
+ adcp->adcm->CR &= ~(ADC_CR_ADCALDIF | ADC_CR_ADCALLIN);
+ adcp->adcm->CR |= adcp->config->calibration & (ADC_CR_ADCALDIF |
+ ADC_CR_ADCALLIN);
adcp->adcm->CR |= ADC_CR_ADCAL;
while ((adcp->adcm->CR & ADC_CR_ADCAL) != 0U)
;
#if STM32_ADC_DUAL_MODE
osalDbgAssert(adcp->adcs->CR == ADC_CR_ADVREGEN, "invalid register state");
- adcp->adcs->CR = adcp->config->calibration & (ADC_CR_ADCALDIF |
- ADC_CR_ADCALLIN);
+ adcp->adcs->CR &= ~(ADC_CR_ADCALDIF | ADC_CR_ADCALLIN);
+ adcp->adcs->CR |= adcp->config->calibration & (ADC_CR_ADCALDIF |
+ ADC_CR_ADCALLIN);
adcp->adcs->CR |= ADC_CR_ADCAL;
while ((adcp->adcs->CR & ADC_CR_ADCAL) != 0U)
;
diff --git a/testhal/STM32/multi/ADC/debug/STM32-ADC (Select ELF file)(OpenOCD, Flash and Run).launch b/testhal/STM32/multi/ADC/debug/STM32-ADC (Select ELF file)(OpenOCD, Flash and Run).launch
index 98cf3d524..be98c7537 100644
--- a/testhal/STM32/multi/ADC/debug/STM32-ADC (Select ELF file)(OpenOCD, Flash and Run).launch
+++ b/testhal/STM32/multi/ADC/debug/STM32-ADC (Select ELF file)(OpenOCD, Flash and Run).launch
@@ -33,7 +33,7 @@
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generated by cgit v1.2.3 (git 2.25.1) at 2024-06-26 14:03:05 +0000