aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
Diffstat
-rw-r--r--os/hal/ports/STM32/LLD/RTCv2/hal_rtc_lld.c32
-rw-r--r--os/hal/ports/STM32/LLD/RTCv2/hal_rtc_lld.h3
-rw-r--r--os/hal/ports/STM32/STM32F0xx/hal_lld.h1
-rw-r--r--os/hal/ports/STM32/STM32F0xx/platform.mk1
-rw-r--r--os/hal/ports/STM32/STM32F0xx/stm32_registry.h98
-rw-r--r--testhal/STM32/multi/RTC/.cproject35
-rw-r--r--testhal/STM32/multi/RTC/Makefile6
-rw-r--r--testhal/STM32/multi/RTC/main.c6
8 files changed, 149 insertions, 33 deletions
diff --git a/os/hal/ports/STM32/LLD/RTCv2/hal_rtc_lld.c b/os/hal/ports/STM32/LLD/RTCv2/hal_rtc_lld.c
index 763ebf851..2dfc4f62c 100644
--- a/os/hal/ports/STM32/LLD/RTCv2/hal_rtc_lld.c
+++ b/os/hal/ports/STM32/LLD/RTCv2/hal_rtc_lld.c
@@ -285,7 +285,9 @@ OSAL_IRQ_HANDLER(STM32_RTC_COMMON_HANDLER) {
#if defined(RTC_ISR_TAMP3F)
| RTC_ISR_TAMP3F
#endif
+#if defined(RTC_ISR_WUTF)
| RTC_ISR_WUTF
+#endif
#if defined(RTC_ISR_ALRAF)
| RTC_ISR_ALRAF
#endif
@@ -302,12 +304,14 @@ OSAL_IRQ_HANDLER(STM32_RTC_COMMON_HANDLER) {
EXTI_MASK1(STM32_RTC_WKUP_EXTI));
if (RTCD1.callback != NULL) {
- uint32_t cr = RTCD1-rtc->CR;
- uint32_t tampcr = RTCD1.rtc->TAMPCR;
+ uint32_t cr = RTCD1.rtc->CR;
+ uint32_t tafcr = RTCD1.rtc->TAFCR;
+#if defined(RTC_ISR_WUTF)
if (((cr & RTC_CR_WUTIE) != 0U) && ((isr & RTC_ISR_WUTF) != 0U)) {
RTCD1.callback(&RTCD1, RTC_EVENT_WAKEUP);
}
+#endif
#if defined(RTC_ISR_ALRAF)
if (((cr & RTC_CR_ALRAIE) != 0U) && ((isr & RTC_ISR_ALRAF) != 0U)) {
@@ -329,24 +333,18 @@ OSAL_IRQ_HANDLER(STM32_RTC_COMMON_HANDLER) {
}
}
+ if ((tafcr & RTC_TAFCR_TAMPIE) != 0U) {
#if defined(RTC_ISR_TAMP1F)
- if (((tampcr & RTC_TAMPCR_TAMP1IE) != 0U) &&
- ((isr & RTC_ISR_TAMP1F) != 0U)) {
- RTCD1.callback(&RTCD1, RTC_EVENT_TAMP1);
- }
+ if ((isr & RTC_ISR_TAMP1F) != 0U) {
+ RTCD1.callback(&RTCD1, RTC_EVENT_TAMP1);
+ }
#endif
#if defined(RTC_ISR_TAMP2F)
- if (((tampcr & RTC_TAMPCR_TAMP2IE) != 0U) &&
- ((isr & RTC_ISR_TAMP2F) != 0U)) {
- RTCD1.callback(&RTCD1, RTC_EVENT_TAMP2);
- }
+ if ((isr & RTC_ISR_TAMP2F) != 0U) {
+ RTCD1.callback(&RTCD1, RTC_EVENT_TAMP2);
+ }
#endif
-#if defined(RTC_ISR_TAMP3F)
- if (((tampcr & RTC_TAMPCR_TAMP3IE) != 0U) &&
- ((isr & RTC_ISR_TAMP3F) != 0U)) {
- RTCD1.callback(&RTCD1, RTC_EVENT_TAMP3);
}
-#endif
}
OSAL_IRQ_EPILOGUE();
@@ -520,7 +518,11 @@ void rtc_lld_init(void) {
rtc_enter_init();
RTCD1.rtc->CR = STM32_RTC_CR_INIT;
+#if defined(RTC_TAFCR_TAMP1E)
+ RTCD1.rtc->TAFCR = STM32_RTC_TAMPCR_INIT;
+#else
RTCD1.rtc->TAMPCR = STM32_RTC_TAMPCR_INIT;
+#endif
RTCD1.rtc->ISR = RTC_ISR_INIT; /* Clearing all but RTC_ISR_INIT. */
RTCD1.rtc->PRER = STM32_RTC_PRER_BITS;
RTCD1.rtc->PRER = STM32_RTC_PRER_BITS;
diff --git a/os/hal/ports/STM32/LLD/RTCv2/hal_rtc_lld.h b/os/hal/ports/STM32/LLD/RTCv2/hal_rtc_lld.h
index 3badc3d1d..e538a6480 100644
--- a/os/hal/ports/STM32/LLD/RTCv2/hal_rtc_lld.h
+++ b/os/hal/ports/STM32/LLD/RTCv2/hal_rtc_lld.h
@@ -51,7 +51,7 @@
/**
* @brief Presence of a local persistent storage.
*/
-#define RTC_HAS_STORAGE TRUE
+#define RTC_HAS_STORAGE (STM32_RTC_STORAGE_SIZE > 0)
/** @} */
/**
@@ -120,6 +120,7 @@
* @brief RTC TAMPCR register initialization value.
* @note Use this value to initialize features not directly handled by
* the RTC driver.
+ * @note On F0 devices this values goes in the similar TAFCR register.
*/
#if !defined(STM32_RTC_TAMPCR_INIT) || defined(__DOXYGEN__)
#define STM32_RTC_TAMPCR_INIT 0
diff --git a/os/hal/ports/STM32/STM32F0xx/hal_lld.h b/os/hal/ports/STM32/STM32F0xx/hal_lld.h
index 66d55bd53..4894023d1 100644
--- a/os/hal/ports/STM32/STM32F0xx/hal_lld.h
+++ b/os/hal/ports/STM32/STM32F0xx/hal_lld.h
@@ -988,6 +988,7 @@
#include "cache.h"
#include "stm32_isr.h"
#include "stm32_dma.h"
+#include "stm32_exti.h"
#include "stm32_rcc.h"
#ifdef __cplusplus
diff --git a/os/hal/ports/STM32/STM32F0xx/platform.mk b/os/hal/ports/STM32/STM32F0xx/platform.mk
index 42cea08f1..a1177882a 100644
--- a/os/hal/ports/STM32/STM32F0xx/platform.mk
+++ b/os/hal/ports/STM32/STM32F0xx/platform.mk
@@ -25,6 +25,7 @@ include $(CHIBIOS)/os/hal/ports/STM32/LLD/ADCv1/driver.mk
include $(CHIBIOS)/os/hal/ports/STM32/LLD/CANv1/driver.mk
include $(CHIBIOS)/os/hal/ports/STM32/LLD/DACv1/driver.mk
include $(CHIBIOS)/os/hal/ports/STM32/LLD/DMAv1/driver.mk
+include $(CHIBIOS)/os/hal/ports/STM32/LLD/EXTIv1/driver.mk
include $(CHIBIOS)/os/hal/ports/STM32/LLD/GPIOv2/driver.mk
include $(CHIBIOS)/os/hal/ports/STM32/LLD/I2Cv2/driver.mk
include $(CHIBIOS)/os/hal/ports/STM32/LLD/RTCv2/driver.mk
diff --git a/os/hal/ports/STM32/STM32F0xx/stm32_registry.h b/os/hal/ports/STM32/STM32F0xx/stm32_registry.h
index f7749ed74..966e8f4d4 100644
--- a/os/hal/ports/STM32/STM32F0xx/stm32_registry.h
+++ b/os/hal/ports/STM32/STM32F0xx/stm32_registry.h
@@ -37,8 +37,16 @@
* @name STM32F0xx capabilities
* @{
*/
+
+/*===========================================================================*/
+/* Common. */
+/*===========================================================================*/
+
+/* RNG attributes.*/
+#define STM32_HAS_RNG1 FALSE
+
/*===========================================================================*/
-/* STM32F030x4, STM32F030x6, STM32F030x8, STM32F030xC. */
+/* STM32F030x4, STM32F030x6, STM32F030x8, STM32F030xC. */
/*===========================================================================*/
#if defined(STM32F030x4) || defined(STM32F030x6) || \
defined(STM32F030x8) || defined(STM32F030xC) || defined(__DOXYGEN__)
@@ -117,7 +125,7 @@
/* EXTI attributes.*/
#define STM32_EXTI_NUM_LINES 20
-#define STM32_EXTI_IMR_MASK 0xFFF50000U
+#define STM32_EXTI_IMR1_MASK 0xFFF50000U
/* GPIO attributes.*/
#define STM32_HAS_GPIOA TRUE
@@ -174,7 +182,14 @@
#define STM32_RTC_HAS_PERIODIC_WAKEUPS FALSE
#endif
#define STM32_RTC_NUM_ALARMS 1
-#define STM32_RTC_HAS_INTERRUPTS FALSE
+#define STM32_RTC_STORAGE_SIZE 0
+#define STM32_RTC_COMMON_HANDLER Vector48
+#define STM32_RTC_COMMON_NUMBER 2
+#define STM32_RTC_ALARM_EXTI 17
+#define STM32_RTC_TAMP_STAMP_EXTI 19
+#define STM32_RTC_WKUP_EXTI 20
+#define STM32_RTC_IRQ_ENABLE() \
+ nvicEnableVector(STM32_RTC_COMMON_NUMBER, STM32_IRQ_EXTI17_20_IRQ_PRIORITY)
/* SDIO attributes.*/
#define STM32_HAS_SDIO FALSE
@@ -428,7 +443,7 @@
/* EXTI attributes.*/
#define STM32_EXTI_NUM_LINES 32
-#define STM32_EXTI_IMR_MASK 0x0FF40000U
+#define STM32_EXTI_IMR1_MASK 0x0FF40000U
/* GPIO attributes.*/
#define STM32_HAS_GPIOA TRUE
@@ -466,7 +481,14 @@
#define STM32_RTC_HAS_SUBSECONDS TRUE
#define STM32_RTC_HAS_PERIODIC_WAKEUPS FALSE
#define STM32_RTC_NUM_ALARMS 1
-#define STM32_RTC_HAS_INTERRUPTS FALSE
+#define STM32_RTC_STORAGE_SIZE 0
+#define STM32_RTC_COMMON_HANDLER Vector48
+#define STM32_RTC_COMMON_NUMBER 2
+#define STM32_RTC_ALARM_EXTI 17
+#define STM32_RTC_TAMP_STAMP_EXTI 19
+#define STM32_RTC_WKUP_EXTI 20
+#define STM32_RTC_IRQ_ENABLE() \
+ nvicEnableVector(STM32_RTC_COMMON_NUMBER, STM32_IRQ_EXTI17_20_IRQ_PRIORITY)
/* SDIO attributes.*/
#define STM32_HAS_SDIO FALSE
@@ -639,7 +661,7 @@
/* EXTI attributes.*/
#define STM32_EXTI_NUM_LINES 32
-#define STM32_EXTI_IMR_MASK 0x7FF40000U
+#define STM32_EXTI_IMR1_MASK 0x7FF40000U
/* GPIO attributes.*/
#define STM32_HAS_GPIOA TRUE
@@ -677,7 +699,14 @@
#define STM32_RTC_HAS_SUBSECONDS TRUE
#define STM32_RTC_HAS_PERIODIC_WAKEUPS FALSE
#define STM32_RTC_NUM_ALARMS 1
-#define STM32_RTC_HAS_INTERRUPTS FALSE
+#define STM32_RTC_STORAGE_SIZE 0
+#define STM32_RTC_COMMON_HANDLER Vector48
+#define STM32_RTC_COMMON_NUMBER 2
+#define STM32_RTC_ALARM_EXTI 17
+#define STM32_RTC_TAMP_STAMP_EXTI 19
+#define STM32_RTC_WKUP_EXTI 20
+#define STM32_RTC_IRQ_ENABLE() \
+ nvicEnableVector(STM32_RTC_COMMON_NUMBER, STM32_IRQ_EXTI17_20_IRQ_PRIORITY)
/* SDIO attributes.*/
#define STM32_HAS_SDIO FALSE
@@ -858,7 +887,7 @@
/* EXTI attributes.*/
#define STM32_EXTI_NUM_LINES 32
-#define STM32_EXTI_IMR_MASK 0x7FF40000U
+#define STM32_EXTI_IMR1_MASK 0x7FF40000U
/* GPIO attributes.*/
#define STM32_HAS_GPIOA TRUE
@@ -896,7 +925,14 @@
#define STM32_RTC_HAS_SUBSECONDS TRUE
#define STM32_RTC_HAS_PERIODIC_WAKEUPS FALSE
#define STM32_RTC_NUM_ALARMS 1
-#define STM32_RTC_HAS_INTERRUPTS FALSE
+#define STM32_RTC_STORAGE_SIZE 0
+#define STM32_RTC_COMMON_HANDLER Vector48
+#define STM32_RTC_COMMON_NUMBER 2
+#define STM32_RTC_ALARM_EXTI 17
+#define STM32_RTC_TAMP_STAMP_EXTI 19
+#define STM32_RTC_WKUP_EXTI 20
+#define STM32_RTC_IRQ_ENABLE() \
+ nvicEnableVector(STM32_RTC_COMMON_NUMBER, STM32_IRQ_EXTI17_20_IRQ_PRIORITY)
/* SDIO attributes.*/
#define STM32_HAS_SDIO FALSE
@@ -1086,7 +1122,7 @@
/* EXTI attributes.*/
#define STM32_EXTI_NUM_LINES 32
-#define STM32_EXTI_IMR_MASK 0x0F940000U
+#define STM32_EXTI_IMR1_MASK 0x0F940000U
/* GPIO attributes.*/
#define STM32_HAS_GPIOA TRUE
@@ -1130,7 +1166,14 @@
#define STM32_RTC_HAS_SUBSECONDS TRUE
#define STM32_RTC_HAS_PERIODIC_WAKEUPS FALSE
#define STM32_RTC_NUM_ALARMS 1
-#define STM32_RTC_HAS_INTERRUPTS FALSE
+#define STM32_RTC_STORAGE_SIZE 0
+#define STM32_RTC_COMMON_HANDLER Vector48
+#define STM32_RTC_COMMON_NUMBER 2
+#define STM32_RTC_ALARM_EXTI 17
+#define STM32_RTC_TAMP_STAMP_EXTI 19
+#define STM32_RTC_WKUP_EXTI 20
+#define STM32_RTC_IRQ_ENABLE() \
+ nvicEnableVector(STM32_RTC_COMMON_NUMBER, STM32_IRQ_EXTI17_20_IRQ_PRIORITY)
/* SDIO attributes.*/
#define STM32_HAS_SDIO FALSE
@@ -1322,7 +1365,7 @@
/* EXTI attributes.*/
#define STM32_EXTI_NUM_LINES 32
-#define STM32_EXTI_IMR_MASK 0x7F840000U
+#define STM32_EXTI_IMR1_MASK 0x7F840000U
/* GPIO attributes.*/
#define STM32_HAS_GPIOA TRUE
@@ -1374,7 +1417,14 @@
#define STM32_RTC_HAS_PERIODIC_WAKEUPS FALSE
#endif
#define STM32_RTC_NUM_ALARMS 1
-#define STM32_RTC_HAS_INTERRUPTS FALSE
+#define STM32_RTC_STORAGE_SIZE 0
+#define STM32_RTC_COMMON_HANDLER Vector48
+#define STM32_RTC_COMMON_NUMBER 2
+#define STM32_RTC_ALARM_EXTI 17
+#define STM32_RTC_TAMP_STAMP_EXTI 19
+#define STM32_RTC_WKUP_EXTI 20
+#define STM32_RTC_IRQ_ENABLE() \
+ nvicEnableVector(STM32_RTC_COMMON_NUMBER, STM32_IRQ_EXTI17_20_IRQ_PRIORITY)
/* SDIO attributes.*/
#define STM32_HAS_SDIO FALSE
@@ -1588,7 +1638,7 @@
/* EXTI attributes.*/
#define STM32_EXTI_NUM_LINES 32
-#define STM32_EXTI_IMR_MASK 0x7F840000U
+#define STM32_EXTI_IMR1_MASK 0x7F840000U
/* GPIO attributes.*/
#define STM32_HAS_GPIOA TRUE
@@ -1635,7 +1685,14 @@
#define STM32_RTC_HAS_SUBSECONDS TRUE
#define STM32_RTC_HAS_PERIODIC_WAKEUPS TRUE
#define STM32_RTC_NUM_ALARMS 1
-#define STM32_RTC_HAS_INTERRUPTS FALSE
+#define STM32_RTC_STORAGE_SIZE 0
+#define STM32_RTC_COMMON_HANDLER Vector48
+#define STM32_RTC_COMMON_NUMBER 2
+#define STM32_RTC_ALARM_EXTI 17
+#define STM32_RTC_TAMP_STAMP_EXTI 19
+#define STM32_RTC_WKUP_EXTI 20
+#define STM32_RTC_IRQ_ENABLE() \
+ nvicEnableVector(STM32_RTC_COMMON_NUMBER, STM32_IRQ_EXTI17_20_IRQ_PRIORITY)
/* SDIO attributes.*/
#define STM32_HAS_SDIO FALSE
@@ -1870,7 +1927,7 @@
/* EXTI attributes.*/
#define STM32_EXTI_NUM_LINES 32
-#define STM32_EXTI_IMR_MASK 0x7F840000U
+#define STM32_EXTI_IMR1_MASK 0x7F840000U
/* GPIO attributes.*/
#define STM32_HAS_GPIOA TRUE
@@ -1918,7 +1975,14 @@
#define STM32_RTC_HAS_SUBSECONDS TRUE
#define STM32_RTC_HAS_PERIODIC_WAKEUPS TRUE
#define STM32_RTC_NUM_ALARMS 1
-#define STM32_RTC_HAS_INTERRUPTS FALSE
+#define STM32_RTC_STORAGE_SIZE 0
+#define STM32_RTC_COMMON_HANDLER Vector48
+#define STM32_RTC_COMMON_NUMBER 2
+#define STM32_RTC_ALARM_EXTI 17
+#define STM32_RTC_TAMP_STAMP_EXTI 19
+#define STM32_RTC_WKUP_EXTI 20
+#define STM32_RTC_IRQ_ENABLE() \
+ nvicEnableVector(STM32_RTC_COMMON_NUMBER, STM32_IRQ_EXTI17_20_IRQ_PRIORITY)
/* SDIO attributes.*/
#define STM32_HAS_SDIO FALSE
diff --git a/testhal/STM32/multi/RTC/.cproject b/testhal/STM32/multi/RTC/.cproject
index 428122619..8125e9043 100644
--- a/testhal/STM32/multi/RTC/.cproject
+++ b/testhal/STM32/multi/RTC/.cproject
@@ -103,12 +103,47 @@
</storageModule>
<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
</cconfiguration>
+ <cconfiguration id="0.365230168.523175374.896040759">
+ <storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="0.365230168.523175374.896040759" moduleId="org.eclipse.cdt.core.settings" name="Build for STM32F051-Discovery">
+ <externalSettings/>
+ <extensions>
+ <extension id="org.eclipse.cdt.core.VCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+ <extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+ <extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+ <extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+ <extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+ <extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+ </extensions>
+ </storageModule>
+ <storageModule moduleId="cdtBuildSystem" version="4.0.0">
+ <configuration artifactName="${ProjName}" buildProperties="" description="" id="0.365230168.523175374.896040759" name="Build for STM32F051-Discovery" parent="org.eclipse.cdt.build.core.prefbase.cfg">
+ <folderInfo id="0.365230168.523175374.896040759." name="/" resourcePath="">
+ <toolChain id="org.eclipse.cdt.build.core.prefbase.toolchain.1591624430" name="No ToolChain" resourceTypeBasedDiscovery="false" superClass="org.eclipse.cdt.build.core.prefbase.toolchain">
+ <targetPlatform id="org.eclipse.cdt.build.core.prefbase.toolchain.1591624430.585408115" name=""/>
+ <builder arguments="-f ./make/stm32f051_discovery.make" autoBuildTarget="all" cleanBuildTarget="clean" command="make" enableAutoBuild="false" enableCleanBuild="true" enabledIncrementalBuild="true" id="org.eclipse.cdt.build.core.settings.default.builder.645638722" incrementalBuildTarget="all" keepEnvironmentInBuildfile="false" managedBuildOn="false" name="Gnu Make Builder" parallelBuildOn="true" parallelizationNumber="optimal" superClass="org.eclipse.cdt.build.core.settings.default.builder"/>
+ <tool id="org.eclipse.cdt.build.core.settings.holder.libs.921531948" name="holder for library settings" superClass="org.eclipse.cdt.build.core.settings.holder.libs"/>
+ <tool id="org.eclipse.cdt.build.core.settings.holder.396453866" name="Assembly" superClass="org.eclipse.cdt.build.core.settings.holder">
+ <inputType id="org.eclipse.cdt.build.core.settings.holder.inType.900903179" languageId="org.eclipse.cdt.core.assembly" languageName="Assembly" sourceContentType="org.eclipse.cdt.core.asmSource" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
+ </tool>
+ <tool id="org.eclipse.cdt.build.core.settings.holder.962709498" name="GNU C++" superClass="org.eclipse.cdt.build.core.settings.holder">
+ <inputType id="org.eclipse.cdt.build.core.settings.holder.inType.1901095465" languageId="org.eclipse.cdt.core.g++" languageName="GNU C++" sourceContentType="org.eclipse.cdt.core.cxxSource,org.eclipse.cdt.core.cxxHeader" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
+ </tool>
+ <tool id="org.eclipse.cdt.build.core.settings.holder.1142526812" name="GNU C" superClass="org.eclipse.cdt.build.core.settings.holder">
+ <inputType id="org.eclipse.cdt.build.core.settings.holder.inType.165943227" languageId="org.eclipse.cdt.core.gcc" languageName="GNU C" sourceContentType="org.eclipse.cdt.core.cSource,org.eclipse.cdt.core.cHeader" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
+ </tool>
+ </toolChain>
+ </folderInfo>
+ </configuration>
+ </storageModule>
+ <storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+ </cconfiguration>
</storageModule>
<storageModule moduleId="cdtBuildSystem" version="4.0.0">
<project id="STM32-RTC.null.1829068891" name="STM32-RTC"/>
</storageModule>
<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
<storageModule moduleId="refreshScope" versionNumber="2">
+ <configuration configurationName="Build for STM32L4R5ZI-Nucleo144"/>
<configuration configurationName="Default">
<resource resourceType="PROJECT" workspacePath="/STM32-RTC"/>
</configuration>
diff --git a/testhal/STM32/multi/RTC/Makefile b/testhal/STM32/multi/RTC/Makefile
index 6266997ef..72e30918f 100644
--- a/testhal/STM32/multi/RTC/Makefile
+++ b/testhal/STM32/multi/RTC/Makefile
@@ -4,6 +4,10 @@
all:
@echo
+ @echo === Building for STM32F0-Discovery ===============================
+ +@make --no-print-directory -f ./make/stm32f051_discovery.make all
+ @echo ====================================================================
+ @echo
@echo === Building for STM32L476-Discovery ===============================
+@make --no-print-directory -f ./make/stm32l476_discovery.make all
@echo ====================================================================
@@ -15,6 +19,8 @@ all:
clean:
@echo
+ +@make --no-print-directory -f ./make/stm32f051_discovery.make clean
+ @echo
+@make --no-print-directory -f ./make/stm32l476_discovery.make clean
@echo
+@make --no-print-directory -f ./make/stm32l4r5zi_nucleo144.make clean
diff --git a/testhal/STM32/multi/RTC/main.c b/testhal/STM32/multi/RTC/main.c
index f4dfb5334..6f9fdbe34 100644
--- a/testhal/STM32/multi/RTC/main.c
+++ b/testhal/STM32/multi/RTC/main.c
@@ -49,6 +49,7 @@ static void cmd_date(BaseSequentialStream *chp, int argc, char *argv[]) {
timespec.year + 1980U);
}
+#if RTC_HAS_STORAGE
static void cmd_storage(BaseSequentialStream *chp, int argc, char *argv[]) {
size_t storage_size = psGetStorageSize(&RTCD1);
ps_offset_t i;
@@ -69,10 +70,13 @@ static void cmd_storage(BaseSequentialStream *chp, int argc, char *argv[]) {
}
}
}
+#endif
static const ShellCommand commands[] = {
{"date", cmd_date},
+#if RTC_HAS_STORAGE
{"storage", cmd_storage},
+#endif
{NULL, NULL}
};
@@ -162,7 +166,9 @@ int main(void) {
rtcSetAlarm(&RTCD1, 0, &alarm1);
rtcSetAlarm(&RTCD1, 1, &alarm2);
rtcSetCallback(&RTCD1, alarmcb);
+#if RTC_HAS_STORAGE
psWrite(&RTCD1, 0U, 12U, (const uint8_t *)"Hello World!");
+#endif
/* Normal main() thread activity, spawning shells.*/
while (true) {
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-09 11:39:45 +0000