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-rw-r--r--demos/ARMCM0-LPC1114-GCC/Makefile3
-rw-r--r--demos/ARMCM3-LPC1343-GCC/Makefile3
-rw-r--r--os/hal/platforms/STM8/hal_lld.c24
-rw-r--r--os/hal/platforms/STM8/hal_lld.h97
-rw-r--r--os/hal/platforms/STM8/pal_lld.c4
-rw-r--r--os/hal/platforms/STM8/pal_lld.h8
-rw-r--r--os/hal/platforms/STM8/platform.dox57
-rw-r--r--os/hal/platforms/STM8/serial_lld.c54
-rw-r--r--os/hal/platforms/STM8/serial_lld.h26
-rw-r--r--os/hal/platforms/STM8/spi_lld.c14
-rw-r--r--os/hal/platforms/STM8/spi_lld.h12
-rw-r--r--os/ports/GCC/ARMCMx/LPC11xx/port.mk3
-rw-r--r--os/ports/GCC/ARMCMx/LPC13xx/port.mk3
-rw-r--r--os/ports/GCC/ARMCMx/STM32/vectors.c1
-rw-r--r--readme.txt12
15 files changed, 168 insertions, 153 deletions
diff --git a/demos/ARMCM0-LPC1114-GCC/Makefile b/demos/ARMCM0-LPC1114-GCC/Makefile
index ee2ca97bc..7ed1b6e78 100644
--- a/demos/ARMCM0-LPC1114-GCC/Makefile
+++ b/demos/ARMCM0-LPC1114-GCC/Makefile
@@ -96,8 +96,7 @@ TCSRC =
TCPPSRC =
# List ASM source files here
-ASMSRC = $(PORTASM) \
- $(CHIBIOS)/os/ports/GCC/ARMCMx/LPC11xx/vectors.s
+ASMSRC = $(PORTASM)
INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \
$(HALINC) $(PLATFORMINC) $(BOARDINC) \
diff --git a/demos/ARMCM3-LPC1343-GCC/Makefile b/demos/ARMCM3-LPC1343-GCC/Makefile
index 173685b26..dc3cc484f 100644
--- a/demos/ARMCM3-LPC1343-GCC/Makefile
+++ b/demos/ARMCM3-LPC1343-GCC/Makefile
@@ -96,8 +96,7 @@ TCSRC =
TCPPSRC =
# List ASM source files here
-ASMSRC = $(PORTASM) \
- $(CHIBIOS)/os/ports/GCC/ARMCMx/LPC13xx/vectors.s
+ASMSRC = $(PORTASM)
INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \
$(HALINC) $(PLATFORMINC) $(BOARDINC) \
diff --git a/os/hal/platforms/STM8/hal_lld.c b/os/hal/platforms/STM8/hal_lld.c
index 87010481c..de32cfb44 100644
--- a/os/hal/platforms/STM8/hal_lld.c
+++ b/os/hal/platforms/STM8/hal_lld.c
@@ -18,8 +18,8 @@
*/
/**
- * @file STM8/hal_lld.c
- * @brief STM8 HAL subsystem low level driver source.
+ * @file STM8S/hal_lld.c
+ * @brief STM8S HAL subsystem low level driver source.
*
* @addtogroup HAL
* @{
@@ -52,40 +52,40 @@
* @brief Low level HAL driver initialization.
* @details Clock sources initialization, HSI is assumed to be already
* started after reset.
- * @note If the @p STM8_CLOCK_INIT option is set to @p FALSE then the
+ * @note If the @p STM8S_CLOCK_INIT option is set to @p FALSE then the
* initialization is not performed and is left to the application.
*
* @notapi
*/
void hal_lld_init(void) {
-#if !STM8_NO_CLOCK_INIT
+#if !STM8S_NO_CLOCK_INIT
/* Makes sure that HSI is stable before proceeding.*/
CLK->ICKR |= CLK_ICKR_HSIRDY;
while ((CLK->ICKR & CLK_ICKR_HSIRDY) == 0)
;
/* LSI startup and stabilization if required.*/
-#if STM8_LSI_ENABLED
+#if STM8S_LSI_ENABLED
CLK->ICKR |= CLK_ICKR_LSIEN;
while ((CLK->ICKR & CLK_ICKR_LSIRDY) == 0)
;
#endif
/* HSE startup and stabilization if required.*/
-#if STM8_HSE_ENABLED
+#if STM8S_HSE_ENABLED
CLK->ECKR |= CLK_ECKR_HSEEN;
while ((CLK->ECKR & CLK_ECKR_HSERDY) == 0)
;
#endif
/* Setting up clock dividers.*/
- CLK->CKDIVR = (STM8_HSI_DIVIDER << 3) | (STM8_CPU_DIVIDER << 0);
+ CLK->CKDIVR = (STM8S_HSI_DIVIDER << 3) | (STM8S_CPU_DIVIDER << 0);
/* SYSCLK switch to the selected source, not necessary if it is HSI.*/
-#if STM8_SYSCLK_SOURCE != CLK_SYSSEL_HSI
+#if STM8S_SYSCLK_SOURCE != CLK_SYSSEL_HSI
/* Switching clock (manual switch mode).*/
- CLK->SWR = STM8_SYSCLK_SOURCE;
+ CLK->SWR = STM8S_SYSCLK_SOURCE;
while ((CLK->SWCR & CLK_SWCR_SWIF) == 0)
;
CLK->SWCR = CLK_SWCR_SWEN;
@@ -98,13 +98,13 @@ void hal_lld_init(void) {
/* Other clock related initializations.*/
CLK->CSSR = 0;
CLK->CCOR = 0;
- CLK->CANCCR = STM8_CAN_DIVIDER_VALUE;
+ CLK->CANCCR = STM8S_CAN_DIVIDER_VALUE;
/* HSI disabled if it is no more required.*/
-#if !STM8_HSI_ENABLED
+#if !STM8S_HSI_ENABLED
CLK->ICKR &= ~CLK_ICKR_HSIEN;
#endif
-#endif /* !STM8_NO_CLOCK_INIT */
+#endif /* !STM8S_NO_CLOCK_INIT */
}
/** @} */
diff --git a/os/hal/platforms/STM8/hal_lld.h b/os/hal/platforms/STM8/hal_lld.h
index 6e2c585d2..1db8a742c 100644
--- a/os/hal/platforms/STM8/hal_lld.h
+++ b/os/hal/platforms/STM8/hal_lld.h
@@ -18,8 +18,8 @@
*/
/**
- * @file STM8/hal_lld.h
- * @brief STM8 HAL subsystem low level driver source.
+ * @file STM8S/hal_lld.h
+ * @brief STM8S HAL subsystem low level driver source.
* @pre This module requires the following macros to be defined in the
* @p board.h file:
* - HSECLK (@p 0 if disabled or frequency in Hertz).
@@ -39,7 +39,18 @@
#ifndef _HAL_LLD_H_
#define _HAL_LLD_H_
-#include "stm8.h"
+#undef FALSE
+#undef TRUE
+
+#if defined(STM8S208) || defined(STM8S207) || defined(STM8S105) || \
+ defined(STM8S103) || defined(STM8S903)
+#include "stm8s.h"
+#else
+#error "unsupported or invalid STM8 platform"
+#endif
+
+#define FALSE 0
+#define TRUE (!FALSE)
/*===========================================================================*/
/* Driver constants. */
@@ -78,111 +89,111 @@
/**
* @brief Disables the clock initialization in the HAL.
*/
-#if !defined(STM8_NO_CLOCK_INIT) || defined(__DOXYGEN__)
-#define STM8_NO_CLOCK_INIT FALSE
+#if !defined(STM8S_NO_CLOCK_INIT) || defined(__DOXYGEN__)
+#define STM8S_NO_CLOCK_INIT FALSE
#endif
/**
* @brief Enables or disables the HSI clock source.
*/
-#if !defined(STM8_HSI_ENABLED) || defined(__DOXYGEN__)
-#define STM8_HSI_ENABLED FALSE
+#if !defined(STM8S_HSI_ENABLED) || defined(__DOXYGEN__)
+#define STM8S_HSI_ENABLED FALSE
#endif
/**
* @brief Enables or disables the LSI clock source.
*/
-#if !defined(STM8_LSI_ENABLED) || defined(__DOXYGEN__)
-#define STM8_LSI_ENABLED TRUE
+#if !defined(STM8S_LSI_ENABLED) || defined(__DOXYGEN__)
+#define STM8S_LSI_ENABLED TRUE
#endif
/**
* @brief Enables or disables the HSE clock source.
*/
-#if !defined(STM8_HSE_ENABLED) || defined(__DOXYGEN__)
-#define STM8_HSE_ENABLED TRUE
+#if !defined(STM8S_HSE_ENABLED) || defined(__DOXYGEN__)
+#define STM8S_HSE_ENABLED TRUE
#endif
/**
* @brief Clock source setting.
*/
-#if !defined(STM8_SYSCLK_SOURCE) || defined(__DOXYGEN__)
-#define STM8_SYSCLK_SOURCE CLK_SYSSEL_HSE
+#if !defined(STM8S_SYSCLK_SOURCE) || defined(__DOXYGEN__)
+#define STM8S_SYSCLK_SOURCE CLK_SYSSEL_HSE
#endif
/**
* @brief HSI clock divider.
*/
-#if !defined(STM8_HSI_DIVIDER) || defined(__DOXYGEN__)
-#define STM8_HSI_DIVIDER CLK_HSI_DIV8
+#if !defined(STM8S_HSI_DIVIDER) || defined(__DOXYGEN__)
+#define STM8S_HSI_DIVIDER CLK_HSI_DIV8
#endif
/**
* @brief CPU clock divider.
*/
-#if !defined(STM8_CPU_DIVIDER) || defined(__DOXYGEN__)
-#define STM8_CPU_DIVIDER CLK_CPU_DIV1
+#if !defined(STM8S_CPU_DIVIDER) || defined(__DOXYGEN__)
+#define STM8S_CPU_DIVIDER CLK_CPU_DIV1
#endif
/**
* @brief bxCAN divider value.
*/
-#if !defined(STM8_CAN_DIVIDER_VALUE) || defined(__DOXYGEN__)
-#define STM8_CAN_DIVIDER_VALUE 1
+#if !defined(STM8S_CAN_DIVIDER_VALUE) || defined(__DOXYGEN__)
+#define STM8S_CAN_DIVIDER_VALUE 1
#endif
/*===========================================================================*/
/* Derived constants and error checks. */
/*===========================================================================*/
-#if (STM8_HSI_DIVIDER != CLK_HSI_DIV1) && \
- (STM8_HSI_DIVIDER != CLK_HSI_DIV2) && \
- (STM8_HSI_DIVIDER != CLK_HSI_DIV4) && \
- (STM8_HSI_DIVIDER != CLK_HSI_DIV8)
+#if (STM8S_HSI_DIVIDER != CLK_HSI_DIV1) && \
+ (STM8S_HSI_DIVIDER != CLK_HSI_DIV2) && \
+ (STM8S_HSI_DIVIDER != CLK_HSI_DIV4) && \
+ (STM8S_HSI_DIVIDER != CLK_HSI_DIV8)
#error "specified invalid HSI divider"
#endif
-#if (STM8_CPU_DIVIDER != CLK_CPU_DIV1) && \
- (STM8_CPU_DIVIDER != CLK_CPU_DIV2) && \
- (STM8_CPU_DIVIDER != CLK_CPU_DIV4) && \
- (STM8_CPU_DIVIDER != CLK_CPU_DIV8) && \
- (STM8_CPU_DIVIDER != CLK_CPU_DIV16) && \
- (STM8_CPU_DIVIDER != CLK_CPU_DIV32) && \
- (STM8_CPU_DIVIDER != CLK_CPU_DIV64) && \
- (STM8_CPU_DIVIDER != CLK_CPU_DIV128)
+#if (STM8S_CPU_DIVIDER != CLK_CPU_DIV1) && \
+ (STM8S_CPU_DIVIDER != CLK_CPU_DIV2) && \
+ (STM8S_CPU_DIVIDER != CLK_CPU_DIV4) && \
+ (STM8S_CPU_DIVIDER != CLK_CPU_DIV8) && \
+ (STM8S_CPU_DIVIDER != CLK_CPU_DIV16) && \
+ (STM8S_CPU_DIVIDER != CLK_CPU_DIV32) && \
+ (STM8S_CPU_DIVIDER != CLK_CPU_DIV64) && \
+ (STM8S_CPU_DIVIDER != CLK_CPU_DIV128)
#error "specified invalid CPU divider"
#endif
-#if (STM8_CAN_DIVIDER_VALUE < 1) || (STM8_CAN_DIVIDER_VALUE > 8)
+#if (STM8S_CAN_DIVIDER_VALUE < 1) || (STM8S_CAN_DIVIDER_VALUE > 8)
#error "specified invalid CAN divider value"
#endif
-#if STM8_HSE_ENABLED && (HSECLK == 0)
+#if STM8S_HSE_ENABLED && (HSECLK == 0)
#error "impossible to activate HSE"
#endif
-#if !STM8_HSI_ENABLED && (STM8_SYSCLK_SOURCE == CLK_SYSSEL_HSI)
+#if !STM8S_HSI_ENABLED && (STM8S_SYSCLK_SOURCE == CLK_SYSSEL_HSI)
#error "requested HSI clock is not enabled"
#endif
-#if !STM8_LSI_ENABLED && (STM8_SYSCLK_SOURCE == CLK_SYSSEL_LSI)
+#if !STM8S_LSI_ENABLED && (STM8S_SYSCLK_SOURCE == CLK_SYSSEL_LSI)
#error "requested LSI clock is not enabled"
#endif
-#if !STM8_HSE_ENABLED && (STM8_SYSCLK_SOURCE == CLK_SYSSEL_HSE)
+#if !STM8S_HSE_ENABLED && (STM8S_SYSCLK_SOURCE == CLK_SYSSEL_HSE)
#error "requested HSE clock is not enabled"
#endif
/**
* @brief System clock.
*/
-#if STM8L_NO_CLOCK_INIT || defined(__DOXYGEN__)
+#if STM8SL_NO_CLOCK_INIT || defined(__DOXYGEN__)
#define SYSCLK (HSICLK / 8)
-#elif STM8_SYSCLK_SOURCE == CLK_SYSSEL_HSI
-#define SYSCLK (HSICLK / (1 << STM8_HSI_DIVIDER))
-#elif STM8_SYSCLK_SOURCE == CLK_SYSSEL_LSI
+#elif STM8S_SYSCLK_SOURCE == CLK_SYSSEL_HSI
+#define SYSCLK (HSICLK / (1 << STM8S_HSI_DIVIDER))
+#elif STM8S_SYSCLK_SOURCE == CLK_SYSSEL_LSI
#define SYSCLK LSICLK
-#elif STM8_SYSCLK_SOURCE == CLK_SYSSEL_HSE
+#elif STM8S_SYSCLK_SOURCE == CLK_SYSSEL_HSE
#define SYSCLK HSECLK
#else
#error "specified invalid clock source"
@@ -190,10 +201,10 @@
/**
* @brief CPU clock.
- * @details On the STM8S the CPU clock can be programmed to be a fraction of
+ * @details On the STM8SS the CPU clock can be programmed to be a fraction of
* the system clock.
*/
-#define CPUCLK (SYSCLK / (1 << STM8_CPU_DIVIDER))
+#define CPUCLK (SYSCLK / (1 << STM8S_CPU_DIVIDER))
/*===========================================================================*/
/* Driver data structures and types. */
diff --git a/os/hal/platforms/STM8/pal_lld.c b/os/hal/platforms/STM8/pal_lld.c
index 3296022e7..feb9c33cf 100644
--- a/os/hal/platforms/STM8/pal_lld.c
+++ b/os/hal/platforms/STM8/pal_lld.c
@@ -18,8 +18,8 @@
*/
/**
- * @file STM8/pal_lld.c
- * @brief STM8 GPIO low level driver code.
+ * @file STM8S/pal_lld.c
+ * @brief STM8S GPIO low level driver code.
*
* @addtogroup PAL
* @{
diff --git a/os/hal/platforms/STM8/pal_lld.h b/os/hal/platforms/STM8/pal_lld.h
index c8e572d42..65f4584de 100644
--- a/os/hal/platforms/STM8/pal_lld.h
+++ b/os/hal/platforms/STM8/pal_lld.h
@@ -18,8 +18,8 @@
*/
/**
- * @file STM8/pal_lld.h
- * @brief STM8 GPIO low level driver header.
+ * @file STM8S/pal_lld.h
+ * @brief STM8S GPIO low level driver header.
*
* @addtogroup PAL
* @{
@@ -37,12 +37,12 @@
#undef PAL_MODE_INPUT_PULLDOWN
/**
- * @brief STM8 specific alternate push-pull slow output mode.
+ * @brief STM8S specific alternate push-pull slow output mode.
*/
#define PAL_MODE_OUTPUT_PUSHPULL_SLOW 16
/**
- * @brief STM8 specific alternate open-drain slow output mode.
+ * @brief STM8S specific alternate open-drain slow output mode.
*/
#define PAL_MODE_OUTPUT_OPENDRAIN_SLOW 17
diff --git a/os/hal/platforms/STM8/platform.dox b/os/hal/platforms/STM8/platform.dox
index c71063910..2bf6f73a3 100644
--- a/os/hal/platforms/STM8/platform.dox
+++ b/os/hal/platforms/STM8/platform.dox
@@ -18,33 +18,32 @@
*/
/**
- * @defgroup STM8 STM8x Drivers
- * @details This section describes all the supported drivers on the STM8S and
- * STM8A platforms and the implementation details of the single
- * drivers.
+ * @defgroup STM8S STM8Sx Drivers
+ * @details This section describes all the supported drivers on the STM8S
+ * platform and the implementation details of the single drivers.
*
* @ingroup platforms
*/
/**
- * @defgroup STM8_HAL STM8 Initialization Support
- * @details The STM8 HAL support is responsible for system initialization.
+ * @defgroup STM8S_HAL STM8S Initialization Support
+ * @details The STM8S HAL support is responsible for system initialization.
*
- * @section stm8_hal_1 Supported HW resources
+ * @section stm8s_hal_1 Supported HW resources
* - CLK.
* .
- * @section stm8_hal_2 STM8 HAL driver implementation features
+ * @section stm8s_hal_2 STM8S HAL driver implementation features
* - Clock tree initialization.
* - Clock source selection.
* .
- * @ingroup STM8
+ * @ingroup STM8S
*/
/**
- * @defgroup STM8_PAL STM8 GPIO Support
- * @details The STM8 PAL driver uses the GPIO peripherals.
+ * @defgroup STM8S_PAL STM8S GPIO Support
+ * @details The STM8S PAL driver uses the GPIO peripherals.
*
- * @section stm8_pal_1 Supported HW resources
+ * @section stm8s_pal_1 Supported HW resources
* - AFIO.
* - GPIOA.
* - GPIOB.
@@ -56,16 +55,16 @@
* - GPIOH (where present).
* - GPIOI (where present).
* .
- * @section stm8_pal_2 STM8 PAL driver implementation features
+ * @section stm8s_pal_2 STM8S PAL driver implementation features
* The PAL driver implementation fully supports the following hardware
* capabilities:
* - 8 bits wide ports.
- * - Atomic set/reset/toggle functions because special STM8 instruction set.
+ * - Atomic set/reset/toggle functions because special STM8S instruction set.
* - Output latched regardless of the pad setting.
* - Direct read of input pads regardless of the pad setting.
* .
- * @section stm8_pal_3 Supported PAL setup modes
- * The STM8 PAL driver supports the following I/O modes:
+ * @section stm8s_pal_3 Supported PAL setup modes
+ * The STM8S PAL driver supports the following I/O modes:
* - @p PAL_MODE_RESET.
* - @p PAL_MODE_UNCONNECTED.
* - @p PAL_MODE_INPUT.
@@ -75,50 +74,50 @@
* .
* Any attempt to setup an invalid mode is ignored.
*
- * @section stm8_pal_4 Suboptimal behavior
- * The STM8 GPIO is less than optimal in several areas, the limitations
+ * @section stm8s_pal_4 Suboptimal behavior
+ * The STM8S GPIO is less than optimal in several areas, the limitations
* should be taken in account while using the PAL driver:
* - Bus/group writing is not atomic.
* - Pad/group mode setup is not atomic.
* .
- * @ingroup STM8
+ * @ingroup STM8S
*/
/**
- * @defgroup STM8_SPI STM8 SPI Support
- * @details The SPI driver supports the STM8 SPI peripheral in an interrupt
+ * @defgroup STM8S_SPI STM8S SPI Support
+ * @details The SPI driver supports the STM8S SPI peripheral in an interrupt
* driven implementation.
* @note Being the SPI a fast peripheral, much care must be taken to
* not saturate the CPU bandwidth with an excessive IRQ rate. The
* maximum transfer bit rate is likely limited by the IRQ
* handling.
*
- * @section stm8_spi_1 Supported HW resources
+ * @section stm8s_spi_1 Supported HW resources
* - SPI.
* .
- * @section stm8_spi_2 STM8 SPI driver implementation features
+ * @section stm8s_spi_2 STM8S SPI driver implementation features
* - Clock stop for reduced power usage when the driver is in stop state.
* - Fully interrupt driven.
* .
- * @ingroup STM8
+ * @ingroup STM8S
*/
/**
- * @defgroup STM8_SERIAL STM8 UART Support (buffered)
- * @details The STM8 Serial driver uses the UART peripherals in a
+ * @defgroup STM8S_SERIAL STM8S UART Support (buffered)
+ * @details The STM8S Serial driver uses the UART peripherals in a
* buffered, interrupt driven, implementation.
*
- * @section stm8_serial_1 Supported HW resources
+ * @section stm8s_serial_1 Supported HW resources
* The serial driver can support any of the following hardware resources:
* - UART1.
* - UART2 (where present).
* - UART3 (where present).
* .
- * @section stm8_serial_2 STM8 Serial driver implementation features
+ * @section stm8s_serial_2 STM8S Serial driver implementation features
* - Clock stop for reduced power usage when the driver is in stop state.
* - Each UART can be independently enabled and programmed. Unused
* peripherals are left in low power mode.
* - Fully interrupt driven.
* .
- * @ingroup STM8
+ * @ingroup STM8S
*/
diff --git a/os/hal/platforms/STM8/serial_lld.c b/os/hal/platforms/STM8/serial_lld.c
index 06f2f482b..d7ccfc70a 100644
--- a/os/hal/platforms/STM8/serial_lld.c
+++ b/os/hal/platforms/STM8/serial_lld.c
@@ -18,8 +18,8 @@
*/
/**
- * @file STM8/serial_lld.c
- * @brief STM8 low level serial driver code.
+ * @file STM8S/serial_lld.c
+ * @brief STM8S low level serial driver code.
*
* @addtogroup SERIAL
* @{
@@ -37,21 +37,21 @@
/**
* @brief UART1 serial driver identifier.
*/
-#if STM8_SERIAL_USE_UART1 || defined(__DOXYGEN__)
+#if STM8S_SERIAL_USE_UART1 || defined(__DOXYGEN__)
SerialDriver SD1;
#endif
/**
* @brief UART2 serial driver identifier.
*/
-#if STM8_SERIAL_USE_UART2 || defined(__DOXYGEN__)
+#if STM8S_SERIAL_USE_UART2 || defined(__DOXYGEN__)
SerialDriver SD2;
#endif
/**
* @brief UART3 serial driver identifier.
*/
-#if STM8_SERIAL_USE_UART3 || defined(__DOXYGEN__)
+#if STM8S_SERIAL_USE_UART3 || defined(__DOXYGEN__)
SerialDriver SD3;
#endif
@@ -63,7 +63,7 @@ SerialDriver SD3;
* @brief Driver default configuration.
*/
static ROMCONST SerialConfig default_config = {
- BBR(SERIAL_DEFAULT_BITRATE),
+ BRR(SERIAL_DEFAULT_BITRATE),
SD_MODE_PARITY_NONE | SD_MODE_STOP_1
};
@@ -89,7 +89,7 @@ static void set_error(SerialDriver *sdp, uint8_t sr) {
chSysUnlockFromIsr();
}
-#if STM8_SERIAL_USE_UART1 || defined(__DOXYGEN__)
+#if STM8S_SERIAL_USE_UART1 || defined(__DOXYGEN__)
static void notify1(void) {
UART1->CR2 |= UART1_CR2_TIEN;
@@ -128,9 +128,9 @@ static void uart1_deinit(void) {
UART1->CR5 = 0;
UART1->PSCR = 0;
}
-#endif /* STM8_SERIAL_USE_UART1 */
+#endif /* STM8S_SERIAL_USE_UART1 */
-#if STM8_SERIAL_USE_UART2 || defined(__DOXYGEN__)
+#if STM8S_SERIAL_USE_UART2 || defined(__DOXYGEN__)
static void notify2(void) {
UART2->CR2 |= UART2_CR2_TIEN;
@@ -171,9 +171,9 @@ static void uart2_deinit(void) {
UART2->CR6 = 0;
UART2->PSCR = 0;
}
-#endif /* STM8_SERIAL_USE_UART1 */
+#endif /* STM8S_SERIAL_USE_UART1 */
-#if STM8_SERIAL_USE_UART3 || defined(__DOXYGEN__)
+#if STM8S_SERIAL_USE_UART3 || defined(__DOXYGEN__)
static void notify3(void) {
UART3->CR2 |= UART3_CR2_TIEN;
@@ -210,13 +210,13 @@ static void uart3_deinit(void) {
UART3->CR4 = 0;
UART3->CR6 = 0;
}
-#endif /* STM8_SERIAL_USE_UART3 */
+#endif /* STM8S_SERIAL_USE_UART3 */
/*===========================================================================*/
/* Driver interrupt handlers. */
/*===========================================================================*/
-#if STM8_SERIAL_USE_UART1 || defined(__DOXYGEN__)
+#if STM8S_SERIAL_USE_UART1 || defined(__DOXYGEN__)
/**
* @brief IRQ 17 service routine.
*
@@ -257,9 +257,9 @@ CH_IRQ_HANDLER(18) {
CH_IRQ_EPILOGUE();
}
-#endif /* STM8_SERIAL_USE_UART1 */
+#endif /* STM8S_SERIAL_USE_UART1 */
-#if STM8_SERIAL_USE_UART2 || defined(__DOXYGEN__)
+#if STM8S_SERIAL_USE_UART2 || defined(__DOXYGEN__)
/**
* @brief IRQ 20 service routine.
*
@@ -300,9 +300,9 @@ CH_IRQ_HANDLER(21) {
CH_IRQ_EPILOGUE();
}
-#endif /* STM8_SERIAL_USE_UART2 */
+#endif /* STM8S_SERIAL_USE_UART2 */
-#if STM8_SERIAL_USE_UART3 || defined(__DOXYGEN__)
+#if STM8S_SERIAL_USE_UART3 || defined(__DOXYGEN__)
/**
* @brief IRQ 20 service routine.
*
@@ -343,7 +343,7 @@ CH_IRQ_HANDLER(21) {
CH_IRQ_EPILOGUE();
}
-#endif /* STM8_SERIAL_USE_UART3 */
+#endif /* STM8S_SERIAL_USE_UART3 */
/*===========================================================================*/
/* Driver exported functions. */
@@ -356,19 +356,19 @@ CH_IRQ_HANDLER(21) {
*/
void sd_lld_init(void) {
-#if STM8_SERIAL_USE_UART1
+#if STM8S_SERIAL_USE_UART1
sdObjectInit(&SD1, NULL, notify1);
CLK->PCKENR1 |= CLK_PCKENR1_UART1; /* PCKEN12, clock source. */
UART1->CR1 = UART1_CR1_UARTD; /* UARTD (low power). */
#endif
-#if STM8_SERIAL_USE_UART2
+#if STM8S_SERIAL_USE_UART2
sdObjectInit(&SD2, NULL, notify2);
CLK->PCKENR1 |= CLK_PCKENR1_UART2; /* PCKEN13, clock source. */
UART2->CR1 = UART2_CR1_UARTD; /* UARTD (low power). */
#endif
-#if STM8_SERIAL_USE_UART3
+#if STM8S_SERIAL_USE_UART3
sdObjectInit(&SD3, NULL, notify3);
CLK->PCKENR1 |= CLK_PCKENR1_UART3; /* PCKEN13, clock source. */
UART3->CR1 = UART3_CR1_UARTD; /* UARTD (low power). */
@@ -390,19 +390,19 @@ void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) {
if (config == NULL)
config = &default_config;
-#if STM8_SERIAL_USE_UART1
+#if STM8S_SERIAL_USE_UART1
if (&SD1 == sdp) {
uart1_init(config);
return;
}
#endif
-#if STM8_SERIAL_USE_UART2
+#if STM8S_SERIAL_USE_UART2
if (&SD2 == sdp) {
uart2_init(config);
return;
}
#endif
-#if STM8_SERIAL_USE_UART3
+#if STM8S_SERIAL_USE_UART3
if (&SD3 == sdp) {
uart3_init(config);
return;
@@ -421,19 +421,19 @@ void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) {
*/
void sd_lld_stop(SerialDriver *sdp) {
-#if STM8_SERIAL_USE_UART1
+#if STM8S_SERIAL_USE_UART1
if (&SD1 == sdp) {
uart1_deinit();
return;
}
#endif
-#if STM8_SERIAL_USE_UART2
+#if STM8S_SERIAL_USE_UART2
if (&SD2 == sdp) {
uart2_deinit();
return;
}
#endif
-#if STM8_SERIAL_USE_UART3
+#if STM8S_SERIAL_USE_UART3
if (&SD3 == sdp) {
uart3_deinit();
return;
diff --git a/os/hal/platforms/STM8/serial_lld.h b/os/hal/platforms/STM8/serial_lld.h
index fe6b9bcaa..62329225a 100644
--- a/os/hal/platforms/STM8/serial_lld.h
+++ b/os/hal/platforms/STM8/serial_lld.h
@@ -18,8 +18,8 @@
*/
/**
- * @file STM8/serial_lld.h
- * @brief STM8 low level serial driver header.
+ * @file STM8S/serial_lld.h
+ * @brief STM8S low level serial driver header.
*
* @addtogroup SERIAL
* @{
@@ -53,8 +53,8 @@
* @details If set to @p TRUE the support for UART1 is included.
* @note The default is @p TRUE.
*/
-#if !defined(STM8_SERIAL_USE_UART1) || defined(__DOXYGEN__)
-#define STM8_SERIAL_USE_UART1 TRUE
+#if !defined(STM8S_SERIAL_USE_UART1) || defined(__DOXYGEN__)
+#define STM8S_SERIAL_USE_UART1 TRUE
#endif
/**
@@ -62,8 +62,8 @@
* @details If set to @p TRUE the support for UART3 is included.
* @note The default is @p TRUE.
*/
-#if !defined(STM8_SERIAL_USE_UART2) || defined(__DOXYGEN__)
-#define STM8_SERIAL_USE_UART2 TRUE
+#if !defined(STM8S_SERIAL_USE_UART2) || defined(__DOXYGEN__)
+#define STM8S_SERIAL_USE_UART2 TRUE
#endif
/**
@@ -71,16 +71,16 @@
* @details If set to @p TRUE the support for UART3 is included.
* @note The default is @p TRUE.
*/
-#if !defined(STM8_SERIAL_USE_UART3) || defined(__DOXYGEN__)
-#define STM8_SERIAL_USE_UART3 TRUE
+#if !defined(STM8S_SERIAL_USE_UART3) || defined(__DOXYGEN__)
+#define STM8S_SERIAL_USE_UART3 TRUE
#endif
/*===========================================================================*/
/* Derived constants and error checks. */
/*===========================================================================*/
-#if STM8_SERIAL_USE_UART2 && STM8_SERIAL_USE_UART3
-#error "STM8 UART2 and UART3 cannot be used together"
+#if STM8S_SERIAL_USE_UART2 && STM8S_SERIAL_USE_UART3
+#error "STM8S UART2 and UART3 cannot be used together"
#endif
/*===========================================================================*/
@@ -146,13 +146,13 @@ typedef struct {
/* External declarations. */
/*===========================================================================*/
-#if STM8_SERIAL_USE_UART1 && !defined(__DOXYGEN__)
+#if STM8S_SERIAL_USE_UART1 && !defined(__DOXYGEN__)
extern SerialDriver SD1;
#endif
-#if STM8_SERIAL_USE_UART2 && !defined(__DOXYGEN__)
+#if STM8S_SERIAL_USE_UART2 && !defined(__DOXYGEN__)
extern SerialDriver SD2;
#endif
-#if STM8_SERIAL_USE_UART3 && !defined(__DOXYGEN__)
+#if STM8S_SERIAL_USE_UART3 && !defined(__DOXYGEN__)
extern SerialDriver SD3;
#endif
diff --git a/os/hal/platforms/STM8/spi_lld.c b/os/hal/platforms/STM8/spi_lld.c
index 4accd6cd0..c950f0bd4 100644
--- a/os/hal/platforms/STM8/spi_lld.c
+++ b/os/hal/platforms/STM8/spi_lld.c
@@ -18,8 +18,8 @@
*/
/**
- * @file STM8/spi_lld.c
- * @brief STM8 low level SPI driver code.
+ * @file STM8S/spi_lld.c
+ * @brief STM8S low level SPI driver code.
*
* @addtogroup SPI
* @{
@@ -34,7 +34,7 @@
/* Driver exported variables. */
/*===========================================================================*/
-#if STM8_SPI_USE_SPI || defined(__DOXYGEN__)
+#if STM8S_SPI_USE_SPI || defined(__DOXYGEN__)
/** @brief SPI1 driver identifier.*/
SPIDriver SPID1;
#endif
@@ -51,7 +51,7 @@ SPIDriver SPID1;
/* Driver interrupt handlers. */
/*===========================================================================*/
-#if STM8_SPI_USE_SPI || defined(__DOXYGEN__)
+#if STM8S_SPI_USE_SPI || defined(__DOXYGEN__)
/**
* @brief IRQ 10 service routine.
*
@@ -64,7 +64,7 @@ CH_IRQ_HANDLER(10) {
if ((SPI->SR & SPI_SR_OVR) != 0) {
/* The overflow condition should never happen because priority is given
to receive but a hook macro is provided anyway...*/
- STM8_SPI_ERROR_HOOK(&SPID1);
+ STM8S_SPI_ERROR_HOOK(&SPID1);
}
/* Handling the DR register like it is a FIFO with depth>1 in order to
handle the case where a frame arrives immediately after reading the
@@ -111,9 +111,9 @@ exit_isr:
*/
void spi_lld_init(void) {
-#if STM8_SPI_USE_SPI
+#if STM8S_SPI_USE_SPI
spiObjectInit(&SPID1);
-#endif /* STM8_SPI_USE_SPI */
+#endif /* STM8S_SPI_USE_SPI */
}
/**
diff --git a/os/hal/platforms/STM8/spi_lld.h b/os/hal/platforms/STM8/spi_lld.h
index a1b56694e..e4a963d67 100644
--- a/os/hal/platforms/STM8/spi_lld.h
+++ b/os/hal/platforms/STM8/spi_lld.h
@@ -43,23 +43,23 @@
* @details If set to @p TRUE the support for device SSP0 is included.
* @note The default is @p TRUE.
*/
-#if !defined(STM8_SPI_USE_SPI) || defined(__DOXYGEN__)
-#define STM8_SPI_USE_SPI TRUE
+#if !defined(STM8S_SPI_USE_SPI) || defined(__DOXYGEN__)
+#define STM8S_SPI_USE_SPI TRUE
#endif
/**
* @brief Overflow error hook.
* @details The default action is to stop the system.
*/
-#if !defined(STM8_SPI_SPI_ERROR_HOOK) || defined(__DOXYGEN__)
-#define STM8_SPI_ERROR_HOOK(spip) chSysHalt()
+#if !defined(STM8S_SPI_SPI_ERROR_HOOK) || defined(__DOXYGEN__)
+#define STM8S_SPI_ERROR_HOOK(spip) chSysHalt()
#endif
/*===========================================================================*/
/* Derived constants and error checks. */
/*===========================================================================*/
-#if !STM8_SPI_USE_SPI
+#if !STM8S_SPI_USE_SPI
#error "SPI driver activated but no SPI peripheral assigned"
#endif
@@ -164,7 +164,7 @@ struct SPIDriver {
/* External declarations. */
/*===========================================================================*/
-#if STM8_SPI_USE_SPI && !defined(__DOXYGEN__)
+#if STM8S_SPI_USE_SPI && !defined(__DOXYGEN__)
extern SPIDriver SPID1;
#endif
diff --git a/os/ports/GCC/ARMCMx/LPC11xx/port.mk b/os/ports/GCC/ARMCMx/LPC11xx/port.mk
index f8411ddf8..9055c8895 100644
--- a/os/ports/GCC/ARMCMx/LPC11xx/port.mk
+++ b/os/ports/GCC/ARMCMx/LPC11xx/port.mk
@@ -1,5 +1,6 @@
# List of the ChibiOS/RT Cortex-M0 LPC11xx port files.
-PORTSRC = ${CHIBIOS}/os/ports/GCC/ARMCMx/chcore.c \
+PORTSRC = $(CHIBIOS)/os/ports/GCC/ARMCMx/LPC11xx/vectors.c \
+ ${CHIBIOS}/os/ports/GCC/ARMCMx/chcore.c \
${CHIBIOS}/os/ports/GCC/ARMCMx/chcore_v6m.c \
${CHIBIOS}/os/ports/GCC/ARMCMx/nvic.c \
${CHIBIOS}/os/ports/GCC/ARMCMx/cmsis/core_cm0.c
diff --git a/os/ports/GCC/ARMCMx/LPC13xx/port.mk b/os/ports/GCC/ARMCMx/LPC13xx/port.mk
index 7448e1f93..15ed65c04 100644
--- a/os/ports/GCC/ARMCMx/LPC13xx/port.mk
+++ b/os/ports/GCC/ARMCMx/LPC13xx/port.mk
@@ -1,5 +1,6 @@
# List of the ChibiOS/RT Cortex-M0 LPC13xx port files.
-PORTSRC = ${CHIBIOS}/os/ports/GCC/ARMCMx/chcore.c \
+PORTSRC = $(CHIBIOS)/os/ports/GCC/ARMCMx/LPC13xx/vectors.c \
+ ${CHIBIOS}/os/ports/GCC/ARMCMx/chcore.c \
${CHIBIOS}/os/ports/GCC/ARMCMx/chcore_v7m.c \
${CHIBIOS}/os/ports/GCC/ARMCMx/nvic.c \
${CHIBIOS}/os/ports/GCC/ARMCMx/cmsis/core_cm3.c
diff --git a/os/ports/GCC/ARMCMx/STM32/vectors.c b/os/ports/GCC/ARMCMx/STM32/vectors.c
index 0b5521348..59bad352b 100644
--- a/os/ports/GCC/ARMCMx/STM32/vectors.c
+++ b/os/ports/GCC/ARMCMx/STM32/vectors.c
@@ -274,4 +274,5 @@ void _unhandled_exception(void) {
while (TRUE)
;
}
+
/** @} */
diff --git a/readme.txt b/readme.txt
index 3c399ac53..400e8d16b 100644
--- a/readme.txt
+++ b/readme.txt
@@ -31,15 +31,15 @@
| | | +--MSP430/ - Drivers for MSP430 platform.
| | | +--SPC56x/ - Drivers for SPC56x/MPC563xx platforms.
| | | +--STM32/ - Drivers for STM32 platform.
- | | | +--STM8/ - Drivers for STM8 platform.
+ | | | +--STM8S/ - Drivers for STM8S platform.
+ | | | +--STM8L/ - Drivers for STM8L platform.
| | | +--Posix/ - Drivers for x86 Linux/OSX simulator platform.
| | | +--Win32/ - Drivers for x86 Win32 simulator platform.
| | +--templates/ - Driver template files.
| | +--meta/ - Driver meta templates.
| +--ports/ - Port files for the various architectures.
| | +--GCC/ - Ports for the GCC compiler.
- | | | +--ARM/ - Port files for generic ARM architecture.
- | | | +--ARM7/ - Port files for ARM7 architecture.
+ | | | +--ARM/ - Port files for ARM7 and ARM9 architectures.
| | | +--ARMCM3/ - Port files for ARMCMx architectures (ARMv6/7-M).
| | | +--PPC/ - Port files for PowerPC architecture.
| | | +--AVR/ - Port files for AVR architecture.
@@ -79,7 +79,11 @@
the board layer because it is related to the board initialization.
- CHANGE: Removed the various assembler files for the STM32 interrupt
vectors, now it is a single vectors.c file.
-- Added SPI driver to the STM8 documentation, it was missing.
+- CHANGE: Deleted ./os/ports/GCC/ARM.
+- CHANGE: Renamed ./os/ports/GCC/ARM7 in ./os/ports/GCC/ARM. Now the port is
+ meant for ARM9 too (requires more testing).
+- CHANGE: Renamed ./os/hal/platforms/STM8 in ./os/hal/platforms/STM8S.
+- Added SPI driver to the STM8S documentation, it was missing.
*** 2.1.3 ***
- FIX: Fixed broken STM32 synchronous UART driver (bug 3100946).