diff options
| -rw-r--r-- | demos/ARMCM3-STM32F407-DISCOVERY/iar/ch.ewp | 2256 | ||||
| -rw-r--r-- | demos/ARMCM3-STM32F407-DISCOVERY/iar/ch.eww | 10 | ||||
| -rw-r--r-- | demos/ARMCM3-STM32F407-DISCOVERY/iar/ch.icf | 39 | ||||
| -rw-r--r-- | os/ports/IAR/ARMCMx/STM32F4xx/cmparams.h | 57 | ||||
| -rw-r--r-- | os/ports/IAR/ARMCMx/STM32F4xx/vectors.s | 337 |
5 files changed, 2699 insertions, 0 deletions
diff --git a/demos/ARMCM3-STM32F407-DISCOVERY/iar/ch.ewp b/demos/ARMCM3-STM32F407-DISCOVERY/iar/ch.ewp new file mode 100644 index 000000000..cf9763bbe --- /dev/null +++ b/demos/ARMCM3-STM32F407-DISCOVERY/iar/ch.ewp @@ -0,0 +1,2256 @@ +<?xml version="1.0" encoding="iso-8859-1"?>
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+ <name>IlinkLogAutoLibSelect</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogRedirSymbols</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogUnusedFragments</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkCrcReverseByteOrder</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkCrcUseAsInput</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkOptInline</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkOptExceptionsAllow</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkOptExceptionsForce</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkCmsis</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkOptMergeDuplSections</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkOptUseVfe</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkOptForceVfe</name>
+ <state>0</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>IARCHIVE</name>
+ <archiveVersion>0</archiveVersion>
+ <data>
+ <version>0</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>IarchiveInputs</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IarchiveOverride</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IarchiveOutput</name>
+ <state>###Unitialized###</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>BILINK</name>
+ <archiveVersion>0</archiveVersion>
+ <data/>
+ </settings>
+ </configuration>
+ <configuration>
+ <name>Release</name>
+ <toolchain>
+ <name>ARM</name>
+ </toolchain>
+ <debug>0</debug>
+ <settings>
+ <name>General</name>
+ <archiveVersion>3</archiveVersion>
+ <data>
+ <version>21</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>0</debug>
+ <option>
+ <name>ExePath</name>
+ <state>Release\Exe</state>
+ </option>
+ <option>
+ <name>ObjPath</name>
+ <state>Release\Obj</state>
+ </option>
+ <option>
+ <name>ListPath</name>
+ <state>Release\List</state>
+ </option>
+ <option>
+ <name>Variant</name>
+ <version>19</version>
+ <state>38</state>
+ </option>
+ <option>
+ <name>GEndianMode</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>Input variant</name>
+ <version>3</version>
+ <state>6</state>
+ </option>
+ <option>
+ <name>Input description</name>
+ <state>No specifier n, no float nor long long, no scan set, no assignment suppressing.</state>
+ </option>
+ <option>
+ <name>Output variant</name>
+ <version>2</version>
+ <state>7</state>
+ </option>
+ <option>
+ <name>Output description</name>
+ <state>No specifier a, A, no specifier n, no float nor long long, no flags.</state>
+ </option>
+ <option>
+ <name>GOutputBinary</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>FPU</name>
+ <version>2</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGCoreOrChip</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>GRuntimeLibSelect</name>
+ <version>0</version>
+ <state>1</state>
+ </option>
+ <option>
+ <name>GRuntimeLibSelectSlave</name>
+ <version>0</version>
+ <state>1</state>
+ </option>
+ <option>
+ <name>RTDescription</name>
+ <state>Use the normal configuration of the C/C++ runtime library. No locale interface, C locale, no file descriptor support, no multibytes in printf and scanf, and no hex floats in strtod.</state>
+ </option>
+ <option>
+ <name>OGProductVersion</name>
+ <state>5.10.0.159</state>
+ </option>
+ <option>
+ <name>OGLastSavedByProductVersion</name>
+ <state>6.21.4.52945</state>
+ </option>
+ <option>
+ <name>GeneralEnableMisra</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GeneralMisraVerbose</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGChipSelectEditMenu</name>
+ <state>STM32F4xxx ST STM32F4xxx</state>
+ </option>
+ <option>
+ <name>GenLowLevelInterface</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GEndianModeBE</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OGBufferedTerminalOutput</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GenStdoutInterface</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GeneralMisraRules98</name>
+ <version>0</version>
+ <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+ </option>
+ <option>
+ <name>GeneralMisraVer</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GeneralMisraRules04</name>
+ <version>0</version>
+ <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
+ </option>
+ <option>
+ <name>RTConfigPath2</name>
+ <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Normal.h</state>
+ </option>
+ <option>
+ <name>GFPUCoreSlave</name>
+ <version>19</version>
+ <state>38</state>
+ </option>
+ <option>
+ <name>GBECoreSlave</name>
+ <version>19</version>
+ <state>38</state>
+ </option>
+ <option>
+ <name>OGUseCmsis</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGUseCmsisDspLib</name>
+ <state>0</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>ICCARM</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>28</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>0</debug>
+ <option>
+ <name>CCDefines</name>
+ <state>NDEBUG</state>
+ </option>
+ <option>
+ <name>CCPreprocFile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCPreprocComments</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCPreprocLine</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCListCFile</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCListCMnemonics</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCListCMessages</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCListAssFile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCListAssSource</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCEnableRemarks</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCDiagSuppress</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCDiagRemark</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCDiagWarning</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCDiagError</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCObjPrefix</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCAllowList</name>
+ <version>1</version>
+ <state>1111111</state>
+ </option>
+ <option>
+ <name>CCDebugInfo</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IEndianMode</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IProcessor</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IExtraOptionsCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IExtraOptions</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCLangConformance</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCSignedPlainChar</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCRequirePrototypes</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCMultibyteSupport</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCDiagWarnAreErr</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCCompilerRuntimeInfo</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IFpuProcessor</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OutputFile</name>
+ <state>$FILE_BNAME$.o</state>
+ </option>
+ <option>
+ <name>CCLibConfigHeader</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>PreInclude</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CompilerMisraOverride</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCIncludePath2</name>
+ <state>$PROJ_DIR$\..\</state>
+ <state>$PROJ_DIR$\..\..\..\os\kernel\include</state>
+ <state>$PROJ_DIR$\..\..\..\os\ports\common\ARMCMx\CMSIS\include</state>
+ <state>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx</state>
+ <state>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\STM32F4xx</state>
+ <state>$PROJ_DIR$\..\..\..\os\hal\include</state>
+ <state>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32</state>
+ <state>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\DMAv1</state>
+ <state>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\GPIOv2</state>
+ <state>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32F4xx</state>
+ <state>$PROJ_DIR$\..\..\..\boards\ST_STM32F4_DISCOVERY</state>
+ <state>$PROJ_DIR$\..\..\..\test</state>
+ </option>
+ <option>
+ <name>CCStdIncCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCCodeSection</name>
+ <state>.text</state>
+ </option>
+ <option>
+ <name>IInterwork2</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IProcessorMode2</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCOptLevel</name>
+ <state>3</state>
+ </option>
+ <option>
+ <name>CCOptStrategy</name>
+ <version>0</version>
+ <state>2</state>
+ </option>
+ <option>
+ <name>CCOptLevelSlave</name>
+ <state>3</state>
+ </option>
+ <option>
+ <name>CompilerMisraRules98</name>
+ <version>0</version>
+ <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+ </option>
+ <option>
+ <name>CompilerMisraRules04</name>
+ <version>0</version>
+ <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
+ </option>
+ <option>
+ <name>CCPosIndRopi</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCPosIndRwpi</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCPosIndNoDynInit</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IccLang</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IccCDialect</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IccAllowVLA</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IccCppDialect</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IccExceptions</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IccRTTI</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IccStaticDestr</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IccCppInlineSemantics</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IccCmsis</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IccFloatSemantics</name>
+ <state>0</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>AARM</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>8</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>0</debug>
+ <option>
+ <name>AObjPrefix</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>AEndian</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>ACaseSensitivity</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>MacroChars</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AWarnEnable</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AWarnWhat</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AWarnOne</name>
+ <state></state>
+ </option>
+ <option>
+ <name>AWarnRange1</name>
+ <state></state>
+ </option>
+ <option>
+ <name>AWarnRange2</name>
+ <state></state>
+ </option>
+ <option>
+ <name>ADebug</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AltRegisterNames</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>ADefines</name>
+ <state></state>
+ </option>
+ <option>
+ <name>AList</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>AListHeader</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>AListing</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>Includes</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>MacDefs</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>MacExps</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>MacExec</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OnlyAssed</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>MultiLine</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>PageLengthCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>PageLength</name>
+ <state>80</state>
+ </option>
+ <option>
+ <name>TabSpacing</name>
+ <state>8</state>
+ </option>
+ <option>
+ <name>AXRef</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AXRefDefines</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AXRefInternal</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AXRefDual</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AProcessor</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>AFpuProcessor</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>AOutputFile</name>
+ <state>$FILE_BNAME$.o</state>
+ </option>
+ <option>
+ <name>AMultibyteSupport</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>ALimitErrorsCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>ALimitErrorsEdit</name>
+ <state>100</state>
+ </option>
+ <option>
+ <name>AIgnoreStdInclude</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AUserIncludes</name>
+ <state>$PROJ_DIR$\..</state>
+ <state>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\STM32F4xx</state>
+ <state>$PROJ_DIR$\..\..\..\boards\ST_STM32F4_DISCOVERY</state>
+ </option>
+ <option>
+ <name>AExtraOptionsCheckV2</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AExtraOptionsV2</name>
+ <state></state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>OBJCOPY</name>
+ <archiveVersion>0</archiveVersion>
+ <data>
+ <version>1</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>0</debug>
+ <option>
+ <name>OOCOutputFormat</name>
+ <version>2</version>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OCOutputOverride</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OOCOutputFile</name>
+ <state>ch.hex</state>
+ </option>
+ <option>
+ <name>OOCCommandLineProducer</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OOCObjCopyEnable</name>
+ <state>1</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>CUSTOM</name>
+ <archiveVersion>3</archiveVersion>
+ <data>
+ <extensions></extensions>
+ <cmdline></cmdline>
+ </data>
+ </settings>
+ <settings>
+ <name>BICOMP</name>
+ <archiveVersion>0</archiveVersion>
+ <data/>
+ </settings>
+ <settings>
+ <name>BUILDACTION</name>
+ <archiveVersion>1</archiveVersion>
+ <data>
+ <prebuild></prebuild>
+ <postbuild></postbuild>
+ </data>
+ </settings>
+ <settings>
+ <name>ILINK</name>
+ <archiveVersion>0</archiveVersion>
+ <data>
+ <version>13</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>0</debug>
+ <option>
+ <name>IlinkOutputFile</name>
+ <state>ch.out</state>
+ </option>
+ <option>
+ <name>IlinkLibIOConfig</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>XLinkMisraHandler</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkInputFileSlave</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkDebugInfoEnable</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkKeepSymbols</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkRawBinaryFile</name>
+ <state></state>
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+ <option>
+ <name>IlinkRawBinarySymbol</name>
+ <state></state>
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+ <option>
+ <name>IlinkRawBinarySegment</name>
+ <state></state>
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+ <name>IlinkRawBinaryAlign</name>
+ <state></state>
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+ <option>
+ <name>IlinkDefines</name>
+ <state></state>
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+ <option>
+ <name>IlinkConfigDefines</name>
+ <state></state>
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+ <option>
+ <name>IlinkMapFile</name>
+ <state>1</state>
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+ <option>
+ <name>IlinkLogFile</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkLogInitialization</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkLogModule</name>
+ <state>1</state>
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+ <option>
+ <name>IlinkLogSection</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkLogVeneer</name>
+ <state>1</state>
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+ <option>
+ <name>IlinkIcfOverride</name>
+ <state>1</state>
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+ <option>
+ <name>IlinkIcfFile</name>
+ <state>$PROJ_DIR$\ch.icf</state>
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+ <option>
+ <name>IlinkIcfFileSlave</name>
+ <state></state>
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+ <option>
+ <name>IlinkEnableRemarks</name>
+ <state>0</state>
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+ <option>
+ <name>IlinkSuppressDiags</name>
+ <state></state>
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+ <option>
+ <name>IlinkTreatAsRem</name>
+ <state></state>
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+ <name>IlinkTreatAsWarn</name>
+ <state></state>
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+ <name>IlinkTreatAsErr</name>
+ <state></state>
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+ <option>
+ <name>IlinkWarningsAreErrors</name>
+ <state>0</state>
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+ <option>
+ <name>IlinkUseExtraOptions</name>
+ <state>0</state>
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+ <option>
+ <name>IlinkExtraOptions</name>
+ <state></state>
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+ <option>
+ <name>IlinkLowLevelInterfaceSlave</name>
+ <state>1</state>
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+ <option>
+ <name>IlinkAutoLibEnable</name>
+ <state>1</state>
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+ <option>
+ <name>IlinkAdditionalLibs</name>
+ <state></state>
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+ <option>
+ <name>IlinkOverrideProgramEntryLabel</name>
+ <state>0</state>
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+ <option>
+ <name>IlinkProgramEntryLabelSelect</name>
+ <state>0</state>
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+ <option>
+ <name>IlinkProgramEntryLabel</name>
+ <state>__iar_program_start</state>
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+ <name>FillerByte</name>
+ <state>0xFF</state>
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+ <state>1</state>
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+ <state>1</state>
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+ <name>CrcPoly</name>
+ <state>0x11021</state>
+ </option>
+ <option>
+ <name>CrcCompl</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CrcBitOrder</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CrcInitialValue</name>
+ <state>0x0</state>
+ </option>
+ <option>
+ <name>DoCrc</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkBE8Slave</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkBufferedTerminalOutput</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkStdoutInterfaceSlave</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CrcFullSize</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkIElfToolPostProcess</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogAutoLibSelect</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkLogRedirSymbols</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkLogUnusedFragments</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkCrcReverseByteOrder</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkCrcUseAsInput</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkOptInline</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkOptExceptionsAllow</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkOptExceptionsForce</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkCmsis</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkOptMergeDuplSections</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkOptUseVfe</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkOptForceVfe</name>
+ <state>0</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>IARCHIVE</name>
+ <archiveVersion>0</archiveVersion>
+ <data>
+ <version>0</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>0</debug>
+ <option>
+ <name>IarchiveInputs</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IarchiveOverride</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IarchiveOutput</name>
+ <state>###Unitialized###</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>BILINK</name>
+ <archiveVersion>0</archiveVersion>
+ <data/>
+ </settings>
+ </configuration>
+ <group>
+ <name>board</name>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\boards\ST_STM32F4_DISCOVERY\board.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\boards\ST_STM32F4_DISCOVERY\board.h</name>
+ </file>
+ </group>
+ <group>
+ <name>os</name>
+ <group>
+ <name>hal</name>
+ <group>
+ <name>include</name>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\include\adc.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\include\can.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\include\ext.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\include\gpt.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\include\hal.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\include\i2c.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\include\icu.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\include\mac.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\include\mii.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\include\mmc_spi.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\include\pal.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\include\pwm.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\include\rtc.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\include\sdc.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\include\serial.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\include\serial_usb.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\include\spi.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\include\uart.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\include\usb.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\include\usb_cdc.h</name>
+ </file>
+ </group>
+ <group>
+ <name>src</name>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\src\adc.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\src\can.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\src\ext.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\src\gpt.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\src\hal.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\src\i2c.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\src\icu.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\src\mac.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\src\mmc_spi.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\src\pal.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\src\pwm.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\src\rtc.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\src\sdc.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\src\serial.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\src\serial_usb.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\src\spi.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\src\uart.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\src\usb.c</name>
+ </file>
+ </group>
+ </group>
+ <group>
+ <name>kernel</name>
+ <group>
+ <name>include</name>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\include\ch.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\include\chcond.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\include\chdebug.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\include\chdynamic.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\include\chevents.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\include\chheap.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\include\chinline.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\include\chioch.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\include\chlists.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\include\chmboxes.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\include\chmemcore.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\include\chmempools.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\include\chmsg.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\include\chmtx.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\include\chqueues.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\include\chregistry.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\include\chschd.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\include\chsem.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\include\chstreams.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\include\chsys.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\include\chthreads.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\include\chvt.h</name>
+ </file>
+ </group>
+ <group>
+ <name>src</name>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\src\chcond.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\src\chdebug.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\src\chdynamic.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\src\chevents.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\src\chheap.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\src\chlists.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\src\chmboxes.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\src\chmemcore.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\src\chmempools.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\src\chmsg.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\src\chmtx.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\src\chqueues.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\src\chregistry.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\src\chschd.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\src\chsem.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\src\chsys.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\src\chthreads.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\src\chvt.c</name>
+ </file>
+ </group>
+ </group>
+ <group>
+ <name>platform</name>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32F4xx\hal_lld.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32F4xx\hal_lld.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\GPIOv2\pal_lld.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\GPIOv2\pal_lld.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\pwm_lld.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\pwm_lld.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\serial_lld.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\serial_lld.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\spi_lld.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\spi_lld.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32F4xx\stm32_dma.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32F4xx\stm32_dma.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32F4xx\stm32_rcc.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32F4xx\stm32f4xx.h</name>
+ </file>
+ </group>
+ <group>
+ <name>port</name>
+ <group>
+ <name>STM32F4xx</name>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\STM32F4xx\cmparams.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\STM32F4xx\vectors.s</name>
+ </file>
+ </group>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\chcore.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\chcore.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\chcore_v7m.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\chcore_v7m.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\chcoreasm_v7m.s</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\chtypes.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\cstartup.s</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\nvic.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\nvic.h</name>
+ </file>
+ </group>
+ </group>
+ <group>
+ <name>test</name>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\test\test.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\test\test.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\test\testbmk.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\test\testbmk.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\test\testdyn.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\test\testdyn.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\test\testevt.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\test\testevt.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\test\testheap.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\test\testheap.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\test\testmbox.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\test\testmbox.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\test\testmsg.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\test\testmsg.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\test\testmtx.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\test\testmtx.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\test\testpools.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\test\testpools.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\test\testqueues.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\test\testqueues.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\test\testsem.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\test\testsem.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\test\testthd.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\test\testthd.h</name>
+ </file>
+ </group>
+ <file>
+ <name>$PROJ_DIR$\..\chconf.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\halconf.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\main.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\mcuconf.h</name>
+ </file>
+</project>
+
+
diff --git a/demos/ARMCM3-STM32F407-DISCOVERY/iar/ch.eww b/demos/ARMCM3-STM32F407-DISCOVERY/iar/ch.eww new file mode 100644 index 000000000..f9b3b2000 --- /dev/null +++ b/demos/ARMCM3-STM32F407-DISCOVERY/iar/ch.eww @@ -0,0 +1,10 @@ +<?xml version="1.0" encoding="iso-8859-1"?>
+
+<workspace>
+ <project>
+ <path>$WS_DIR$\ch.ewp</path>
+ </project>
+ <batchBuild/>
+</workspace>
+
+
diff --git a/demos/ARMCM3-STM32F407-DISCOVERY/iar/ch.icf b/demos/ARMCM3-STM32F407-DISCOVERY/iar/ch.icf new file mode 100644 index 000000000..c0a51f44c --- /dev/null +++ b/demos/ARMCM3-STM32F407-DISCOVERY/iar/ch.icf @@ -0,0 +1,39 @@ +/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF;
+define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__ = 0x2001FFFF;
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__ = 0x400;
+/**** End of ICF editor section. ###ICF###*/
+
+/* Size of the IRQ Stack (Main Stack).*/
+define symbol __ICFEDIT_size_irqstack__ = 0x400;
+
+define memory mem with size = 4G;
+define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
+define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
+
+define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ {section CSTACK};
+define block IRQSTACK with alignment = 8, size = __ICFEDIT_size_irqstack__ {};
+define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ {};
+define block SYSHEAP with alignment = 8 {section SYSHEAP};
+define block DATABSS with alignment = 8 {readwrite, zeroinit};
+
+initialize by copy { readwrite };
+do not initialize { section .noinit };
+
+keep { section .intvec };
+
+place at address mem:__ICFEDIT_intvec_start__ {section .intvec};
+place in ROM_region {readonly};
+place at start of RAM_region {block IRQSTACK};
+place in RAM_region {block DATABSS, block HEAP};
+place in RAM_region {block SYSHEAP};
+place at end of RAM_region {block CSTACK};
diff --git a/os/ports/IAR/ARMCMx/STM32F4xx/cmparams.h b/os/ports/IAR/ARMCMx/STM32F4xx/cmparams.h new file mode 100644 index 000000000..733c952d5 --- /dev/null +++ b/os/ports/IAR/ARMCMx/STM32F4xx/cmparams.h @@ -0,0 +1,57 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
+ 2011 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file IAR/ARMCMx/STM32F4xx/cmparams.h
+ * @brief ARM Cortex-M3 parameters for the STM32F4xx.
+ *
+ * @defgroup IAR_ARMCMx_STM32F4xx STM32F4xx Specific Parameters
+ * @ingroup IAR_ARMCMx_SPECIFIC
+ * @details This file contains the Cortex-M3 specific parameters for the
+ * STM32F4xx platform.
+ * @{
+ */
+
+#ifndef _CMPARAMS_H_
+#define _CMPARAMS_H_
+
+/**
+ * @brief Cortex core model.
+ */
+#define CORTEX_MODEL CORTEX_M3
+
+/**
+ * @brief Systick unit presence.
+ */
+#define CORTEX_HAS_ST TRUE
+
+/**
+ * @brief Memory Protection unit presence.
+ */
+#define CORTEX_HAS_MPU TRUE
+
+/**
+ * @brief Number of bits in priority masks.
+ */
+#define CORTEX_PRIORITY_BITS 4
+
+#endif /* _CMPARAMS_H_ */
+
+/** @} */
diff --git a/os/ports/IAR/ARMCMx/STM32F4xx/vectors.s b/os/ports/IAR/ARMCMx/STM32F4xx/vectors.s new file mode 100644 index 000000000..a24773b42 --- /dev/null +++ b/os/ports/IAR/ARMCMx/STM32F4xx/vectors.s @@ -0,0 +1,337 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
+ 2011 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+ MODULE ?vectors
+
+ AAPCS INTERWORK, VFP_COMPATIBLE, RWPI_COMPATIBLE
+ PRESERVE8
+
+ SECTION IRQSTACK:DATA:NOROOT(3)
+ SECTION .intvec:CODE:NOROOT(3)
+
+ EXTERN __iar_program_start
+ PUBLIC __vector_table
+
+ DATA
+
+__vector_table:
+ DCD SFE(IRQSTACK)
+ DCD __iar_program_start
+ DCD NMIVector
+ DCD HardFaultVector
+ DCD MemManageVector
+ DCD BusFaultVector
+ DCD UsageFaultVector
+ DCD Vector1C
+ DCD Vector20
+ DCD Vector24
+ DCD Vector28
+ DCD SVCallVector
+ DCD DebugMonitorVector
+ DCD Vector34
+ DCD PendSVVector
+ DCD SysTickVector
+ DCD Vector40
+ DCD Vector44
+ DCD Vector48
+ DCD Vector4C
+ DCD Vector50
+ DCD Vector54
+ DCD Vector58
+ DCD Vector5C
+ DCD Vector60
+ DCD Vector64
+ DCD Vector68
+ DCD Vector6C
+ DCD Vector70
+ DCD Vector74
+ DCD Vector78
+ DCD Vector7C
+ DCD Vector80
+ DCD Vector84
+ DCD Vector88
+ DCD Vector8C
+ DCD Vector90
+ DCD Vector94
+ DCD Vector98
+ DCD Vector9C
+ DCD VectorA0
+ DCD VectorA4
+ DCD VectorA8
+ DCD VectorAC
+ DCD VectorB0
+ DCD VectorB4
+ DCD VectorB8
+ DCD VectorBC
+ DCD VectorC0
+ DCD VectorC4
+ DCD VectorC8
+ DCD VectorCC
+ DCD VectorD0
+ DCD VectorD4
+ DCD VectorD8
+ DCD VectorDC
+ DCD VectorE0
+ DCD VectorE4
+ DCD VectorE8
+ DCD VectorEC
+ DCD VectorF0
+ DCD VectorF4
+ DCD VectorF8
+ DCD VectorFC
+ DCD Vector100
+ DCD Vector104
+ DCD Vector108
+ DCD Vector10C
+ DCD Vector110
+ DCD Vector114
+ DCD Vector118
+ DCD Vector11C
+ DCD Vector120
+ DCD Vector124
+ DCD Vector128
+ DCD Vector12C
+ DCD Vector130
+ DCD Vector134
+ DCD Vector138
+ DCD Vector13C
+ DCD Vector140
+ DCD Vector144
+ DCD Vector148
+ DCD Vector14C
+ DCD Vector150
+ DCD Vector154
+ DCD Vector158
+ DCD Vector15C
+ DCD Vector160
+ DCD Vector164
+ DCD Vector168
+ DCD Vector16C
+ DCD Vector170
+ DCD Vector174
+ DCD Vector178
+ DCD Vector17C
+ DCD Vector180
+ DCD Vector184
+
+/*
+ * Default interrupt handlers.
+ */
+ PUBWEAK NMIVector
+ PUBWEAK HardFaultVector
+ PUBWEAK MemManageVector
+ PUBWEAK BusFaultVector
+ PUBWEAK UsageFaultVector
+ PUBWEAK Vector1C
+ PUBWEAK Vector20
+ PUBWEAK Vector24
+ PUBWEAK Vector28
+ PUBWEAK SVCallVector
+ PUBWEAK DebugMonitorVector
+ PUBWEAK Vector34
+ PUBWEAK PendSVVector
+ PUBWEAK SysTickVector
+ PUBWEAK Vector40
+ PUBWEAK Vector44
+ PUBWEAK Vector48
+ PUBWEAK Vector4C
+ PUBWEAK Vector50
+ PUBWEAK Vector54
+ PUBWEAK Vector58
+ PUBWEAK Vector5C
+ PUBWEAK Vector60
+ PUBWEAK Vector64
+ PUBWEAK Vector68
+ PUBWEAK Vector6C
+ PUBWEAK Vector70
+ PUBWEAK Vector74
+ PUBWEAK Vector78
+ PUBWEAK Vector7C
+ PUBWEAK Vector80
+ PUBWEAK Vector84
+ PUBWEAK Vector88
+ PUBWEAK Vector8C
+ PUBWEAK Vector90
+ PUBWEAK Vector94
+ PUBWEAK Vector98
+ PUBWEAK Vector9C
+ PUBWEAK VectorA0
+ PUBWEAK VectorA4
+ PUBWEAK VectorA8
+ PUBWEAK VectorAC
+ PUBWEAK VectorB0
+ PUBWEAK VectorB4
+ PUBWEAK VectorB8
+ PUBWEAK VectorBC
+ PUBWEAK VectorC0
+ PUBWEAK VectorC4
+ PUBWEAK VectorC8
+ PUBWEAK VectorCC
+ PUBWEAK VectorD0
+ PUBWEAK VectorD4
+ PUBWEAK VectorD8
+ PUBWEAK VectorDC
+ PUBWEAK VectorE0
+ PUBWEAK VectorE4
+ PUBWEAK VectorE8
+ PUBWEAK VectorEC
+ PUBWEAK VectorF0
+ PUBWEAK VectorF4
+ PUBWEAK VectorF8
+ PUBWEAK VectorFC
+ PUBWEAK Vector100
+ PUBWEAK Vector104
+ PUBWEAK Vector108
+ PUBWEAK Vector10C
+ PUBWEAK Vector110
+ PUBWEAK Vector114
+ PUBWEAK Vector118
+ PUBWEAK Vector11C
+ PUBWEAK Vector120
+ PUBWEAK Vector124
+ PUBWEAK Vector128
+ PUBWEAK Vector12C
+ PUBWEAK Vector130
+ PUBWEAK Vector134
+ PUBWEAK Vector138
+ PUBWEAK Vector13C
+ PUBWEAK Vector140
+ PUBWEAK Vector144
+ PUBWEAK Vector148
+ PUBWEAK Vector14C
+ PUBWEAK Vector150
+ PUBWEAK Vector154
+ PUBWEAK Vector158
+ PUBWEAK Vector15C
+ PUBWEAK Vector160
+ PUBWEAK Vector164
+ PUBWEAK Vector168
+ PUBWEAK Vector16C
+ PUBWEAK Vector170
+ PUBWEAK Vector174
+ PUBWEAK Vector178
+ PUBWEAK Vector17C
+ PUBWEAK Vector180
+ PUBWEAK Vector184
+ PUBLIC _unhandled_exception
+
+ SECTION .text:CODE:REORDER(1)
+ THUMB
+
+NMIVector
+HardFaultVector
+MemManageVector
+BusFaultVector
+UsageFaultVector
+Vector1C
+Vector20
+Vector24
+Vector28
+SVCallVector
+DebugMonitorVector
+Vector34
+PendSVVector
+SysTickVector
+Vector40
+Vector44
+Vector48
+Vector4C
+Vector50
+Vector54
+Vector58
+Vector5C
+Vector60
+Vector64
+Vector68
+Vector6C
+Vector70
+Vector74
+Vector78
+Vector7C
+Vector80
+Vector84
+Vector88
+Vector8C
+Vector90
+Vector94
+Vector98
+Vector9C
+VectorA0
+VectorA4
+VectorA8
+VectorAC
+VectorB0
+VectorB4
+VectorB8
+VectorBC
+VectorC0
+VectorC4
+VectorC8
+VectorCC
+VectorD0
+VectorD4
+VectorD8
+VectorDC
+VectorE0
+VectorE4
+VectorE8
+VectorEC
+VectorF0
+VectorF4
+VectorF8
+VectorFC
+Vector100
+Vector104
+Vector108
+Vector10C
+Vector110
+Vector114
+Vector118
+Vector11C
+Vector120
+Vector124
+Vector128
+Vector12C
+Vector130
+Vector134
+Vector138
+Vector13C
+Vector140
+Vector144
+Vector148
+Vector14C
+Vector150
+Vector154
+Vector158
+Vector15C
+Vector160
+Vector164
+Vector168
+Vector16C
+Vector170
+Vector174
+Vector178
+Vector17C
+Vector180
+Vector184
+_unhandled_exception
+ b _unhandled_exception
+
+ END
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