aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
Diffstat
-rw-r--r--boards/ST_STM32L_DISCOVERY/board.h58
-rw-r--r--demos/ARMCM3-STM32F100-DISCOVERY/keil/ch.uvproj20
-rw-r--r--demos/ARMCM3-STM32F107/keil/ch.uvproj20
-rw-r--r--demos/ARMCM3-STM32L152-DISCOVERY/keil/ch.uvproj980
-rw-r--r--docs/reports/STM32F100-24-RVCT.txt35
-rw-r--r--docs/reports/STM32L152-32-RVCT.txt165
-rw-r--r--readme.txt1
7 files changed, 1214 insertions, 65 deletions
diff --git a/boards/ST_STM32L_DISCOVERY/board.h b/boards/ST_STM32L_DISCOVERY/board.h
index 46e2965fd..f91998a59 100644
--- a/boards/ST_STM32L_DISCOVERY/board.h
+++ b/boards/ST_STM32L_DISCOVERY/board.h
@@ -56,35 +56,35 @@
* in the initialization code.
* Please refer to the STM32 Reference Manual for details.
*/
-#define PIN_MODE_INPUT(n) (0 << ((n) * 2))
-#define PIN_MODE_OUTPUT(n) (1 << ((n) * 2))
-#define PIN_MODE_ALTERNATE(n) (2 << ((n) * 2))
-#define PIN_MODE_ANALOG(n) (3 << ((n) * 2))
-#define PIN_OTYPE_PUSHPULL(n) (0 << (n))
-#define PIN_OTYPE_OPENDRAIN(n) (1 << (n))
-#define PIN_OSPEED_400K(n) (0 << ((n) * 2))
-#define PIN_OSPEED_2M(n) (1 << ((n) * 2))
-#define PIN_OSPEED_10M(n) (2 << ((n) * 2))
-#define PIN_OSPEED_40M(n) (3 << ((n) * 2))
-#define PIN_PUDR_FLOATING(n) (0 << ((n) * 2))
-#define PIN_PUDR_PULLUP(n) (1 << ((n) * 2))
-#define PIN_PUDR_PULLDOWN(n) (2 << ((n) * 2))
-#define PIN_AFIO_AF0(n) (0 << ((n % 8) * 4))
-#define PIN_AFIO_AF1(n) (1 << ((n % 8) * 4))
-#define PIN_AFIO_AF2(n) (2 << ((n % 8) * 4))
-#define PIN_AFIO_AF3(n) (3 << ((n % 8) * 4))
-#define PIN_AFIO_AF4(n) (4 << ((n % 8) * 4))
-#define PIN_AFIO_AF5(n) (5 << ((n % 8) * 4))
-#define PIN_AFIO_AF6(n) (6 << ((n % 8) * 4))
-#define PIN_AFIO_AF7(n) (7 << ((n % 8) * 4))
-#define PIN_AFIO_AF8(n) (8 << ((n % 8) * 4))
-#define PIN_AFIO_AF9(n) (9 << ((n % 8) * 4))
-#define PIN_AFIO_AF10(n) (10 << ((n % 8) * 4))
-#define PIN_AFIO_AF11(n) (11 << ((n % 8) * 4))
-#define PIN_AFIO_AF12(n) (12 << ((n % 8) * 4))
-#define PIN_AFIO_AF13(n) (13 << ((n % 8) * 4))
-#define PIN_AFIO_AF14(n) (14 << ((n % 8) * 4))
-#define PIN_AFIO_AF15(n) (15 << ((n % 8) * 4))
+#define PIN_MODE_INPUT(n) (0U << ((n) * 2))
+#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2))
+#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2))
+#define PIN_MODE_ANALOG(n) (3U << ((n) * 2))
+#define PIN_OTYPE_PUSHPULL(n) (0U << (n))
+#define PIN_OTYPE_OPENDRAIN(n) (1U << (n))
+#define PIN_OSPEED_400K(n) (0U << ((n) * 2))
+#define PIN_OSPEED_2M(n) (1U << ((n) * 2))
+#define PIN_OSPEED_10M(n) (2U << ((n) * 2))
+#define PIN_OSPEED_40M(n) (3U << ((n) * 2))
+#define PIN_PUDR_FLOATING(n) (0U << ((n) * 2))
+#define PIN_PUDR_PULLUP(n) (1U << ((n) * 2))
+#define PIN_PUDR_PULLDOWN(n) (2U << ((n) * 2))
+#define PIN_AFIO_AF0(n) (0U << ((n % 8) * 4))
+#define PIN_AFIO_AF1(n) (1U << ((n % 8) * 4))
+#define PIN_AFIO_AF2(n) (2U << ((n % 8) * 4))
+#define PIN_AFIO_AF3(n) (3U << ((n % 8) * 4))
+#define PIN_AFIO_AF4(n) (4U << ((n % 8) * 4))
+#define PIN_AFIO_AF5(n) (5U << ((n % 8) * 4))
+#define PIN_AFIO_AF6(n) (6U << ((n % 8) * 4))
+#define PIN_AFIO_AF7(n) (7U << ((n % 8) * 4))
+#define PIN_AFIO_AF8(n) (8U << ((n % 8) * 4))
+#define PIN_AFIO_AF9(n) (9U << ((n % 8) * 4))
+#define PIN_AFIO_AF10(n) (10U << ((n % 8) * 4))
+#define PIN_AFIO_AF11(n) (11U << ((n % 8) * 4))
+#define PIN_AFIO_AF12(n) (12U << ((n % 8) * 4))
+#define PIN_AFIO_AF13(n) (13U << ((n % 8) * 4))
+#define PIN_AFIO_AF14(n) (14U << ((n % 8) * 4))
+#define PIN_AFIO_AF15(n) (15U << ((n % 8) * 4))
/*
* Port A setup.
diff --git a/demos/ARMCM3-STM32F100-DISCOVERY/keil/ch.uvproj b/demos/ARMCM3-STM32F100-DISCOVERY/keil/ch.uvproj
index 723042027..7c66aa137 100644
--- a/demos/ARMCM3-STM32F100-DISCOVERY/keil/ch.uvproj
+++ b/demos/ARMCM3-STM32F100-DISCOVERY/keil/ch.uvproj
@@ -827,11 +827,6 @@
<FilePath>..\..\..\os\hal\platforms\STM32\spi_lld.c</FilePath>
</File>
<File>
- <FileName>stm32_dma.c</FileName>
- <FileType>1</FileType>
- <FilePath>D:\Progetti\ChibiOS-RT\os\hal\platforms\STM32\DMAv1\stm32_dma.c</FilePath>
- </File>
- <File>
<FileName>uart_lld.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\uart_lld.c</FilePath>
@@ -877,11 +872,6 @@
<FilePath>..\..\..\os\hal\platforms\STM32\spi_lld.h</FilePath>
</File>
<File>
- <FileName>stm32_dma.h</FileName>
- <FileType>5</FileType>
- <FilePath>D:\Progetti\ChibiOS-RT\os\hal\platforms\STM32\DMAv1\stm32_dma.h</FilePath>
- </File>
- <File>
<FileName>stm32f10x.h</FileName>
<FileType>5</FileType>
<FilePath>D:\Progetti\ChibiOS-RT\os\hal\platforms\STM32F1xx\stm32f10x.h</FilePath>
@@ -891,6 +881,16 @@
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\uart_lld.h</FilePath>
</File>
+ <File>
+ <FileName>stm32_dma.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\os\hal\platforms\STM32F1xx\stm32_dma.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm32_dma.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\hal\platforms\STM32F1xx\stm32_dma.h</FilePath>
+ </File>
</Files>
</Group>
<Group>
diff --git a/demos/ARMCM3-STM32F107/keil/ch.uvproj b/demos/ARMCM3-STM32F107/keil/ch.uvproj
index 3600bb519..c68d0291f 100644
--- a/demos/ARMCM3-STM32F107/keil/ch.uvproj
+++ b/demos/ARMCM3-STM32F107/keil/ch.uvproj
@@ -877,16 +877,6 @@
<FilePath>..\..\..\os\hal\platforms\STM32\serial_lld.c</FilePath>
</File>
<File>
- <FileName>stm32_dma.h</FileName>
- <FileType>5</FileType>
- <FilePath>..\..\..\os\hal\platforms\STM32\DMAv1\stm32_dma.h</FilePath>
- </File>
- <File>
- <FileName>stm32_dma.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\..\os\hal\platforms\STM32\DMAv1\stm32_dma.c</FilePath>
- </File>
- <File>
<FileName>pal_lld.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\GPIOv1\pal_lld.h</FilePath>
@@ -931,6 +921,16 @@
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32F1xx\stm32_rcc.h</FilePath>
</File>
+ <File>
+ <FileName>stm32_dma.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\os\hal\platforms\STM32F1xx\stm32_dma.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm32_dma.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\hal\platforms\STM32F1xx\stm32_dma.h</FilePath>
+ </File>
</Files>
</Group>
<Group>
diff --git a/demos/ARMCM3-STM32L152-DISCOVERY/keil/ch.uvproj b/demos/ARMCM3-STM32L152-DISCOVERY/keil/ch.uvproj
new file mode 100644
index 000000000..1e43a6c18
--- /dev/null
+++ b/demos/ARMCM3-STM32L152-DISCOVERY/keil/ch.uvproj
@@ -0,0 +1,980 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_proj.xsd">
+
+ <SchemaVersion>1.1</SchemaVersion>
+
+ <Header>### uVision Project, (C) Keil Software</Header>
+
+ <Targets>
+ <Target>
+ <TargetName>Demo</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <TargetCommonOption>
+ <Device>STM32L152RB</Device>
+ <Vendor>STMicroelectronics</Vendor>
+ <Cpu>IRAM(0x20000000-0x20003FFF) IROM(0x8000000-0x801FFFF) CLOCK(8000000) CPUTYPE("Cortex-M3")</Cpu>
+ <FlashUtilSpec></FlashUtilSpec>
+ <StartupFile>"STARTUP\ST\STM32L1xx\startup_stm32l1xx_md.s" ("STM32L15xx Medium density Startup Code")</StartupFile>
+ <FlashDriverDll>ULP2CM3(-O207 -S8 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32L15x_128 -FS08000000 -FL020000)</FlashDriverDll>
+ <DeviceId>5248</DeviceId>
+ <RegisterFile>stm32l1xx.h</RegisterFile>
+ <MemoryEnv></MemoryEnv>
+ <Cmp></Cmp>
+ <Asm></Asm>
+ <Linker></Linker>
+ <OHString></OHString>
+ <InfinionOptionDll></InfinionOptionDll>
+ <SLE66CMisc></SLE66CMisc>
+ <SLE66AMisc></SLE66AMisc>
+ <SLE66LinkerMisc></SLE66LinkerMisc>
+ <SFDFile>SFD\ST\STM32L15x\STM32L15x.sfr</SFDFile>
+ <UseEnv>0</UseEnv>
+ <BinPath></BinPath>
+ <IncludePath></IncludePath>
+ <LibPath></LibPath>
+ <RegisterFilePath>ST\STM32L1xx\</RegisterFilePath>
+ <DBRegisterFilePath>ST\STM32L1xx\</DBRegisterFilePath>
+ <TargetStatus>
+ <Error>0</Error>
+ <ExitCodeStop>0</ExitCodeStop>
+ <ButtonStop>0</ButtonStop>
+ <NotGenerated>0</NotGenerated>
+ <InvalidFlash>1</InvalidFlash>
+ </TargetStatus>
+ <OutputDirectory>.\obj\</OutputDirectory>
+ <OutputName>ch</OutputName>
+ <CreateExecutable>1</CreateExecutable>
+ <CreateLib>0</CreateLib>
+ <CreateHexFile>0</CreateHexFile>
+ <DebugInformation>1</DebugInformation>
+ <BrowseInformation>1</BrowseInformation>
+ <ListingPath>.\lst\</ListingPath>
+ <HexFormatSelection>1</HexFormatSelection>
+ <Merge32K>0</Merge32K>
+ <CreateBatchFile>0</CreateBatchFile>
+ <BeforeCompile>
+ <RunUserProg1>0</RunUserProg1>
+ <RunUserProg2>0</RunUserProg2>
+ <UserProg1Name></UserProg1Name>
+ <UserProg2Name></UserProg2Name>
+ <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+ <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+ </BeforeCompile>
+ <BeforeMake>
+ <RunUserProg1>0</RunUserProg1>
+ <RunUserProg2>0</RunUserProg2>
+ <UserProg1Name></UserProg1Name>
+ <UserProg2Name></UserProg2Name>
+ <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+ <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+ </BeforeMake>
+ <AfterMake>
+ <RunUserProg1>0</RunUserProg1>
+ <RunUserProg2>0</RunUserProg2>
+ <UserProg1Name></UserProg1Name>
+ <UserProg2Name></UserProg2Name>
+ <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+ <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+ </AfterMake>
+ <SelectedForBatchBuild>0</SelectedForBatchBuild>
+ <SVCSIdString></SVCSIdString>
+ </TargetCommonOption>
+ <CommonProperty>
+ <UseCPPCompiler>0</UseCPPCompiler>
+ <RVCTCodeConst>0</RVCTCodeConst>
+ <RVCTZI>0</RVCTZI>
+ <RVCTOtherData>0</RVCTOtherData>
+ <ModuleSelection>0</ModuleSelection>
+ <IncludeInBuild>1</IncludeInBuild>
+ <AlwaysBuild>0</AlwaysBuild>
+ <GenerateAssemblyFile>0</GenerateAssemblyFile>
+ <AssembleAssemblyFile>0</AssembleAssemblyFile>
+ <PublicsOnly>0</PublicsOnly>
+ <StopOnExitCode>3</StopOnExitCode>
+ <CustomArgument></CustomArgument>
+ <IncludeLibraryModules></IncludeLibraryModules>
+ </CommonProperty>
+ <DllOption>
+ <SimDllName>SARMCM3.DLL</SimDllName>
+ <SimDllArguments></SimDllArguments>
+ <SimDlgDll>DCM.DLL</SimDlgDll>
+ <SimDlgDllArguments>-pCM3</SimDlgDllArguments>
+ <TargetDllName>SARMCM3.DLL</TargetDllName>
+ <TargetDllArguments></TargetDllArguments>
+ <TargetDlgDll>TCM.DLL</TargetDlgDll>
+ <TargetDlgDllArguments>-pCM3</TargetDlgDllArguments>
+ </DllOption>
+ <DebugOption>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ <Oh166RecLen>16</Oh166RecLen>
+ </OPTHX>
+ <Simulator>
+ <UseSimulator>0</UseSimulator>
+ <LoadApplicationAtStartup>1</LoadApplicationAtStartup>
+ <RunToMain>1</RunToMain>
+ <RestoreBreakpoints>1</RestoreBreakpoints>
+ <RestoreWatchpoints>1</RestoreWatchpoints>
+ <RestoreMemoryDisplay>1</RestoreMemoryDisplay>
+ <RestoreFunctions>1</RestoreFunctions>
+ <RestoreToolbox>1</RestoreToolbox>
+ <LimitSpeedToRealTime>0</LimitSpeedToRealTime>
+ </Simulator>
+ <Target>
+ <UseTarget>1</UseTarget>
+ <LoadApplicationAtStartup>1</LoadApplicationAtStartup>
+ <RunToMain>0</RunToMain>
+ <RestoreBreakpoints>1</RestoreBreakpoints>
+ <RestoreWatchpoints>1</RestoreWatchpoints>
+ <RestoreMemoryDisplay>1</RestoreMemoryDisplay>
+ <RestoreFunctions>0</RestoreFunctions>
+ <RestoreToolbox>1</RestoreToolbox>
+ </Target>
+ <RunDebugAfterBuild>0</RunDebugAfterBuild>
+ <TargetSelection>8</TargetSelection>
+ <SimDlls>
+ <CpuDll></CpuDll>
+ <CpuDllArguments></CpuDllArguments>
+ <PeripheralDll></PeripheralDll>
+ <PeripheralDllArguments></PeripheralDllArguments>
+ <InitializationFile></InitializationFile>
+ </SimDlls>
+ <TargetDlls>
+ <CpuDll></CpuDll>
+ <CpuDllArguments></CpuDllArguments>
+ <PeripheralDll></PeripheralDll>
+ <PeripheralDllArguments></PeripheralDllArguments>
+ <InitializationFile></InitializationFile>
+ <Driver>STLink\ST-LINKIII-KEIL.dll</Driver>
+ </TargetDlls>
+ </DebugOption>
+ <Utilities>
+ <Flash1>
+ <UseTargetDll>1</UseTargetDll>
+ <UseExternalTool>0</UseExternalTool>
+ <RunIndependent>0</RunIndependent>
+ <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+ <Capability>1</Capability>
+ <DriverSelection>4100</DriverSelection>
+ </Flash1>
+ <Flash2>STLink\ST-LINKIII-KEIL.dll</Flash2>
+ <Flash3></Flash3>
+ <Flash4></Flash4>
+ </Utilities>
+ <TargetArmAds>
+ <ArmAdsMisc>
+ <GenerateListings>0</GenerateListings>
+ <asHll>1</asHll>
+ <asAsm>1</asAsm>
+ <asMacX>1</asMacX>
+ <asSyms>1</asSyms>
+ <asFals>1</asFals>
+ <asDbgD>1</asDbgD>
+ <asForm>1</asForm>
+ <ldLst>0</ldLst>
+ <ldmm>1</ldmm>
+ <ldXref>1</ldXref>
+ <BigEnd>0</BigEnd>
+ <AdsALst>1</AdsALst>
+ <AdsACrf>1</AdsACrf>
+ <AdsANop>0</AdsANop>
+ <AdsANot>0</AdsANot>
+ <AdsLLst>1</AdsLLst>
+ <AdsLmap>1</AdsLmap>
+ <AdsLcgr>1</AdsLcgr>
+ <AdsLsym>1</AdsLsym>
+ <AdsLszi>1</AdsLszi>
+ <AdsLtoi>1</AdsLtoi>
+ <AdsLsun>1</AdsLsun>
+ <AdsLven>1</AdsLven>
+ <AdsLsxf>1</AdsLsxf>
+ <RvctClst>0</RvctClst>
+ <GenPPlst>0</GenPPlst>
+ <AdsCpuType>"Cortex-M3"</AdsCpuType>
+ <RvctDeviceName></RvctDeviceName>
+ <mOS>0</mOS>
+ <uocRom>0</uocRom>
+ <uocRam>0</uocRam>
+ <hadIROM>1</hadIROM>
+ <hadIRAM>1</hadIRAM>
+ <hadXRAM>0</hadXRAM>
+ <uocXRam>0</uocXRam>
+ <RvdsVP>0</RvdsVP>
+ <hadIRAM2>0</hadIRAM2>
+ <hadIROM2>0</hadIROM2>
+ <StupSel>8</StupSel>
+ <useUlib>0</useUlib>
+ <EndSel>0</EndSel>
+ <uLtcg>0</uLtcg>
+ <RoSelD>3</RoSelD>
+ <RwSelD>3</RwSelD>
+ <CodeSel>0</CodeSel>
+ <OptFeed>0</OptFeed>
+ <NoZi1>0</NoZi1>
+ <NoZi2>0</NoZi2>
+ <NoZi3>0</NoZi3>
+ <NoZi4>0</NoZi4>
+ <NoZi5>0</NoZi5>
+ <Ro1Chk>0</Ro1Chk>
+ <Ro2Chk>0</Ro2Chk>
+ <Ro3Chk>0</Ro3Chk>
+ <Ir1Chk>1</Ir1Chk>
+ <Ir2Chk>0</Ir2Chk>
+ <Ra1Chk>0</Ra1Chk>
+ <Ra2Chk>0</Ra2Chk>
+ <Ra3Chk>0</Ra3Chk>
+ <Im1Chk>1</Im1Chk>
+ <Im2Chk>1</Im2Chk>
+ <OnChipMemories>
+ <Ocm1>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm1>
+ <Ocm2>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm2>
+ <Ocm3>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm3>
+ <Ocm4>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm4>
+ <Ocm5>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm5>
+ <Ocm6>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm6>
+ <IRAM>
+ <Type>0</Type>
+ <StartAddress>0x20000000</StartAddress>
+ <Size>0x4000</Size>
+ </IRAM>
+ <IROM>
+ <Type>1</Type>
+ <StartAddress>0x8000000</StartAddress>
+ <Size>0x20000</Size>
+ </IROM>
+ <XRAM>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </XRAM>
+ <OCR_RVCT1>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT1>
+ <OCR_RVCT2>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT2>
+ <OCR_RVCT3>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT3>
+ <OCR_RVCT4>
+ <Type>1</Type>
+ <StartAddress>0x8000000</StartAddress>
+ <Size>0x20000</Size>
+ </OCR_RVCT4>
+ <OCR_RVCT5>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT5>
+ <OCR_RVCT6>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT6>
+ <OCR_RVCT7>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT7>
+ <OCR_RVCT8>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT8>
+ <OCR_RVCT9>
+ <Type>0</Type>
+ <StartAddress>0x20000000</StartAddress>
+ <Size>0x4000</Size>
+ </OCR_RVCT9>
+ <OCR_RVCT10>
+ <Type>0</Type>
+ <StartAddress>0x20004000</StartAddress>
+ <Size>0x1</Size>
+ </OCR_RVCT10>
+ </OnChipMemories>
+ <RvctStartVector></RvctStartVector>
+ </ArmAdsMisc>
+ <Cads>
+ <interw>1</interw>
+ <Optim>4</Optim>
+ <oTime>1</oTime>
+ <SplitLS>0</SplitLS>
+ <OneElfS>0</OneElfS>
+ <Strict>0</Strict>
+ <EnumInt>0</EnumInt>
+ <PlainCh>0</PlainCh>
+ <Ropi>0</Ropi>
+ <Rwpi>0</Rwpi>
+ <wLevel>0</wLevel>
+ <uThumb>0</uThumb>
+ <VariousControls>
+ <MiscControls></MiscControls>
+ <Define>__heap_base__=Image$$RW_IRAM1$$ZI$$Limit __heap_end__=Image$$RW_IRAM2$$Base</Define>
+ <Undefine></Undefine>
+ <IncludePath>..\;..\..\..\os\kernel\include;..\..\..\os\ports\RVCT\ARMCMx;..\..\..\os\ports\RVCT\ARMCMx\STM32L1xx;..\..\..\os\hal\include;..\..\..\os\hal\platforms\STM32;..\..\..\os\hal\platforms\STM32\GPIOv2;..\..\..\os\hal\platforms\STM32L1xx;..\..\..\boards\ST_STM32L_DISCOVERY;..\..\..\test</IncludePath>
+ </VariousControls>
+ </Cads>
+ <Aads>
+ <interw>1</interw>
+ <Ropi>0</Ropi>
+ <Rwpi>0</Rwpi>
+ <thumb>0</thumb>
+ <SplitLS>0</SplitLS>
+ <SwStkChk>0</SwStkChk>
+ <NoWarn>0</NoWarn>
+ <VariousControls>
+ <MiscControls>--cpreproc</MiscControls>
+ <Define></Define>
+ <Undefine></Undefine>
+ <IncludePath>..\;..\..\..\boards\ST_STM32L_DISCOVERY;..\..\..\os\ports\RVCT\ARMCMx\STM32L1xx</IncludePath>
+ </VariousControls>
+ </Aads>
+ <LDads>
+ <umfTarg>1</umfTarg>
+ <Ropi>0</Ropi>
+ <Rwpi>0</Rwpi>
+ <noStLib>0</noStLib>
+ <RepFail>1</RepFail>
+ <useFile>0</useFile>
+ <TextAddressRange>0x08000000</TextAddressRange>
+ <DataAddressRange>0x20000000</DataAddressRange>
+ <ScatterFile></ScatterFile>
+ <IncludeLibs></IncludeLibs>
+ <IncludeLibsPath></IncludeLibsPath>
+ <Misc></Misc>
+ <LinkerInputFile></LinkerInputFile>
+ <DisabledWarnings></DisabledWarnings>
+ </LDads>
+ </TargetArmAds>
+ </TargetOption>
+ <Groups>
+ <Group>
+ <GroupName>board</GroupName>
+ <Files>
+ <File>
+ <FileName>board.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\boards\ST_STM32L_DISCOVERY\board.c</FilePath>
+ </File>
+ <File>
+ <FileName>board.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\boards\ST_STM32L_DISCOVERY\board.h</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>port</GroupName>
+ <Files>
+ <File>
+ <FileName>cstartup.s</FileName>
+ <FileType>2</FileType>
+ <FilePath>..\..\..\os\ports\RVCT\ARMCMx\cstartup.s</FilePath>
+ </File>
+ <File>
+ <FileName>chcoreasm_v7m.s</FileName>
+ <FileType>2</FileType>
+ <FilePath>..\..\..\os\ports\RVCT\ARMCMx\chcoreasm_v7m.s</FilePath>
+ </File>
+ <File>
+ <FileName>chcore.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\os\ports\RVCT\ARMCMx\chcore.c</FilePath>
+ </File>
+ <File>
+ <FileName>chcore_v7m.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\os\ports\RVCT\ARMCMx\chcore_v7m.c</FilePath>
+ </File>
+ <File>
+ <FileName>nvic.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\os\ports\RVCT\ARMCMx\nvic.c</FilePath>
+ </File>
+ <File>
+ <FileName>chcore.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\ports\RVCT\ARMCMx\chcore.h</FilePath>
+ </File>
+ <File>
+ <FileName>chcore_v7m.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\ports\RVCT\ARMCMx\chcore_v7m.h</FilePath>
+ </File>
+ <File>
+ <FileName>chtypes.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\ports\RVCT\ARMCMx\chtypes.h</FilePath>
+ </File>
+ <File>
+ <FileName>nvic.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\ports\RVCT\ARMCMx\nvic.h</FilePath>
+ </File>
+ <File>
+ <FileName>cmparams.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\ports\RVCT\ARMCMx\STM32L1xx\cmparams.h</FilePath>
+ </File>
+ <File>
+ <FileName>vectors.s</FileName>
+ <FileType>2</FileType>
+ <FilePath>..\..\..\os\ports\RVCT\ARMCMx\STM32L1xx\vectors.s</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>kernel</GroupName>
+ <Files>
+ <File>
+ <FileName>chcond.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\os\kernel\src\chcond.c</FilePath>
+ </File>
+ <File>
+ <FileName>chdebug.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\os\kernel\src\chdebug.c</FilePath>
+ </File>
+ <File>
+ <FileName>chdynamic.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\os\kernel\src\chdynamic.c</FilePath>
+ </File>
+ <File>
+ <FileName>chevents.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\os\kernel\src\chevents.c</FilePath>
+ </File>
+ <File>
+ <FileName>chheap.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\os\kernel\src\chheap.c</FilePath>
+ </File>
+ <File>
+ <FileName>chlists.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\os\kernel\src\chlists.c</FilePath>
+ </File>
+ <File>
+ <FileName>chmboxes.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\os\kernel\src\chmboxes.c</FilePath>
+ </File>
+ <File>
+ <FileName>chmemcore.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\os\kernel\src\chmemcore.c</FilePath>
+ </File>
+ <File>
+ <FileName>chmempools.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\os\kernel\src\chmempools.c</FilePath>
+ </File>
+ <File>
+ <FileName>chmsg.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\os\kernel\src\chmsg.c</FilePath>
+ </File>
+ <File>
+ <FileName>chmtx.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\os\kernel\src\chmtx.c</FilePath>
+ </File>
+ <File>
+ <FileName>chqueues.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\os\kernel\src\chqueues.c</FilePath>
+ </File>
+ <File>
+ <FileName>chregistry.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\os\kernel\src\chregistry.c</FilePath>
+ </File>
+ <File>
+ <FileName>chschd.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\os\kernel\src\chschd.c</FilePath>
+ </File>
+ <File>
+ <FileName>chsem.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\os\kernel\src\chsem.c</FilePath>
+ </File>
+ <File>
+ <FileName>chsys.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\os\kernel\src\chsys.c</FilePath>
+ </File>
+ <File>
+ <FileName>chthreads.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\os\kernel\src\chthreads.c</FilePath>
+ </File>
+ <File>
+ <FileName>chvt.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\os\kernel\src\chvt.c</FilePath>
+ </File>
+ <File>
+ <FileName>ch.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\kernel\include\ch.h</FilePath>
+ </File>
+ <File>
+ <FileName>chbsem.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\kernel\include\chbsem.h</FilePath>
+ </File>
+ <File>
+ <FileName>chcond.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\kernel\include\chcond.h</FilePath>
+ </File>
+ <File>
+ <FileName>chdebug.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\kernel\include\chdebug.h</FilePath>
+ </File>
+ <File>
+ <FileName>chdynamic.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\kernel\include\chdynamic.h</FilePath>
+ </File>
+ <File>
+ <FileName>chevents.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\kernel\include\chevents.h</FilePath>
+ </File>
+ <File>
+ <FileName>chfiles.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\kernel\include\chfiles.h</FilePath>
+ </File>
+ <File>
+ <FileName>chheap.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\kernel\include\chheap.h</FilePath>
+ </File>
+ <File>
+ <FileName>chinline.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\kernel\include\chinline.h</FilePath>
+ </File>
+ <File>
+ <FileName>chioch.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\kernel\include\chioch.h</FilePath>
+ </File>
+ <File>
+ <FileName>chlists.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\kernel\include\chlists.h</FilePath>
+ </File>
+ <File>
+ <FileName>chmboxes.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\kernel\include\chmboxes.h</FilePath>
+ </File>
+ <File>
+ <FileName>chmemcore.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\kernel\include\chmemcore.h</FilePath>
+ </File>
+ <File>
+ <FileName>chmempools.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\kernel\include\chmempools.h</FilePath>
+ </File>
+ <File>
+ <FileName>chmsg.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\kernel\include\chmsg.h</FilePath>
+ </File>
+ <File>
+ <FileName>chmtx.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\kernel\include\chmtx.h</FilePath>
+ </File>
+ <File>
+ <FileName>chqueues.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\kernel\include\chqueues.h</FilePath>
+ </File>
+ <File>
+ <FileName>chregistry.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\kernel\include\chregistry.h</FilePath>
+ </File>
+ <File>
+ <FileName>chschd.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\kernel\include\chschd.h</FilePath>
+ </File>
+ <File>
+ <FileName>chsem.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\kernel\include\chsem.h</FilePath>
+ </File>
+ <File>
+ <FileName>chstreams.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\kernel\include\chstreams.h</FilePath>
+ </File>
+ <File>
+ <FileName>chsys.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\kernel\include\chsys.h</FilePath>
+ </File>
+ <File>
+ <FileName>chthreads.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\kernel\include\chthreads.h</FilePath>
+ </File>
+ <File>
+ <FileName>chvt.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\kernel\include\chvt.h</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>hal</GroupName>
+ <Files>
+ <File>
+ <FileName>adc.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\os\hal\src\adc.c</FilePath>
+ </File>
+ <File>
+ <FileName>hal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\os\hal\src\hal.c</FilePath>
+ </File>
+ <File>
+ <FileName>pal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\os\hal\src\pal.c</FilePath>
+ </File>
+ <File>
+ <FileName>pwm.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\os\hal\src\pwm.c</FilePath>
+ </File>
+ <File>
+ <FileName>serial.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\os\hal\src\serial.c</FilePath>
+ </File>
+ <File>
+ <FileName>spi.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\os\hal\src\spi.c</FilePath>
+ </File>
+ <File>
+ <FileName>adc.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\hal\include\adc.h</FilePath>
+ </File>
+ <File>
+ <FileName>hal.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\hal\include\hal.h</FilePath>
+ </File>
+ <File>
+ <FileName>pal.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\hal\include\pal.h</FilePath>
+ </File>
+ <File>
+ <FileName>pwm.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\hal\include\pwm.h</FilePath>
+ </File>
+ <File>
+ <FileName>serial.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\hal\include\serial.h</FilePath>
+ </File>
+ <File>
+ <FileName>spi.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\hal\include\spi.h</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>platform</GroupName>
+ <Files>
+ <File>
+ <FileName>adc_lld.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\os\hal\platforms\STM32L1xx\adc_lld.c</FilePath>
+ </File>
+ <File>
+ <FileName>adc_lld.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\hal\platforms\STM32L1xx\adc_lld.h</FilePath>
+ </File>
+ <File>
+ <FileName>hal_lld.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\os\hal\platforms\STM32L1xx\hal_lld.c</FilePath>
+ </File>
+ <File>
+ <FileName>hal_lld.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\hal\platforms\STM32L1xx\hal_lld.h</FilePath>
+ </File>
+ <File>
+ <FileName>pal_lld.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\os\hal\platforms\STM32\GPIOv2\pal_lld.c</FilePath>
+ </File>
+ <File>
+ <FileName>pal_lld.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\hal\platforms\STM32\GPIOv2\pal_lld.h</FilePath>
+ </File>
+ <File>
+ <FileName>pwm_lld.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\os\hal\platforms\STM32\pwm_lld.c</FilePath>
+ </File>
+ <File>
+ <FileName>pwm_lld.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\hal\platforms\STM32\pwm_lld.h</FilePath>
+ </File>
+ <File>
+ <FileName>serial_lld.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\os\hal\platforms\STM32\serial_lld.c</FilePath>
+ </File>
+ <File>
+ <FileName>spi_lld.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\hal\platforms\STM32\spi_lld.h</FilePath>
+ </File>
+ <File>
+ <FileName>spi_lld.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\os\hal\platforms\STM32\spi_lld.c</FilePath>
+ </File>
+ <File>
+ <FileName>serial_lld.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\hal\platforms\STM32\serial_lld.h</FilePath>
+ </File>
+ <File>
+ <FileName>stm32_dma.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\os\hal\platforms\STM32L1xx\stm32_dma.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm32_dma.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\hal\platforms\STM32L1xx\stm32_dma.h</FilePath>
+ </File>
+ <File>
+ <FileName>stm32_rcc.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\hal\platforms\STM32L1xx\stm32_rcc.h</FilePath>
+ </File>
+ <File>
+ <FileName>stm32l1xx.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\hal\platforms\STM32L1xx\stm32l1xx.h</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>test</GroupName>
+ <Files>
+ <File>
+ <FileName>test.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\test\test.c</FilePath>
+ </File>
+ <File>
+ <FileName>testbmk.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\test\testbmk.c</FilePath>
+ </File>
+ <File>
+ <FileName>testdyn.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\test\testdyn.c</FilePath>
+ </File>
+ <File>
+ <FileName>testevt.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\test\testevt.c</FilePath>
+ </File>
+ <File>
+ <FileName>testheap.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\test\testheap.c</FilePath>
+ </File>
+ <File>
+ <FileName>testmbox.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\test\testmbox.c</FilePath>
+ </File>
+ <File>
+ <FileName>testmsg.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\test\testmsg.c</FilePath>
+ </File>
+ <File>
+ <FileName>testmtx.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\test\testmtx.c</FilePath>
+ </File>
+ <File>
+ <FileName>testpools.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\test\testpools.c</FilePath>
+ </File>
+ <File>
+ <FileName>testqueues.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\test\testqueues.c</FilePath>
+ </File>
+ <File>
+ <FileName>testsem.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\test\testsem.c</FilePath>
+ </File>
+ <File>
+ <FileName>testthd.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\test\testthd.c</FilePath>
+ </File>
+ <File>
+ <FileName>test.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\test\test.h</FilePath>
+ </File>
+ <File>
+ <FileName>testbmk.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\test\testbmk.h</FilePath>
+ </File>
+ <File>
+ <FileName>testdyn.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\test\testdyn.h</FilePath>
+ </File>
+ <File>
+ <FileName>testevt.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\test\testevt.h</FilePath>
+ </File>
+ <File>
+ <FileName>testheap.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\test\testheap.h</FilePath>
+ </File>
+ <File>
+ <FileName>testmbox.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\test\testmbox.h</FilePath>
+ </File>
+ <File>
+ <FileName>testmsg.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\test\testmsg.h</FilePath>
+ </File>
+ <File>
+ <FileName>testmtx.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\test\testmtx.h</FilePath>
+ </File>
+ <File>
+ <FileName>testpools.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\test\testpools.h</FilePath>
+ </File>
+ <File>
+ <FileName>testqueues.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\test\testqueues.h</FilePath>
+ </File>
+ <File>
+ <FileName>testsem.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\test\testsem.h</FilePath>
+ </File>
+ <File>
+ <FileName>testthd.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\test\testthd.h</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>demo</GroupName>
+ <Files>
+ <File>
+ <FileName>main.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\main.c</FilePath>
+ </File>
+ <File>
+ <FileName>mcuconf.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\mcuconf.h</FilePath>
+ </File>
+ <File>
+ <FileName>chconf.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\chconf.h</FilePath>
+ </File>
+ <File>
+ <FileName>halconf.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\halconf.h</FilePath>
+ </File>
+ </Files>
+ </Group>
+ </Groups>
+ </Target>
+ </Targets>
+
+</Project>
diff --git a/docs/reports/STM32F100-24-RVCT.txt b/docs/reports/STM32F100-24-RVCT.txt
index 29fcd3156..cde37b57c 100644
--- a/docs/reports/STM32F100-24-RVCT.txt
+++ b/docs/reports/STM32F100-24-RVCT.txt
@@ -1,14 +1,17 @@
***************************************************************************
Options: -O3 -Otime --apcs=interwork
Settings: SYSCLK=24, ACR=0x10 (no wait states)
-Compiler: RealView C/C++ Compiler V4.1.0.561 [Evaluation].
+Compiler: RealView C/C++ Compiler V4.1.0.791 [Evaluation].
***************************************************************************
*** ChibiOS/RT test suite
***
-*** Kernel: 2.1.7unstable
+*** Kernel: 2.3.4unstable
+*** Compiled: Oct 15 2011 - 14:58:38
+*** Compiler: RVCT
*** Architecture: ARMv7-M
*** Core Variant: Cortex-M3
+*** Port Info: Advanced kernel mode
*** Platform: STM32 Value Line Medium Density
*** Test Board: ST STM32VL-Discovery
@@ -98,56 +101,56 @@ Compiler: RealView C/C++ Compiler V4.1.0.561 [Evaluation].
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.1 (Benchmark, messages #1)
---- Score : 99090 msgs/S, 198180 ctxswc/S
+--- Score : 101071 msgs/S, 202142 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.2 (Benchmark, messages #2)
---- Score : 86522 msgs/S, 173044 ctxswc/S
+--- Score : 86737 msgs/S, 173474 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.3 (Benchmark, messages #3)
---- Score : 86522 msgs/S, 173044 ctxswc/S
+--- Score : 86737 msgs/S, 173474 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.4 (Benchmark, context switch)
---- Score : 343016 ctxswc/S
+--- Score : 340176 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.5 (Benchmark, threads, full cycle)
---- Score : 65072 threads/S
+--- Score : 63779 threads/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.6 (Benchmark, threads, create only)
---- Score : 91152 threads/S
+--- Score : 91045 threads/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.7 (Benchmark, mass reschedule, 5 threads)
---- Score : 29264 reschedules/S, 175584 ctxswc/S
+--- Score : 29194 reschedules/S, 175164 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.8 (Benchmark, round robin context switching)
---- Score : 202360 ctxswc/S
+--- Score : 203860 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.9 (Benchmark, I/O Queues throughput)
---- Score : 228520 bytes/S
+--- Score : 255612 bytes/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.10 (Benchmark, virtual timers set/reset)
---- Score : 294828 timers/S
+--- Score : 311804 timers/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.11 (Benchmark, semaphores wait/signal)
---- Score : 454856 wait+signal/S
+--- Score : 454332 wait+signal/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.12 (Benchmark, mutexes lock/unlock)
---- Score : 277668 lock+unlock/S
+--- Score : 274152 lock+unlock/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.13 (Benchmark, RAM footprint)
---- System: 360 bytes
---- Thread: 68 bytes
+--- System: 376 bytes
+--- Thread: 72 bytes
--- Timer : 20 bytes
--- Semaph: 12 bytes
--- EventS: 4 bytes
diff --git a/docs/reports/STM32L152-32-RVCT.txt b/docs/reports/STM32L152-32-RVCT.txt
new file mode 100644
index 000000000..aadaddb7b
--- /dev/null
+++ b/docs/reports/STM32L152-32-RVCT.txt
@@ -0,0 +1,165 @@
+***************************************************************************
+Options: -O3 -Otime --apcs=interwork
+Settings: SYSCLK=24, ACR=0x10 (no wait states)
+Compiler: RealView C/C++ Compiler V4.1.0.791 [Evaluation].
+***************************************************************************
+
+*** ChibiOS/RT test suite
+***
+*** Kernel: 2.3.4unstable
+*** Compiled: Oct 15 2011 - 15:19:16
+*** Compiler: RVCT
+*** Architecture: ARMv7-M
+*** Core Variant: Cortex-M3
+*** Port Info: Advanced kernel mode
+*** Platform: STM32L Ultra Low Power Medium Density
+*** Test Board: ST STM32L-Discovery
+
+----------------------------------------------------------------------------
+--- Test Case 1.1 (Threads, enqueuing test #1)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 1.2 (Threads, enqueuing test #2)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 1.3 (Threads, priority change)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 1.4 (Threads, delays)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 2.1 (Semaphores, enqueuing)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 2.2 (Semaphores, timeout)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 2.3 (Semaphores, atomic signal-wait)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 2.4 (Binary Semaphores, functionality)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 3.1 (Mutexes, priority enqueuing test)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 3.2 (Mutexes, priority inheritance, simple case)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 3.3 (Mutexes, priority inheritance, complex case)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 3.4 (Mutexes, priority return)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 3.5 (Mutexes, status)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 3.6 (CondVar, signal test)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 3.7 (CondVar, broadcast test)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 3.8 (CondVar, boost test)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 4.1 (Messages, loop)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 5.1 (Mailboxes, queuing and timeouts)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 6.1 (Events, registration and dispatch)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 6.2 (Events, wait and broadcast)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 6.3 (Events, timeouts)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 7.1 (Heap, allocation and fragmentation test)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 8.1 (Memory Pools, queue/dequeue)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 9.1 (Dynamic APIs, threads creation from heap)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 9.2 (Dynamic APIs, threads creation from memory pool)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 9.3 (Dynamic APIs, registry and references)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 10.1 (Queues, input queues)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 10.2 (Queues, output queues)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 11.1 (Benchmark, messages #1)
+--- Score : 123437 msgs/S, 246874 ctxswc/S
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 11.2 (Benchmark, messages #2)
+--- Score : 106869 msgs/S, 213738 ctxswc/S
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 11.3 (Benchmark, messages #3)
+--- Score : 106869 msgs/S, 213738 ctxswc/S
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 11.4 (Benchmark, context switch)
+--- Score : 425360 ctxswc/S
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 11.5 (Benchmark, threads, full cycle)
+--- Score : 78833 threads/S
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 11.6 (Benchmark, threads, create only)
+--- Score : 111359 threads/S
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 11.7 (Benchmark, mass reschedule, 5 threads)
+--- Score : 35464 reschedules/S, 212784 ctxswc/S
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 11.8 (Benchmark, round robin context switching)
+--- Score : 243100 ctxswc/S
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 11.9 (Benchmark, I/O Queues throughput)
+--- Score : 312000 bytes/S
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 11.10 (Benchmark, virtual timers set/reset)
+--- Score : 361876 timers/S
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 11.11 (Benchmark, semaphores wait/signal)
+--- Score : 530708 wait+signal/S
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 11.12 (Benchmark, mutexes lock/unlock)
+--- Score : 324940 lock+unlock/S
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 11.13 (Benchmark, RAM footprint)
+--- System: 376 bytes
+--- Thread: 72 bytes
+--- Timer : 20 bytes
+--- Semaph: 12 bytes
+--- EventS: 4 bytes
+--- EventL: 12 bytes
+--- Mutex : 16 bytes
+--- CondV.: 8 bytes
+--- Queue : 32 bytes
+--- MailB.: 40 bytes
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+
+Final result: SUCCESS
diff --git a/readme.txt b/readme.txt
index 3b365809d..e6a0d72d8 100644
--- a/readme.txt
+++ b/readme.txt
@@ -83,6 +83,7 @@
Now makefiles and load script files are requirements and trigger a
rebuild if touched.
- NEW: Updated AVR demos to use the new PAL driver.
+- NEW: Added Keil build files to the STM32L-Discovery demo.
- CHANGE: Moved the STM32 DMA helper drivers files under the sub-family
specific directories because documentation issues.
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-03 20:25:28 +0000