diff options
| -rw-r--r-- | demos/STM32/RT-STM32F746G-DISCOVERY/main.c | 5 | ||||
| -rw-r--r-- | os/common/ports/ARMCMx/compilers/GCC/crt0_v6m.s | 12 | ||||
| -rw-r--r-- | os/common/ports/ARMCMx/compilers/GCC/crt0_v7m.s | 36 | ||||
| -rw-r--r-- | os/common/ports/ARMCMx/compilers/GCC/crt1.c | 26 | ||||
| -rw-r--r-- | os/hal/ports/STM32/STM32F7xx/hal_lld.c | 4 | ||||
| -rw-r--r-- | testhal/STM32/STM32F7xx/GPT-ADC-SPI-PWM-ICU/main.c | 5 |
6 files changed, 63 insertions, 25 deletions
diff --git a/demos/STM32/RT-STM32F746G-DISCOVERY/main.c b/demos/STM32/RT-STM32F746G-DISCOVERY/main.c index 236ab396c..dabc687cb 100644 --- a/demos/STM32/RT-STM32F746G-DISCOVERY/main.c +++ b/demos/STM32/RT-STM32F746G-DISCOVERY/main.c @@ -40,11 +40,6 @@ static THD_FUNCTION(Thread1, arg) { */
int main(void) {
- SCB_InvalidateICache();
- SCB_EnableICache();
- SCB_CleanInvalidateDCache();
- SCB_EnableDCache();
-
/*
* System initializations.
* - HAL initialization, this also initializes the configured device drivers
diff --git a/os/common/ports/ARMCMx/compilers/GCC/crt0_v6m.s b/os/common/ports/ARMCMx/compilers/GCC/crt0_v6m.s index 38b4513b7..824538215 100644 --- a/os/common/ports/ARMCMx/compilers/GCC/crt0_v6m.s +++ b/os/common/ports/ARMCMx/compilers/GCC/crt0_v6m.s @@ -57,6 +57,13 @@ #endif
/**
+ * @brief Core initialization switch.
+ */
+#if !defined(CRT0_INIT_CORE) || defined(__DOXYGEN__)
+#define CRT0_INIT_CORE TRUE
+#endif
+
+/**
* @brief Stack segments initialization switch.
*/
#if !defined(CRT0_STACKS_FILL_PATTERN) || defined(__DOXYGEN__)
@@ -129,6 +136,11 @@ Reset_Handler: msr CONTROL, r0
isb
+#if CRT0_INIT_CORE == TRUE
+ /* Core initialization.*/
+ bl __core_init
+#endif
+
/* Early initialization..*/
bl __early_init
diff --git a/os/common/ports/ARMCMx/compilers/GCC/crt0_v7m.s b/os/common/ports/ARMCMx/compilers/GCC/crt0_v7m.s index fcfa4decd..029713227 100644 --- a/os/common/ports/ARMCMx/compilers/GCC/crt0_v7m.s +++ b/os/common/ports/ARMCMx/compilers/GCC/crt0_v7m.s @@ -55,6 +55,17 @@ /*===========================================================================*/
/**
+ * @brief FPU initialization switch.
+ */
+#if !defined(CRT0_INIT_FPU) || defined(__DOXYGEN__)
+#if defined(CORTEX_USE_FPU) || defined(__DOXYGEN__)
+#define CRT0_INIT_FPU CORTEX_USE_FPU
+#else
+#define CRT0_INIT_FPU FALSE
+#endif
+#endif
+
+/**
* @brief Control special register initialization value.
* @details The system is setup to run in privileged mode using the PSP
* stack (dual stack mode).
@@ -65,6 +76,13 @@ #endif
/**
+ * @brief Core initialization switch.
+ */
+#if !defined(CRT0_INIT_CORE) || defined(__DOXYGEN__)
+#define CRT0_INIT_CORE TRUE
+#endif
+
+/**
* @brief Stack segments initialization switch.
*/
#if !defined(CRT0_STACKS_FILL_PATTERN) || defined(__DOXYGEN__)
@@ -107,17 +125,6 @@ #endif
/**
- * @brief FPU initialization switch.
- */
-#if !defined(CRT0_INIT_FPU) || defined(__DOXYGEN__)
-#if defined(CORTEX_USE_FPU) || defined(__DOXYGEN__)
-#define CRT0_INIT_FPU CORTEX_USE_FPU
-#else
-#define CRT0_INIT_FPU FALSE
-#endif
-#endif
-
-/**
* @brief FPU FPCCR register initialization value.
* @note Only used if @p CRT0_INIT_FPU is equal to @p TRUE.
*/
@@ -199,7 +206,12 @@ Reset_Handler: msr CONTROL, r0
isb
- /* Early initialization..*/
+#if CRT0_INIT_CORE == TRUE
+ /* Core initialization.*/
+ bl __core_init
+#endif
+
+ /* Early initialization.*/
bl __early_init
#if CRT0_INIT_STACKS == TRUE
diff --git a/os/common/ports/ARMCMx/compilers/GCC/crt1.c b/os/common/ports/ARMCMx/compilers/GCC/crt1.c index 68e22b95a..b20c3ba9a 100644 --- a/os/common/ports/ARMCMx/compilers/GCC/crt1.c +++ b/os/common/ports/ARMCMx/compilers/GCC/crt1.c @@ -27,11 +27,31 @@ #include <stdbool.h>
+#include "cmparams.h"
+
/**
- * @brief Early initialization.
+ * @brief Architecture-dependent core initialization.
* @details This hook is invoked immediately after the stack initialization
- * and before the DATA and BSS segments initialization. The
- * default behavior is to do nothing.
+ * and before the DATA and BSS segments initialization.
+ * @note This function is a weak symbol.
+ */
+#if !defined(__DOXYGEN__)
+__attribute__((weak))
+#endif
+/*lint -save -e9075 [8.4] All symbols are invoked from asm context.*/
+void __core_init(void) {
+
+#if __CORTEX_M == 7
+ SCB_EnableICache();
+ SCB_EnableDCache();
+#endif
+}
+
+/**
+ * @brief Early initialization.
+ * @details This hook is invoked immediately after the stack and core
+ * initialization and before the DATA and BSS segments
+ * initialization.
* @note This function is a weak symbol.
*/
#if !defined(__DOXYGEN__)
diff --git a/os/hal/ports/STM32/STM32F7xx/hal_lld.c b/os/hal/ports/STM32/STM32F7xx/hal_lld.c index e5f74ed8c..4ff0a33b5 100644 --- a/os/hal/ports/STM32/STM32F7xx/hal_lld.c +++ b/os/hal/ports/STM32/STM32F7xx/hal_lld.c @@ -146,6 +146,10 @@ void hal_lld_init(void) { MPU_RASR_SIZE_512K |
MPU_RASR_ENABLE);
mpuEnable(MPU_CTRL_PRIVDEFENA);
+
+ /* Invalidating data cache to make sure that the MPU settings are taken
+ immediately.*/
+ SCB_InvalidateDCache();
#endif
#endif
diff --git a/testhal/STM32/STM32F7xx/GPT-ADC-SPI-PWM-ICU/main.c b/testhal/STM32/STM32F7xx/GPT-ADC-SPI-PWM-ICU/main.c index 009c9de1a..1f65197c3 100644 --- a/testhal/STM32/STM32F7xx/GPT-ADC-SPI-PWM-ICU/main.c +++ b/testhal/STM32/STM32F7xx/GPT-ADC-SPI-PWM-ICU/main.c @@ -123,11 +123,6 @@ int main(void) { halInit();
chSysInit();
- SCB_InvalidateICache();
- SCB_EnableICache();
- SCB_InvalidateDCache();
- SCB_EnableDCache();
-
/*
* Activates the serial driver 1 using the driver default configuration.
*/
|