diff options
| -rw-r--r-- | os/hal/include/i2c.h | 11 | ||||
| -rw-r--r-- | os/hal/platforms/STM32/i2c_lld.c | 32 | ||||
| -rw-r--r-- | os/hal/platforms/STM32/i2c_lld.h | 32 | ||||
| -rw-r--r-- | os/hal/src/i2c.c | 4 | ||||
| -rw-r--r-- | testhal/STM32/I2C/i2c_pns.c | 12 | 
5 files changed, 46 insertions, 45 deletions
diff --git a/os/hal/include/i2c.h b/os/hal/include/i2c.h index f5465985b..6b8661c7e 100644 --- a/os/hal/include/i2c.h +++ b/os/hal/include/i2c.h @@ -148,15 +148,12 @@ struct I2CSlaveConfig{     */
    i2cerrorcallback_t    id_err_callback;
 -  /**
 -   * @brief Receive and transmit buffers.
 -   */
 -  size_t                txbytes;
 -  size_t                rxbytes;
 +  size_t                txbytes;      /*!< Number of bytes to transmitted. */
 +  size_t                rxbytes;      /*!< Number of bytes to received. */
    i2cblock_t            *rxbuf;       /*!< Pointer to receive buffer. */
    i2cblock_t            *txbuf;       /*!< Pointer to transmit buffer.*/
 -  uint16_t              slave_addr;
 -  uint8_t               nbit_address; /*!< Length of address (must be 7 or 10).*/
 +  uint16_t              slave_addr;   /*!< Slave device address.*/
 +  uint8_t               nbit_addr;    /*!< Length of address (must be 7 or 10).*/
    i2cflags_t            errors;
    i2cflags_t            flags;
    /* Status Change @p EventSource.*/
 diff --git a/os/hal/platforms/STM32/i2c_lld.c b/os/hal/platforms/STM32/i2c_lld.c index 4809838b7..75dd9d4bc 100644 --- a/os/hal/platforms/STM32/i2c_lld.c +++ b/os/hal/platforms/STM32/i2c_lld.c @@ -360,8 +360,8 @@ void i2c_lld_reset(I2CDriver *i2cp){  void i2c_lld_set_clock(I2CDriver *i2cp) {    volatile uint16_t regCCR, regCR2, freq, clock_div;    volatile uint16_t pe_bit_saved; -  int32_t clock_speed = i2cp->id_config->ClockSpeed; -  I2C_DutyCycle_t duty = i2cp->id_config->FastModeDutyCycle; +  int32_t clock_speed = i2cp->id_config->clock_speed; +  i2cdutycycle_t duty = i2cp->id_config->duty_cycle;    chDbgCheck((i2cp != NULL) && (clock_speed > 0) && (clock_speed <= 4000000),               "i2c_lld_set_clock"); @@ -389,7 +389,7 @@ void i2c_lld_set_clock(I2CDriver *i2cp) {    clock_div = I2C_CCR_CCR;    /* Configure clock_div in standard mode */    if (clock_speed <= 100000) { -    chDbgAssert(duty == stdDutyCycle, +    chDbgAssert(duty == STD_DUTY_CYCLE,                  "i2c_lld_set_clock(), #1", "Invalid standard mode duty cycle");      /* Standard mode clock_div calculate: Tlow/Thigh = 1/1 */      clock_div = (uint16_t)(STM32_PCLK1 / (clock_speed * 2)); @@ -402,13 +402,13 @@ void i2c_lld_set_clock(I2CDriver *i2cp) {    }    /* Configure clock_div in fast mode */    else if(clock_speed <= 400000) { -    chDbgAssert((duty == fastDutyCycle_2) || (duty == fastDutyCycle_16_9), +    chDbgAssert((duty == FAST_DUTY_CYCLE_2) || (duty == FAST_DUTY_CYCLE_16_9),                  "i2c_lld_set_clock(), #2", "Invalid fast mode duty cycle"); -    if(duty == fastDutyCycle_2) { +    if(duty == FAST_DUTY_CYCLE_2) {        /* Fast mode clock_div calculate: Tlow/Thigh = 2/1 */        clock_div = (uint16_t)(STM32_PCLK1 / (clock_speed * 3));      } -    else if(duty == fastDutyCycle_16_9) { +    else if(duty == FAST_DUTY_CYCLE_16_9) {        /* Fast mode clock_div calculate: Tlow/Thigh = 16/9 */        clock_div = (uint16_t)(STM32_PCLK1 / (clock_speed * 25));        /* Set DUTY bit */ @@ -437,21 +437,21 @@ void i2c_lld_set_clock(I2CDriver *i2cp) {   * @param[in] i2cp      pointer to the @p I2CDriver object   */  void i2c_lld_set_opmode(I2CDriver *i2cp) { -  I2C_opMode_t opmode = i2cp->id_config->opMode; +  i2copmode_t opmode = i2cp->id_config->op_mode;    uint16_t regCR1;    /*---------------------------- CR1 Configuration ------------------------*/    /* Get the I2Cx CR1 value */    regCR1 = i2cp->id_i2c->CR1;    switch(opmode){ -  case opmodeI2C: +  case OPMODE_I2C:      regCR1 &= (uint16_t)~(I2C_CR1_SMBUS|I2C_CR1_SMBTYPE);      break; -  case opmodeSMBusDevice: +  case OPMODE_SMBUS_DEVICE:      regCR1 |= I2C_CR1_SMBUS;      regCR1 &= (uint16_t)~(I2C_CR1_SMBTYPE);      break; -  case opmodeSMBusHost: +  case OPMODE_SMBUS_HOST:      regCR1 |= (I2C_CR1_SMBUS|I2C_CR1_SMBTYPE);      break;    } @@ -470,15 +470,15 @@ void i2c_lld_set_own_address(I2CDriver *i2cp) {    /*---------------------------- OAR1 Configuration -----------------------*/    i2cp->id_i2c->OAR1 |= 1 << 14; -  if (&(i2cp->id_config->OwnAddress10) == NULL){// only 7-bit address +  if (&(i2cp->id_config->own_addr_10) == NULL){// only 7-bit address      i2cp->id_i2c->OAR1 &= (~I2C_OAR1_ADDMODE); -    i2cp->id_i2c->OAR1 |= i2cp->id_config->OwnAddress7 << 1; +    i2cp->id_i2c->OAR1 |= i2cp->id_config->own_addr_7 << 1;    }    else { -    chDbgAssert((i2cp->id_config->OwnAddress10 < 1024), +    chDbgAssert((i2cp->id_config->own_addr_10 < 1024),          "i2c_lld_set_own_address(), #1", "10-bit address longer then 10 bit")      i2cp->id_i2c->OAR1 |= I2C_OAR1_ADDMODE; -    i2cp->id_i2c->OAR1 |= i2cp->id_config->OwnAddress10; +    i2cp->id_i2c->OAR1 |= i2cp->id_config->own_addr_10;    }  } @@ -522,7 +522,7 @@ void i2c_lld_master_transmit(I2CDriver *i2cp) {    i2cp->id_i2c->CR2 |= (I2C_CR2_ITERREN|I2C_CR2_ITEVTEN|I2C_CR2_ITBUFEN);    i2cp->id_i2c->CR1 &= ~I2C_CR1_POS; -  switch(i2cp->id_slave_config->nbit_address){ +  switch(i2cp->id_slave_config->nbit_addr){    case 7:      // LSB = 0 -> write      i2cp->slave_addr1 = ((i2cp->id_slave_config->slave_addr <<1) & 0x00FE); @@ -564,7 +564,7 @@ void i2c_lld_master_receive(I2CDriver *i2cp){    i2cp->id_i2c->CR1 |= I2C_CR1_ACK;                 // acknowledge returned    i2cp->id_i2c->CR1 &= ~I2C_CR1_POS; -  switch(i2cp->id_slave_config->nbit_address){ +  switch(i2cp->id_slave_config->nbit_addr){    case 7:      // LSB = 1 -> receive      i2cp->slave_addr1 = ((i2cp->id_slave_config->slave_addr <<1) | 0x01); diff --git a/os/hal/platforms/STM32/i2c_lld.h b/os/hal/platforms/STM32/i2c_lld.h index 00c6410fa..a97e863f6 100644 --- a/os/hal/platforms/STM32/i2c_lld.h +++ b/os/hal/platforms/STM32/i2c_lld.h @@ -95,28 +95,28 @@  typedef uint32_t i2cflags_t;  typedef enum { -  opmodeI2C, -  opmodeSMBusDevice, -  opmodeSMBusHost, -} I2C_opMode_t; +  OPMODE_I2C = 1, +  OPMODE_SMBUS_DEVICE = 2, +  OPMODE_SMBUS_HOST = 3, +} i2copmode_t;  typedef enum { -  stdDutyCycle, -  fastDutyCycle_2, -  fastDutyCycle_16_9, -} I2C_DutyCycle_t; +  STD_DUTY_CYCLE = 1, +  FAST_DUTY_CYCLE_2 = 2, +  FAST_DUTY_CYCLE_16_9 = 3, +} i2cdutycycle_t;  /**   * @brief Driver configuration structure.   */  typedef struct { -  I2C_opMode_t    opMode;           /*!< Specifies the I2C mode.*/ -  uint32_t        ClockSpeed;       /*!< Specifies the clock frequency. Must be set to a value lower than 400kHz */ -  I2C_DutyCycle_t FastModeDutyCycle;/*!< Specifies the I2C fast mode duty cycle */ -  uint8_t         OwnAddress7;      /*!< Specifies the first device 7-bit own address. */ -  uint16_t        OwnAddress10;     /*!< Specifies the second part of device own address in 10-bit mode. Set to NULL if not used. */ -  uint16_t        Ack;              /*!< Enables or disables the acknowledgement. */ -  uint8_t         nBitAddress;      /*!< Specifies if 7-bit or 10-bit address is acknowledged */ +  i2copmode_t     op_mode;       /*!< Specifies the I2C mode.*/ +  uint32_t        clock_speed;   /*!< Specifies the clock frequency. Must be set to a value lower than 400kHz */ +  i2cdutycycle_t  duty_cycle;    /*!< Specifies the I2C fast mode duty cycle */ +  uint8_t         own_addr_7;    /*!< Specifies the first device 7-bit own address. */ +  uint16_t        own_addr_10;   /*!< Specifies the second part of device own address in 10-bit mode. Set to NULL if not used. */ +  uint16_t        ack;           /*!< Enables or disables the acknowledgement. */ +  uint8_t         nbit_own_addr; /*!< Specifies if 7-bit or 10-bit address is acknowledged */  } I2CConfig; @@ -169,7 +169,7 @@ struct I2CDriver{    uint8_t               slave_addr1;    // 7-bit address of the slave    uint8_t               slave_addr2;    // used in 10-bit address mode -  uint8_t               nbit_address; +  uint8_t               nbit_addr;    /*********** End of the mandatory fields. **********************************/ diff --git a/os/hal/src/i2c.c b/os/hal/src/i2c.c index 6f99a1afb..b43be0261 100644 --- a/os/hal/src/i2c.c +++ b/os/hal/src/i2c.c @@ -144,7 +144,7 @@ void i2cMasterTransmit(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg) {    uint8_t nbit_addr;
    txbuf = i2cscfg->txbuf;
 -  nbit_addr = i2cscfg->nbit_address;
 +  nbit_addr = i2cscfg->nbit_addr;
    n = i2cscfg->txbytes;
    chDbgCheck((i2cp != NULL) && (i2cscfg != NULL) && \
 @@ -194,7 +194,7 @@ void i2cMasterReceive(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg){    rxbuf = i2cscfg->rxbuf;
    n = i2cscfg->rxbytes;
 -  nbit_addr = i2cscfg->nbit_address;
 +  nbit_addr = i2cscfg->nbit_addr;
    chDbgCheck((i2cp != NULL) && (i2cscfg != NULL) && (n > 0) && \
        ((nbit_addr == 7) || (nbit_addr == 10)) && (rxbuf != NULL),
 diff --git a/testhal/STM32/I2C/i2c_pns.c b/testhal/STM32/I2C/i2c_pns.c index 11982d0a7..fe82fcb4e 100644 --- a/testhal/STM32/I2C/i2c_pns.c +++ b/testhal/STM32/I2C/i2c_pns.c @@ -9,18 +9,22 @@  /* I2C1 */
  static I2CConfig i2cfg1 = {
 -    opmodeI2C,
 +    OPMODE_I2C,
      100000,
 -    stdDutyCycle,
 +    STD_DUTY_CYCLE,
 +    0,
 +    0,
      0,
      0,
  };
  /* I2C2 */
  static I2CConfig i2cfg2 = {
 -    opmodeI2C,
 +    OPMODE_I2C,
      100000,
 -    stdDutyCycle,
 +    STD_DUTY_CYCLE,
 +    0,
 +    0,
      0,
      0,
  };
  | 
