diff options
| -rw-r--r-- | os/hal/platforms/STM32F0xx/adc_lld.c | 2 | ||||
| -rw-r--r-- | os/hal/platforms/STM32F0xx/adc_lld.h | 26 | ||||
| -rw-r--r-- | testhal/STM32F0xx/ADC/Makefile | 2 | ||||
| -rw-r--r-- | testhal/STM32F0xx/ADC/main.c | 17 |
4 files changed, 29 insertions, 18 deletions
diff --git a/os/hal/platforms/STM32F0xx/adc_lld.c b/os/hal/platforms/STM32F0xx/adc_lld.c index 51905c3d4..af03bd058 100644 --- a/os/hal/platforms/STM32F0xx/adc_lld.c +++ b/os/hal/platforms/STM32F0xx/adc_lld.c @@ -102,7 +102,7 @@ static void adc_lld_serve_rx_interrupt(ADCDriver *adcp, uint32_t flags) { *
* @isr
*/
-CH_IRQ_HANDLER(ADC1_IRQHandler) {
+CH_IRQ_HANDLER(ADC1_COMP_IRQHandler) {
uint32_t isr;
CH_IRQ_PROLOGUE();
diff --git a/os/hal/platforms/STM32F0xx/adc_lld.h b/os/hal/platforms/STM32F0xx/adc_lld.h index eeeda1979..dce0d7d1a 100644 --- a/os/hal/platforms/STM32F0xx/adc_lld.h +++ b/os/hal/platforms/STM32F0xx/adc_lld.h @@ -39,14 +39,24 @@ * @name Sampling rates
* @{
*/
-#define ADC_SAMPLE_1P5 0 /**< @brief 14 cycles conversion time */
-#define ADC_SAMPLE_7P5 1 /**< @brief 21 cycles conversion time. */
-#define ADC_SAMPLE_13P5 2 /**< @brief 28 cycles conversion time. */
-#define ADC_SAMPLE_28P5 3 /**< @brief 41 cycles conversion time. */
-#define ADC_SAMPLE_41P5 4 /**< @brief 54 cycles conversion time. */
-#define ADC_SAMPLE_55P5 5 /**< @brief 68 cycles conversion time. */
-#define ADC_SAMPLE_71P5 6 /**< @brief 84 cycles conversion time. */
-#define ADC_SAMPLE_239P5 7 /**< @brief 252 cycles conversion time. */
+#define ADC_SMPR_SMP_1P5 0 /**< @brief 14 cycles conversion time */
+#define ADC_SMPR_SMP_7P5 1 /**< @brief 21 cycles conversion time. */
+#define ADC_SMPR_SMP_13P5 2 /**< @brief 28 cycles conversion time. */
+#define ADC_SMPR_SMP_28P5 3 /**< @brief 41 cycles conversion time. */
+#define ADC_SMPR_SMP_41P5 4 /**< @brief 54 cycles conversion time. */
+#define ADC_SMPR_SMP_55P5 5 /**< @brief 68 cycles conversion time. */
+#define ADC_SMPR_SMP_71P5 6 /**< @brief 84 cycles conversion time. */
+#define ADC_SMPR_SMP_239P5 7 /**< @brief 252 cycles conversion time. */
+/** @} */
+
+/**
+ * @name Resolution
+ * @{
+ */
+#define ADC_CFGR1_RES_12BIT (0 << 3)
+#define ADC_CFGR1_RES_10BIT (1 << 3)
+#define ADC_CFGR1_RES_8BIT (2 << 3)
+#define ADC_CFGR1_RES_6BIT (3 << 3)
/** @} */
/*===========================================================================*/
diff --git a/testhal/STM32F0xx/ADC/Makefile b/testhal/STM32F0xx/ADC/Makefile index e82dcc974..0b2d556fb 100644 --- a/testhal/STM32F0xx/ADC/Makefile +++ b/testhal/STM32F0xx/ADC/Makefile @@ -118,7 +118,7 @@ INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ # Compiler settings
#
-MCU = cortex-m3
+MCU = cortex-m0
#TRGT = arm-elf-
TRGT = arm-none-eabi-
diff --git a/testhal/STM32F0xx/ADC/main.c b/testhal/STM32F0xx/ADC/main.c index dba3a5254..6038a2fb2 100644 --- a/testhal/STM32F0xx/ADC/main.c +++ b/testhal/STM32F0xx/ADC/main.c @@ -24,7 +24,7 @@ #define ADC_GRP1_NUM_CHANNELS 1
#define ADC_GRP1_BUF_DEPTH 8
-#define ADC_GRP2_NUM_CHANNELS 8
+#define ADC_GRP2_NUM_CHANNELS 4
#define ADC_GRP2_BUF_DEPTH 16
static adcsample_t samples1[ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH];
@@ -61,24 +61,25 @@ static const ADCConversionGroup adcgrpcfg1 = { ADC_GRP1_NUM_CHANNELS,
NULL,
adcerrorcallback,
- 0, /* CFGRR1 */
- 0, /* SMPR */
- 0 /* CHSELR */
+ ADC_CFGR1_RES_12BIT, /* CFGRR1 */
+ ADC_SMPR_SMP_1P5, /* SMPR */
+ ADC_CHSELR_CHSEL10 /* CHSELR */
};
/*
* ADC conversion group.
* Mode: Continuous, 16 samples of 8 channels, SW triggered.
- * Channels: IN10, IN11, IN10, IN11, IN10, IN11, Sensor, VRef.
+ * Channels: IN10, IN11, Sensor, VRef.
*/
static const ADCConversionGroup adcgrpcfg2 = {
TRUE,
ADC_GRP2_NUM_CHANNELS,
adccallback,
adcerrorcallback,
- 0, /* CFGRR1 */
- 0, /* SMPR */
- 0 /* CHSELR */
+ ADC_CFGR1_RES_12BIT, /* CFGRR1 */
+ ADC_SMPR_SMP_28P5, /* SMPR */
+ ADC_CHSELR_CHSEL10 | ADC_CHSELR_CHSEL11 |
+ ADC_CHSELR_CHSEL16 | ADC_CHSELR_CHSEL17 /* CHSELR */
};
/*
|