diff options
25 files changed, 223 insertions, 397 deletions
diff --git a/demos/various/NIL-ARMCM0-GENERIC/Makefile b/demos/various/NIL-ARMCM0-GENERIC/Makefile index ded63b68a..fde34f683 100644 --- a/demos/various/NIL-ARMCM0-GENERIC/Makefile +++ b/demos/various/NIL-ARMCM0-GENERIC/Makefile @@ -117,8 +117,9 @@ ASMSRC = $(PORTASM) INCDIR = $(PORTINC) $(KERNINC)
-# Make this point to your CMSIS device file.
-INCDIR += $(CHIBIOS)/os/ext/CMSIS/ST
+# Make this point to your CMSIS and chparams.h headers.
+INCDIR += $(CHIBIOS)/os/ext/CMSIS/ST \
+ $(CHIBIOS)/os/common/ports/ARMCMx/devices/STM32F0xx
#
# Project, sources and paths
@@ -168,7 +169,7 @@ CPPWARN = -Wall -Wextra #
# List all user C define here, like -D_DEBUG=1
-UDEFS =
+UDEFS = -DSTM32F051x8
# Define ASM defines here
UADEFS =
diff --git a/demos/various/NIL-ARMCM0-GENERIC/ch.ld b/demos/various/NIL-ARMCM0-GENERIC/ch.ld index 2acdc3297..d04a6c4ed 100644 --- a/demos/various/NIL-ARMCM0-GENERIC/ch.ld +++ b/demos/various/NIL-ARMCM0-GENERIC/ch.ld @@ -20,7 +20,28 @@ MEMORY
{
flash : org = 0x08000000, len = 64k
- ram : org = 0x20000000, len = 8k
+ ram0 : org = 0x20000000, len = 8k
+ ram1 : org = 0x00000000, len = 0
+ ram2 : org = 0x00000000, len = 0
+ ram3 : org = 0x00000000, len = 0
+ ram4 : org = 0x00000000, len = 0
+ ram5 : org = 0x00000000, len = 0
+ ram6 : org = 0x00000000, len = 0
+ ram7 : org = 0x00000000, len = 0
}
+/* RAM region to be used for Main stack. This stack accommodates the processing
+ of all exceptions and interrupts*/
+REGION_ALIAS("MAIN_STACK_RAM", ram0);
+
+/* RAM region to be used for the process stack. This is the stack used by
+ the main() function.*/
+REGION_ALIAS("PROCESS_STACK_RAM", ram0);
+
+/* RAM region to be used for data segment.*/
+REGION_ALIAS("DATA_RAM", ram0);
+
+/* RAM region to be used for BSS segment.*/
+REGION_ALIAS("BSS_RAM", ram0);
+
INCLUDE rules.ld
diff --git a/demos/various/NIL-ARMCM0-GENERIC/cmparams.h b/demos/various/NIL-ARMCM0-GENERIC/cmparams.h deleted file mode 100644 index 420f49dda..000000000 --- a/demos/various/NIL-ARMCM0-GENERIC/cmparams.h +++ /dev/null @@ -1,66 +0,0 @@ -/*
- ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-/**
- * @file cmparams.h
- * @brief ARM Cortex-M4 parameters.
- *
- * @defgroup ARMCMx_ARMCM4 ARM Cortex-M4 Specific Parameters
- * @ingroup ARMCMx_SPECIFIC
- * @details This file contains the Cortex-M4 specific parameters for a
- * generic platform.
- * @{
- */
-
-#ifndef _CMPARAMS_H_
-#define _CMPARAMS_H_
-
-/**
- * @brief Cortex core model.
- */
-#define CORTEX_MODEL CORTEX_M0
-
-/**
- * @brief Floating Point unit presence.
- */
-#define CORTEX_HAS_FPU 0
-
-/**
- * @brief Number of bits in priority masks.
- */
-#define CORTEX_PRIORITY_BITS 2
-
-/**
- * @brief Number of interrupt vectors.
- * @note This number does not include the 16 system vectors and must be
- * rounded to a multiple of 8.
- */
-#define CORTEX_NUM_VECTORS 32
-
-#if !defined(_FROM_ASM_)
-
-/*
- * Replace the following inclusion with your vendor-provided CMSIS
- * device file.
- */
-#define STM32F051x8
-#include "stm32f0xx.h"
-
-#endif /* !defined(_FROM_ASM_) */
-
-#endif /* _CMPARAMS_H_ */
-
-/** @} */
diff --git a/demos/various/NIL-ARMCM4-GENERIC/Makefile b/demos/various/NIL-ARMCM4-GENERIC/Makefile index 9e795d437..4a21e8cbc 100644 --- a/demos/various/NIL-ARMCM4-GENERIC/Makefile +++ b/demos/various/NIL-ARMCM4-GENERIC/Makefile @@ -122,8 +122,9 @@ ASMSRC = $(PORTASM) INCDIR = $(PORTINC) $(KERNINC)
-# Make this point to your CMSIS device file.
-INCDIR += $(CHIBIOS)/os/ext/CMSIS/ST
+# Make this point to your CMSIS and chparams.h headers.
+INCDIR += $(CHIBIOS)/os/ext/CMSIS/ST \
+ $(CHIBIOS)/os/common/ports/ARMCMx/devices/STM32F4xx
#
# Project, sources and paths
@@ -173,7 +174,7 @@ CPPWARN = -Wall -Wextra #
# List all user C define here, like -D_DEBUG=1
-UDEFS =
+UDEFS = -DSTM32F407xx
# Define ASM defines here
UADEFS =
diff --git a/demos/various/NIL-ARMCM4-GENERIC/ch.ld b/demos/various/NIL-ARMCM4-GENERIC/ch.ld index cb367b8ae..d04a6c4ed 100644 --- a/demos/various/NIL-ARMCM4-GENERIC/ch.ld +++ b/demos/various/NIL-ARMCM4-GENERIC/ch.ld @@ -19,8 +19,29 @@ */
MEMORY
{
- flash : org = 0x08000000, len = 128k
- ram : org = 0x20000000, len = 32k
+ flash : org = 0x08000000, len = 64k
+ ram0 : org = 0x20000000, len = 8k
+ ram1 : org = 0x00000000, len = 0
+ ram2 : org = 0x00000000, len = 0
+ ram3 : org = 0x00000000, len = 0
+ ram4 : org = 0x00000000, len = 0
+ ram5 : org = 0x00000000, len = 0
+ ram6 : org = 0x00000000, len = 0
+ ram7 : org = 0x00000000, len = 0
}
+/* RAM region to be used for Main stack. This stack accommodates the processing
+ of all exceptions and interrupts*/
+REGION_ALIAS("MAIN_STACK_RAM", ram0);
+
+/* RAM region to be used for the process stack. This is the stack used by
+ the main() function.*/
+REGION_ALIAS("PROCESS_STACK_RAM", ram0);
+
+/* RAM region to be used for data segment.*/
+REGION_ALIAS("DATA_RAM", ram0);
+
+/* RAM region to be used for BSS segment.*/
+REGION_ALIAS("BSS_RAM", ram0);
+
INCLUDE rules.ld
diff --git a/demos/various/NIL-ARMCM4-GENERIC/cmparams.h b/demos/various/NIL-ARMCM4-GENERIC/cmparams.h deleted file mode 100644 index f7c0b8895..000000000 --- a/demos/various/NIL-ARMCM4-GENERIC/cmparams.h +++ /dev/null @@ -1,66 +0,0 @@ -/*
- ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-/**
- * @file cmparams.h
- * @brief ARM Cortex-M4 parameters.
- *
- * @defgroup ARMCMx_ARMCM4 ARM Cortex-M4 Specific Parameters
- * @ingroup ARMCMx_SPECIFIC
- * @details This file contains the Cortex-M4 specific parameters for a
- * generic platform.
- * @{
- */
-
-#ifndef _CMPARAMS_H_
-#define _CMPARAMS_H_
-
-/**
- * @brief Cortex core model.
- */
-#define CORTEX_MODEL CORTEX_M4
-
-/**
- * @brief Floating Point unit presence.
- */
-#define CORTEX_HAS_FPU 1
-
-/**
- * @brief Number of bits in priority masks.
- */
-#define CORTEX_PRIORITY_BITS 4
-
-/**
- * @brief Number of interrupt vectors.
- * @note This number does not include the 16 system vectors and must be
- * rounded to a multiple of 8.
- */
-#define CORTEX_NUM_VECTORS 96
-
-#if !defined(_FROM_ASM_)
-
-/*
- * Replace the following inclusion with your vendor-provided CMSIS
- * device file.
- */
-#define STM32F407xx
-#include "stm32f4xx.h"
-
-#endif /* !defined(__FROM_ASM__) */
-
-#endif /* _CMPARAMS_H_ */
-
-/** @} */
diff --git a/demos/various/RT-ARM7-GENERIC/Makefile b/demos/various/RT-ARM7-GENERIC/Makefile index 1560b36e7..4244d8c9f 100644 --- a/demos/various/RT-ARM7-GENERIC/Makefile +++ b/demos/various/RT-ARM7-GENERIC/Makefile @@ -147,6 +147,9 @@ ASMSRC = $(PORTASM) # List of the standard inclusion directories.
INCDIR = $(PORTINC) $(KERNINC)
+# Make this point to your armparams.h header.
+INCDIR += $(CHIBIOS)/os/common/ports/ARM/devices/LPC214x
+
#
# Project, sources and paths
##############################################################################
diff --git a/demos/various/RT-ARM7-GENERIC/armparams.h b/demos/various/RT-ARM7-GENERIC/armparams.h deleted file mode 100644 index 6bbc42af9..000000000 --- a/demos/various/RT-ARM7-GENERIC/armparams.h +++ /dev/null @@ -1,65 +0,0 @@ -/*
- ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio.
-
- This file is part of ChibiOS.
-
- ChibiOS is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file armparams.h
- * @brief Generic ARM parameters.
- *
- * @defgroup ARM_GENERIC Generic ARM Parameters
- * @ingroup ARM_SPECIFIC
- * @details This file contains the ARM specific parameters for the
- * a generic platform.
- * @{
- */
-
-#ifndef _ARMPARAMS_H_
-#define _ARMPARAMS_H_
-
-/**
- * @brief ARM core model.
- */
-#define ARM_CORE ARM_CORE_ARM7TDMI
-
-/**
- * @brief Thumb-capable.
- */
-#define ARM_SUPPORTS_THUMB 1
-
-/**
- * @brief Thumb2-capable.
- */
-#define ARM_SUPPORTS_THUMB2 0
-
-/**
- * @brief Implementation of the wait-for-interrupt state enter.
- */
-#define ARM_WFI_IMPL
-
-#if !defined(_FROM_ASM_) || defined(__DOXYGEN__)
-/**
- * @brief Address of the IRQ vector register in the interrupt controller.
- */
-#define ARM_IRQ_VECTOR_REG 0xFFFFF030U
-#else
-#define ARM_IRQ_VECTOR_REG 0xFFFFF030
-#endif
-
-#endif /* _ARMPARAMS_H_ */
-
-/** @} */
diff --git a/demos/various/RT-ARMCM0-GENERIC/Makefile b/demos/various/RT-ARMCM0-GENERIC/Makefile index 320fb1e76..dfd7b0106 100644 --- a/demos/various/RT-ARMCM0-GENERIC/Makefile +++ b/demos/various/RT-ARMCM0-GENERIC/Makefile @@ -118,8 +118,9 @@ ASMSRC = $(PORTASM) # List of the standard inclusion directories.
INCDIR = $(PORTINC) $(KERNINC)
-# Make this point to your CMSIS device file.
-INCDIR += $(CHIBIOS)/os/ext/CMSIS/ST
+# Make this point to your CMSIS and chparams.h headers.
+INCDIR += $(CHIBIOS)/os/ext/CMSIS/ST \
+ $(CHIBIOS)/os/common/ports/ARMCMx/devices/STM32F0xx
#
# Project, sources and paths
@@ -169,7 +170,7 @@ CPPWARN = -Wall -Wextra #
# List all user C define here, like -D_DEBUG=1
-UDEFS =
+UDEFS = -DSTM32F051x8
# Define ASM defines here
UADEFS =
diff --git a/demos/various/RT-ARMCM0-GENERIC/ch.ld b/demos/various/RT-ARMCM0-GENERIC/ch.ld index 2acdc3297..d04a6c4ed 100644 --- a/demos/various/RT-ARMCM0-GENERIC/ch.ld +++ b/demos/various/RT-ARMCM0-GENERIC/ch.ld @@ -20,7 +20,28 @@ MEMORY
{
flash : org = 0x08000000, len = 64k
- ram : org = 0x20000000, len = 8k
+ ram0 : org = 0x20000000, len = 8k
+ ram1 : org = 0x00000000, len = 0
+ ram2 : org = 0x00000000, len = 0
+ ram3 : org = 0x00000000, len = 0
+ ram4 : org = 0x00000000, len = 0
+ ram5 : org = 0x00000000, len = 0
+ ram6 : org = 0x00000000, len = 0
+ ram7 : org = 0x00000000, len = 0
}
+/* RAM region to be used for Main stack. This stack accommodates the processing
+ of all exceptions and interrupts*/
+REGION_ALIAS("MAIN_STACK_RAM", ram0);
+
+/* RAM region to be used for the process stack. This is the stack used by
+ the main() function.*/
+REGION_ALIAS("PROCESS_STACK_RAM", ram0);
+
+/* RAM region to be used for data segment.*/
+REGION_ALIAS("DATA_RAM", ram0);
+
+/* RAM region to be used for BSS segment.*/
+REGION_ALIAS("BSS_RAM", ram0);
+
INCLUDE rules.ld
diff --git a/demos/various/RT-ARMCM0-GENERIC/cmparams.h b/demos/various/RT-ARMCM0-GENERIC/cmparams.h deleted file mode 100644 index 420f49dda..000000000 --- a/demos/various/RT-ARMCM0-GENERIC/cmparams.h +++ /dev/null @@ -1,66 +0,0 @@ -/*
- ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-/**
- * @file cmparams.h
- * @brief ARM Cortex-M4 parameters.
- *
- * @defgroup ARMCMx_ARMCM4 ARM Cortex-M4 Specific Parameters
- * @ingroup ARMCMx_SPECIFIC
- * @details This file contains the Cortex-M4 specific parameters for a
- * generic platform.
- * @{
- */
-
-#ifndef _CMPARAMS_H_
-#define _CMPARAMS_H_
-
-/**
- * @brief Cortex core model.
- */
-#define CORTEX_MODEL CORTEX_M0
-
-/**
- * @brief Floating Point unit presence.
- */
-#define CORTEX_HAS_FPU 0
-
-/**
- * @brief Number of bits in priority masks.
- */
-#define CORTEX_PRIORITY_BITS 2
-
-/**
- * @brief Number of interrupt vectors.
- * @note This number does not include the 16 system vectors and must be
- * rounded to a multiple of 8.
- */
-#define CORTEX_NUM_VECTORS 32
-
-#if !defined(_FROM_ASM_)
-
-/*
- * Replace the following inclusion with your vendor-provided CMSIS
- * device file.
- */
-#define STM32F051x8
-#include "stm32f0xx.h"
-
-#endif /* !defined(_FROM_ASM_) */
-
-#endif /* _CMPARAMS_H_ */
-
-/** @} */
diff --git a/demos/various/RT-ARMCM4-GENERIC/Makefile b/demos/various/RT-ARMCM4-GENERIC/Makefile index 383f60b98..719585ddc 100644 --- a/demos/various/RT-ARMCM4-GENERIC/Makefile +++ b/demos/various/RT-ARMCM4-GENERIC/Makefile @@ -123,8 +123,9 @@ ASMSRC = $(PORTASM) # List of the standard inclusion directories.
INCDIR = $(PORTINC) $(KERNINC)
-# Make this point to your CMSIS device file.
-INCDIR += $(CHIBIOS)/os/ext/CMSIS/ST
+# Make this point to your CMSIS and chparams.h headers.
+INCDIR += $(CHIBIOS)/os/ext/CMSIS/ST \
+ $(CHIBIOS)/os/common/ports/ARMCMx/devices/STM32F4xx
#
# Project, sources and paths
@@ -174,7 +175,7 @@ CPPWARN = -Wall -Wextra #
# List all user C define here, like -D_DEBUG=1
-UDEFS =
+UDEFS = -DSTM32F407xx
# Define ASM defines here
UADEFS =
diff --git a/demos/various/RT-ARMCM4-GENERIC/ch.ld b/demos/various/RT-ARMCM4-GENERIC/ch.ld index cb367b8ae..d04a6c4ed 100644 --- a/demos/various/RT-ARMCM4-GENERIC/ch.ld +++ b/demos/various/RT-ARMCM4-GENERIC/ch.ld @@ -19,8 +19,29 @@ */
MEMORY
{
- flash : org = 0x08000000, len = 128k
- ram : org = 0x20000000, len = 32k
+ flash : org = 0x08000000, len = 64k
+ ram0 : org = 0x20000000, len = 8k
+ ram1 : org = 0x00000000, len = 0
+ ram2 : org = 0x00000000, len = 0
+ ram3 : org = 0x00000000, len = 0
+ ram4 : org = 0x00000000, len = 0
+ ram5 : org = 0x00000000, len = 0
+ ram6 : org = 0x00000000, len = 0
+ ram7 : org = 0x00000000, len = 0
}
+/* RAM region to be used for Main stack. This stack accommodates the processing
+ of all exceptions and interrupts*/
+REGION_ALIAS("MAIN_STACK_RAM", ram0);
+
+/* RAM region to be used for the process stack. This is the stack used by
+ the main() function.*/
+REGION_ALIAS("PROCESS_STACK_RAM", ram0);
+
+/* RAM region to be used for data segment.*/
+REGION_ALIAS("DATA_RAM", ram0);
+
+/* RAM region to be used for BSS segment.*/
+REGION_ALIAS("BSS_RAM", ram0);
+
INCLUDE rules.ld
diff --git a/demos/various/RT-ARMCM4-GENERIC/cmparams.h b/demos/various/RT-ARMCM4-GENERIC/cmparams.h deleted file mode 100644 index f7c0b8895..000000000 --- a/demos/various/RT-ARMCM4-GENERIC/cmparams.h +++ /dev/null @@ -1,66 +0,0 @@ -/*
- ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-/**
- * @file cmparams.h
- * @brief ARM Cortex-M4 parameters.
- *
- * @defgroup ARMCMx_ARMCM4 ARM Cortex-M4 Specific Parameters
- * @ingroup ARMCMx_SPECIFIC
- * @details This file contains the Cortex-M4 specific parameters for a
- * generic platform.
- * @{
- */
-
-#ifndef _CMPARAMS_H_
-#define _CMPARAMS_H_
-
-/**
- * @brief Cortex core model.
- */
-#define CORTEX_MODEL CORTEX_M4
-
-/**
- * @brief Floating Point unit presence.
- */
-#define CORTEX_HAS_FPU 1
-
-/**
- * @brief Number of bits in priority masks.
- */
-#define CORTEX_PRIORITY_BITS 4
-
-/**
- * @brief Number of interrupt vectors.
- * @note This number does not include the 16 system vectors and must be
- * rounded to a multiple of 8.
- */
-#define CORTEX_NUM_VECTORS 96
-
-#if !defined(_FROM_ASM_)
-
-/*
- * Replace the following inclusion with your vendor-provided CMSIS
- * device file.
- */
-#define STM32F407xx
-#include "stm32f4xx.h"
-
-#endif /* !defined(__FROM_ASM__) */
-
-#endif /* _CMPARAMS_H_ */
-
-/** @} */
diff --git a/os/hal/osal/nil/osal.h b/os/hal/osal/nil/osal.h index c20e7ef15..84d83d8c2 100644 --- a/os/hal/osal/nil/osal.h +++ b/os/hal/osal/nil/osal.h @@ -109,21 +109,6 @@ #endif
/** @} */
-/**
- * @name IRQ-related constants
- * @{
- */
-/**
- * @brief Total priority levels.
- */
-#define OSAL_IRQ_PRIORITY_LEVELS CORTEX_PRIORITY_LEVELS
-
-/**
- * @brief Highest IRQ priority for HAL drivers.
- */
-#define OSAL_IRQ_MAXIMUM_PRIORITY CORTEX_MAX_KERNEL_PRIORITY
-/** @} */
-
/*===========================================================================*/
/* Module pre-compile time settings. */
/*===========================================================================*/
@@ -295,7 +280,7 @@ typedef struct { /**
* @brief Priority level verification macro.
*/
-#define OSAL_IRQ_IS_VALID_PRIORITY(n) CORTEX_IS_VALID_KERNEL_PRIORITY(n)
+#define OSAL_IRQ_IS_VALID_PRIORITY(n) CH_IRQ_IS_VALID_KERNEL_PRIORITY(n)
/**
* @brief IRQ prologue code.
diff --git a/os/hal/osal/rt/osal.h b/os/hal/osal/rt/osal.h index 0eff06a24..aae2b5d3f 100644 --- a/os/hal/osal/rt/osal.h +++ b/os/hal/osal/rt/osal.h @@ -105,21 +105,6 @@ #endif
/** @} */
-/**
- * @name IRQ-related constants
- * @{
- */
-/**
- * @brief Total priority levels.
- */
-#define OSAL_IRQ_PRIORITY_LEVELS CORTEX_PRIORITY_LEVELS
-
-/**
- * @brief Highest IRQ priority for HAL drivers.
- */
-#define OSAL_IRQ_MAXIMUM_PRIORITY CORTEX_MAX_KERNEL_PRIORITY
-/** @} */
-
/*===========================================================================*/
/* Module pre-compile time settings. */
/*===========================================================================*/
@@ -287,7 +272,7 @@ typedef struct { /**
* @brief Priority level verification macro.
*/
-#define OSAL_IRQ_IS_VALID_PRIORITY(n) CORTEX_IS_VALID_KERNEL_PRIORITY(n)
+#define OSAL_IRQ_IS_VALID_PRIORITY(n) CH_IRQ_IS_VALID_KERNEL_PRIORITY(n)
/**
* @brief IRQ prologue code.
diff --git a/os/hal/templates/osal/osal.h b/os/hal/templates/osal/osal.h index 1eb9ec5de..f73070aa4 100644 --- a/os/hal/templates/osal/osal.h +++ b/os/hal/templates/osal/osal.h @@ -102,11 +102,13 @@ */
/**
* @brief Total priority levels.
+ * @brief Implementation not mandatory.
*/
#define OSAL_IRQ_PRIORITY_LEVELS 16U
/**
* @brief Highest IRQ priority for HAL drivers.
+ * @brief Implementation not mandatory.
*/
#define OSAL_IRQ_MAXIMUM_PRIORITY 0U
/** @} */
diff --git a/os/nil/include/nil.h b/os/nil/include/nil.h index 23ebd05cf..3babb8da9 100644 --- a/os/nil/include/nil.h +++ b/os/nil/include/nil.h @@ -492,6 +492,42 @@ struct nil_system { * @name ISRs abstraction macros
*/
/**
+ * @brief Priority level validation macro.
+ * @details This macro determines if the passed value is a valid priority
+ * level for the underlying architecture.
+ *
+ * @param[in] prio the priority level
+ * @return Priority range result.
+ * @false if the priority is invalid or if the architecture
+ * does not support priorities.
+ * @true if the priority is valid.
+ */
+#if defined(PORT_IRQ_IS_VALID_PRIORITY) || defined(__DOXYGEN__)
+#define CH_IRQ_IS_VALID_PRIORITY(prio) \
+ PORT_IRQ_IS_VALID_PRIORITY(prio)
+#else
+#define CH_IRQ_IS_VALID_PRIORITY(prio) false
+#endif
+
+/**
+ * @brief Priority level validation macro.
+ * @details This macro determines if the passed value is a valid priority
+ * level that cannot preempt the kernel critical zone.
+ *
+ * @param[in] prio the priority level
+ * @return Priority range result.
+ * @false if the priority is invalid or if the architecture
+ * does not support priorities.
+ * @true if the priority is valid.
+ */
+#if defined(PORT_IRQ_IS_VALID_KERNEL_PRIORITY) || defined(__DOXYGEN__)
+#define CH_IRQ_IS_VALID_KERNEL_PRIORITY(prio) \
+ PORT_IRQ_IS_VALID_KERNEL_PRIORITY(prio)
+#else
+#define CH_IRQ_IS_VALID_KERNEL_PRIORITY(prio) false
+#endif
+
+/**
* @brief IRQ handler enter code.
* @note Usually IRQ handlers functions are also declared naked.
* @note On some architectures this macro can be empty.
diff --git a/os/nil/ports/ARMCMx/nilcore.h b/os/nil/ports/ARMCMx/nilcore.h index dd5756cf3..8cd0d117a 100644 --- a/os/nil/ports/ARMCMx/nilcore.h +++ b/os/nil/ports/ARMCMx/nilcore.h @@ -153,22 +153,22 @@ struct port_intctx {}; #define CORTEX_MAXIMUM_PRIORITY 0U
/**
- * @brief Priority level verification macro.
+ * @brief Priority level to priority mask conversion macro.
*/
-#define CORTEX_IS_VALID_PRIORITY(n) \
- (((n) >= 0) && ((n) < CORTEX_PRIORITY_LEVELS))
+#define CORTEX_PRIO_MASK(n) \
+ ((n) << (8U - (unsigned)CORTEX_PRIORITY_BITS))
/**
* @brief Priority level verification macro.
*/
-#define CORTEX_IS_VALID_KERNEL_PRIORITY(n) \
- (((n) >= CORTEX_MAX_KERNEL_PRIORITY) && ((n) < CORTEX_PRIORITY_LEVELS))
+#define PORT_IRQ_IS_VALID_PRIORITY(n) \
+ (((n) >= 0U) && ((n) < CORTEX_PRIORITY_LEVELS))
/**
- * @brief Priority level to priority mask conversion macro.
+ * @brief Priority level verification macro.
*/
-#define CORTEX_PRIO_MASK(n) \
- ((n) << (8U - (unsigned)CORTEX_PRIORITY_BITS))
+#define PORT_IRQ_IS_VALID_KERNEL_PRIORITY(n) \
+ (((n) >= CORTEX_MAX_KERNEL_PRIORITY) && ((n) < CORTEX_PRIORITY_LEVELS))
/*===========================================================================*/
/* External declarations. */
diff --git a/os/nil/ports/ARMCMx/nilcore_v7m.h b/os/nil/ports/ARMCMx/nilcore_v7m.h index 4e7829d2d..d6317024e 100644 --- a/os/nil/ports/ARMCMx/nilcore_v7m.h +++ b/os/nil/ports/ARMCMx/nilcore_v7m.h @@ -110,7 +110,7 @@ */
#if !defined(CORTEX_PRIORITY_SVCALL)
#define CORTEX_PRIORITY_SVCALL (CORTEX_MAXIMUM_PRIORITY + 1U)
-#elif !CORTEX_IS_VALID_PRIORITY(CORTEX_PRIORITY_SVCALL)
+#elif !PORT_IRQ_IS_VALID_PRIORITY(CORTEX_PRIORITY_SVCALL)
/* If it is externally redefined then better perform a validity check on it.*/
#error "invalid priority level specified for CORTEX_PRIORITY_SVCALL"
#endif
diff --git a/os/nil/templates/nilcore.h b/os/nil/templates/nilcore.h index b2b71ce48..1aad42ddc 100644 --- a/os/nil/templates/nilcore.h +++ b/os/nil/templates/nilcore.h @@ -160,6 +160,16 @@ struct port_intctx { (size_t)(PORT_INT_REQUIRED_STACK))
/**
+ * @brief Priority level verification macro.
+ */
+#define PORT_IRQ_IS_VALID_PRIORITY(n) false
+
+/**
+ * @brief Priority level verification macro.
+ */
+#define PORT_IRQ_IS_VALID_KERNEL_PRIORITY(n) false
+
+/**
* @brief IRQ prologue code.
* @details This macro must be inserted at the start of all IRQ handlers
* enabled to invoke system APIs.
diff --git a/os/rt/include/chsys.h b/os/rt/include/chsys.h index 888e98b5c..9d1bff204 100644 --- a/os/rt/include/chsys.h +++ b/os/rt/include/chsys.h @@ -64,6 +64,42 @@ * @name ISRs abstraction macros
*/
/**
+ * @brief Priority level validation macro.
+ * @details This macro determines if the passed value is a valid priority
+ * level for the underlying architecture.
+ *
+ * @param[in] prio the priority level
+ * @return Priority range result.
+ * @false if the priority is invalid or if the architecture
+ * does not support priorities.
+ * @true if the priority is valid.
+ */
+#if defined(PORT_IRQ_IS_VALID_PRIORITY) || defined(__DOXYGEN__)
+#define CH_IRQ_IS_VALID_PRIORITY(prio) \
+ PORT_IRQ_IS_VALID_PRIORITY(prio)
+#else
+#define CH_IRQ_IS_VALID_PRIORITY(prio) false
+#endif
+
+/**
+ * @brief Priority level validation macro.
+ * @details This macro determines if the passed value is a valid priority
+ * level that cannot preempt the kernel critical zone.
+ *
+ * @param[in] prio the priority level
+ * @return Priority range result.
+ * @false if the priority is invalid or if the architecture
+ * does not support priorities.
+ * @true if the priority is valid.
+ */
+#if defined(PORT_IRQ_IS_VALID_KERNEL_PRIORITY) || defined(__DOXYGEN__)
+#define CH_IRQ_IS_VALID_KERNEL_PRIORITY(prio) \
+ PORT_IRQ_IS_VALID_KERNEL_PRIORITY(prio)
+#else
+#define CH_IRQ_IS_VALID_KERNEL_PRIORITY(prio) false
+#endif
+
+/**
* @brief IRQ handler enter code.
* @note Usually IRQ handlers functions are also declared naked.
* @note On some architectures this macro can be empty.
diff --git a/os/rt/ports/ARMCMx/chcore.h b/os/rt/ports/ARMCMx/chcore.h index abf0b4596..11d14234e 100644 --- a/os/rt/ports/ARMCMx/chcore.h +++ b/os/rt/ports/ARMCMx/chcore.h @@ -163,22 +163,22 @@ struct context { #define CORTEX_MAXIMUM_PRIORITY 0U
/**
- * @brief Priority level verification macro.
+ * @brief Priority level to priority mask conversion macro.
*/
-#define CORTEX_IS_VALID_PRIORITY(n) \
- (((n) >= 0) && ((n) < CORTEX_PRIORITY_LEVELS))
+#define CORTEX_PRIO_MASK(n) \
+ ((n) << (8U - (unsigned)CORTEX_PRIORITY_BITS))
/**
* @brief Priority level verification macro.
*/
-#define CORTEX_IS_VALID_KERNEL_PRIORITY(n) \
- (((n) >= CORTEX_MAX_KERNEL_PRIORITY) && ((n) < CORTEX_PRIORITY_LEVELS))
+#define PORT_IRQ_IS_VALID_PRIORITY(n) \
+ (((n) >= 0U) && ((n) < CORTEX_PRIORITY_LEVELS))
/**
- * @brief Priority level to priority mask conversion macro.
+ * @brief Priority level verification macro.
*/
-#define CORTEX_PRIO_MASK(n) \
- ((n) << (8U - (unsigned)CORTEX_PRIORITY_BITS))
+#define PORT_IRQ_IS_VALID_KERNEL_PRIORITY(n) \
+ (((n) >= CORTEX_MAX_KERNEL_PRIORITY) && ((n) < CORTEX_PRIORITY_LEVELS))
/*===========================================================================*/
/* External declarations. */
diff --git a/os/rt/ports/ARMCMx/chcore_v7m.h b/os/rt/ports/ARMCMx/chcore_v7m.h index b437a8fad..37e087102 100644 --- a/os/rt/ports/ARMCMx/chcore_v7m.h +++ b/os/rt/ports/ARMCMx/chcore_v7m.h @@ -110,7 +110,7 @@ */
#if !defined(CORTEX_PRIORITY_SVCALL)
#define CORTEX_PRIORITY_SVCALL (CORTEX_MAXIMUM_PRIORITY + 1U)
-#elif !CORTEX_IS_VALID_PRIORITY(CORTEX_PRIORITY_SVCALL)
+#elif !PORT_IRQ_IS_VALID_PRIORITY(CORTEX_PRIORITY_SVCALL)
/* If it is externally redefined then better perform a validity check on it.*/
#error "invalid priority level specified for CORTEX_PRIORITY_SVCALL"
#endif
diff --git a/os/rt/templates/chcore.h b/os/rt/templates/chcore.h index 39d173608..bcc47a0f4 100644 --- a/os/rt/templates/chcore.h +++ b/os/rt/templates/chcore.h @@ -180,6 +180,16 @@ struct context { ((size_t)(n)) + ((size_t)(PORT_INT_REQUIRED_STACK)))
/**
+ * @brief Priority level verification macro.
+ */
+#define PORT_IRQ_IS_VALID_PRIORITY(n) false
+
+/**
+ * @brief Priority level verification macro.
+ */
+#define PORT_IRQ_IS_VALID_KERNEL_PRIORITY(n) false
+
+/**
* @brief IRQ prologue code.
* @details This macro must be inserted at the start of all IRQ handlers
* enabled to invoke system APIs.
|