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-rw-r--r--os/hal/ports/STM32/LLD/TIMv1/tim_irq_mapping.txt2
-rw-r--r--os/hal/ports/STM32/STM32L0xx/stm32_rcc.h23
-rw-r--r--os/hal/ports/STM32/STM32L0xx/stm32_registry.h25
-rw-r--r--readme.txt4
4 files changed, 39 insertions, 15 deletions
diff --git a/os/hal/ports/STM32/LLD/TIMv1/tim_irq_mapping.txt b/os/hal/ports/STM32/LLD/TIMv1/tim_irq_mapping.txt
index f2abe5efc..ed215722f 100644
--- a/os/hal/ports/STM32/LLD/TIMv1/tim_irq_mapping.txt
+++ b/os/hal/ports/STM32/LLD/TIMv1/tim_irq_mapping.txt
@@ -9,6 +9,6 @@ F3xx 1 2 3 * * * * * * * * * *
F37x * * * * * * * * * * * * * *
F4xx 1 2 3 * * * * * * * 4 5 6 * 1 2 3 4 5 6
F7xx 1 2 3 * * * * * * * 4 5 6 * 1 2 3 4 5 6 *
-L0xx * * * * *
+L0xx * * * * * * *
L1xx * * * * * * * * *
L4xx 1 2 3 * * * * * * * * * * * 1 2 3 * *
diff --git a/os/hal/ports/STM32/STM32L0xx/stm32_rcc.h b/os/hal/ports/STM32/STM32L0xx/stm32_rcc.h
index 510ecb6dc..b8f2b6d7e 100644
--- a/os/hal/ports/STM32/STM32L0xx/stm32_rcc.h
+++ b/os/hal/ports/STM32/STM32L0xx/stm32_rcc.h
@@ -489,6 +489,29 @@
#define rccResetTIM2() rccResetAPB1(RCC_APB1RSTR_TIM2RST)
/**
+ * @brief Enables the TIM3 peripheral clock.
+ *
+ * @param[in] lp low power enable flag
+ *
+ * @api
+ */
+#define rccEnableTIM3(lp) rccEnableAPB1(RCC_APB1ENR_TIM3EN, lp)
+
+/**
+ * @brief Disables the TIM3 peripheral clock.
+ *
+ * @api
+ */
+#define rccDisableTIM3() rccDisableAPB1(RCC_APB1ENR_TIM3EN)
+
+/**
+ * @brief Resets the TIM3 peripheral.
+ *
+ * @api
+ */
+#define rccResetTIM3() rccResetAPB1(RCC_APB1RSTR_TIM3RST)
+
+/**
* @brief Enables the TIM6 peripheral clock.
*
* @param[in] lp low power enable flag
diff --git a/os/hal/ports/STM32/STM32L0xx/stm32_registry.h b/os/hal/ports/STM32/STM32L0xx/stm32_registry.h
index 1a0381bf5..f3ea21b41 100644
--- a/os/hal/ports/STM32/STM32L0xx/stm32_registry.h
+++ b/os/hal/ports/STM32/STM32L0xx/stm32_registry.h
@@ -34,7 +34,7 @@
* @{
*/
/*===========================================================================*/
-/* STM32L011xx */
+/* STM32L011xx. */
/*===========================================================================*/
#if defined(STM32L011xx) || defined(__DOXYGEN__)
@@ -252,9 +252,9 @@
#define STM32_CRC_PROGRAMMABLE TRUE
/*===========================================================================*/
-/* STM32L031xx */
+/* STM32L031xx. */
/*===========================================================================*/
-#elif defined(STM32L031xx) || defined(__DOXYGEN__)
+#elif defined(STM32L031xx)
/* ADC attributes.*/
#define STM32_HAS_ADC1 TRUE
@@ -473,10 +473,9 @@
#define STM32_CRC_PROGRAMMABLE TRUE
/*===========================================================================*/
-/* STM32L051xx, STM32L061xx */
+/* STM32L051xx, STM32L061xx. */
/*===========================================================================*/
-#elif defined(STM32L051xx) || defined(STM32L061xx) || \
- defined(__DOXYGEN__)
+#elif defined(STM32L051xx) || defined(STM32L061xx)
/* ADC attributes.*/
#define STM32_HAS_ADC1 TRUE
@@ -728,8 +727,7 @@
/*===========================================================================*/
/* STM32L052xx, STM32L062xx. */
/*===========================================================================*/
-#elif defined(STM32L052xx) || defined(STM32L062xx) || \
- defined(__DOXYGEN__)
+#elif defined(STM32L052xx) || defined(STM32L062xx)
/* ADC attributes.*/
#define STM32_HAS_ADC1 TRUE
@@ -988,8 +986,7 @@
/*===========================================================================*/
/* STM32L053xx, STM32L063xx. */
/*===========================================================================*/
-#elif defined(STM32L053xx) || defined(STM32L063xx) || \
- defined(__DOXYGEN__)
+#elif defined(STM32L053xx) || defined(STM32L063xx)
/* ADC attributes.*/
#define STM32_HAS_ADC1 TRUE
@@ -1246,9 +1243,9 @@
#define STM32_CRC_PROGRAMMABLE TRUE
/*===========================================================================*/
-/* STM32L071xx */
+/* STM32L071xx. */
/*===========================================================================*/
-#elif defined(STM32L071xx) || defined(__DOXYGEN__)
+#elif defined(STM32L071xx)
/* ADC attributes.*/
#define STM32_HAS_ADC1 TRUE
@@ -1543,9 +1540,9 @@
#define STM32_CRC_PROGRAMMABLE TRUE
/*===========================================================================*/
-/* STM32L072xx/STM32L073xx */
+/* STM32L072xx, STM32L073xx. */
/*===========================================================================*/
-#elif defined(STM32L072xx) || defined(STM32L073xx) || defined(__DOXYGEN__)
+#elif defined(STM32L072xx) || defined(STM32L073xx)
/* ADC attributes.*/
#define STM32_HAS_ADC1 TRUE
diff --git a/readme.txt b/readme.txt
index 49c390c75..df4a0a985 100644
--- a/readme.txt
+++ b/readme.txt
@@ -151,6 +151,10 @@
- EX: Updated LIS302DL to 1.1.0 (backported to 18.2.1).
- EX: Updated LPS25H to 1.1.0 (backported to 18.2.1).
- EX: Updated LSM303DLHC to 1.1.0 (backported to 18.2.1).
+- HAL: Fixed mTM32L071/72 entries in registry (bug #981)
+ (backported to 18.2.2 and 17.6.5).
+- HAL: Fixed TIM3 missing from STM32L0xx RCC macros (bug #980)
+ (backported to 18.2.2 and 17.6.5).
- HAL: Fixed invalid STM32 ADCv3 clock selection for L4 and L4+ (bug #979)
(backported to 18.2.2 and 17.6.5).
- HAL: Fixed wrong number of endpoints fot STM32F412/413 (bug #978)