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| author | Giovanni Di Sirio <gdisirio@gmail.com> | 2018-10-06 07:58:27 +0000 |
|---|---|---|
| committer | Giovanni Di Sirio <gdisirio@gmail.com> | 2018-10-06 07:58:27 +0000 |
| commit | aaa6abebeef05bb1e9a69e5c97d42bb373968412 (patch) | |
| tree | 979c3fd295692224fbffbe9ca8fcea7e4bc38de8 /tools | |
| parent | 9b62a3a6e9af1d53dd4cc0fdb02ee1bf7b45137a (diff) | |
| download | ChibiOS-aaa6abebeef05bb1e9a69e5c97d42bb373968412.tar.gz ChibiOS-aaa6abebeef05bb1e9a69e5c97d42bb373968412.tar.bz2 ChibiOS-aaa6abebeef05bb1e9a69e5c97d42bb373968412.zip | |
Generator for STM32F76x/77x mcuconf.h files.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12334 110e8d01-0319-4d1e-a829-52ad28d1bb01
Diffstat (limited to 'tools')
| -rw-r--r-- | tools/ftl/processors/conf/mcuconf_stm32f76xxx/mcuconf.h.ftl (renamed from tools/ftl/processors/conf/mcuconf_stm32f767xx/mcuconf.h.ftl) | 12 |
1 files changed, 10 insertions, 2 deletions
diff --git a/tools/ftl/processors/conf/mcuconf_stm32f767xx/mcuconf.h.ftl b/tools/ftl/processors/conf/mcuconf_stm32f76xxx/mcuconf.h.ftl index 042a9687e..c306fab16 100644 --- a/tools/ftl/processors/conf/mcuconf_stm32f767xx/mcuconf.h.ftl +++ b/tools/ftl/processors/conf/mcuconf_stm32f76xxx/mcuconf.h.ftl @@ -43,8 +43,11 @@ */
#define STM32F7xx_MCUCONF
-#define STM32F746_MCUCONF
-#define STM32F756_MCUCONF
+#define STM32F765_MCUCONF
+#define STM32F767_MCUCONF
+#define STM32F777_MCUCONF
+#define STM32F769_MCUCONF
+#define STM32F779_MCUCONF
/*
* HAL driver system settings.
@@ -104,6 +107,7 @@ #define STM32_CECSEL ${doc.STM32_CECSEL!"STM32_CECSEL_LSE"}
#define STM32_CK48MSEL ${doc.STM32_CK48MSEL!"STM32_CK48MSEL_PLL"}
#define STM32_SDMMC1SEL ${doc.STM32_SDMMC1SEL!"STM32_SDMMC1SEL_PLL48CLK"}
+#define STM32_SDMMC2SEL ${doc.STM32_SDMMC2SEL!"STM32_SDMMC2SEL_PLL48CLK"}
#define STM32_SRAM2_NOCACHE ${doc.STM32_SRAM2_NOCACHE!"FALSE"}
/*
@@ -271,13 +275,17 @@ * SDC driver system settings.
*/
#define STM32_SDC_USE_SDMMC1 ${doc.STM32_SDC_USE_SDMMC1!"FALSE"}
+#define STM32_SDC_USE_SDMMC2 ${doc.STM32_SDC_USE_SDMMC2!"FALSE"}
#define STM32_SDC_SDMMC_UNALIGNED_SUPPORT ${doc.STM32_SDC_SDMMC_UNALIGNED_SUPPORT!"TRUE"}
#define STM32_SDC_SDMMC_WRITE_TIMEOUT ${doc.STM32_SDC_SDMMC_WRITE_TIMEOUT!"1000"}
#define STM32_SDC_SDMMC_READ_TIMEOUT ${doc.STM32_SDC_SDMMC_READ_TIMEOUT!"1000"}
#define STM32_SDC_SDMMC_CLOCK_DELAY ${doc.STM32_SDC_SDMMC_CLOCK_DELAY!"10"}
#define STM32_SDC_SDMMC1_DMA_STREAM ${doc.STM32_SDC_SDMMC1_DMA_STREAM!"STM32_DMA_STREAM_ID(2, 3)"}
+#define STM32_SDC_SDMMC2_DMA_STREAM ${doc.STM32_SDC_SDMMC2_DMA_STREAM!"STM32_DMA_STREAM_ID(2, 0)"}
#define STM32_SDC_SDMMC1_DMA_PRIORITY ${doc.STM32_SDC_SDMMC1_DMA_PRIORITY!"3"}
+#define STM32_SDC_SDMMC2_DMA_PRIORITY ${doc.STM32_SDC_SDMMC2_DMA_PRIORITY!"3"}
#define STM32_SDC_SDMMC1_IRQ_PRIORITY ${doc.STM32_SDC_SDMMC1_IRQ_PRIORITY!"9"}
+#define STM32_SDC_SDMMC2_IRQ_PRIORITY ${doc.STM32_SDC_SDMMC2_IRQ_PRIORITY!"9"}
/*
* SERIAL driver system settings.
|