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authorRocco Marco Guglielmi <roccomarco.guglielmi@live.com>2016-03-06 20:24:38 +0000
committerRocco Marco Guglielmi <roccomarco.guglielmi@live.com>2016-03-06 20:24:38 +0000
commite080a1b8b6e19507b50cf364a8c930698d92739c (patch)
treedae59b34ffffbd5ffb7be1aed40df028d8d8f2d1 /testhal
parent92c4f97fa4be92ae2ae2f0d7ee4aaa1353fe000f (diff)
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Added L3GD20 shared SPI switch,
Minor indent fixes. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@9045 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'testhal')
-rw-r--r--testhal/STM32/STM32L4xx/SPI-L3GD20/main.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/testhal/STM32/STM32L4xx/SPI-L3GD20/main.c b/testhal/STM32/STM32L4xx/SPI-L3GD20/main.c
index b07e384ce..b7a837c80 100644
--- a/testhal/STM32/STM32L4xx/SPI-L3GD20/main.c
+++ b/testhal/STM32/STM32L4xx/SPI-L3GD20/main.c
@@ -46,7 +46,7 @@ static L3GD20Config l3gd20cfg = {
&SPID2, /* Pointer to SPI Driver */
&spicfg, /* Pointer to SPI Configuration */
L3GD20_FS_250DPS, /* Full scale value */
- L3GD20_ODR_760HZ_FC_100, /* Output data rate */
+ L3GD20_ODR_760HZ_FC_30, /* Output data rate */
L3GD20_AE_XYZ, /* Enabled axes */
L3GD20_BDU_BLOCKED, /* Block data update */
L3GD20_END_LITTLE /* Endianness */