I2C. Priorities rebalanced. I2C pushed over other peripherals as a workaround on buggy i2c cell in STM32.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4570 35acf78f-673a-0410-8e92-d51de3d6d3f4

39 files changed, 278 insertions, 278 deletions

diff --git a/testhal/STM32F1xx/ADC/mcuconf.h b/testhal/STM32F1xx/ADC/mcuconf.h
index 637d4b26f..c49fa23ba 100644
--- a/testhal/STM32F1xx/ADC/mcuconf.h
+++ b/testhal/STM32F1xx/ADC/mcuconf.h
@@ -60,7 +60,7 @@
  */

 #define STM32_ADC_USE_ADC1                  TRUE

 #define STM32_ADC_ADC1_DMA_PRIORITY         2

-#define STM32_ADC_ADC1_IRQ_PRIORITY         5

+#define STM32_ADC_ADC1_IRQ_PRIORITY         6

 

 /*

  * CAN driver system settings.

@@ -105,12 +105,12 @@
 #define STM32_I2C_USE_I2C1                  FALSE

 #define STM32_I2C_USE_I2C2                  FALSE

 #define STM32_I2C_USE_I2C3                  FALSE

-#define STM32_I2C_I2C1_IRQ_PRIORITY         10

-#define STM32_I2C_I2C2_IRQ_PRIORITY         10

-#define STM32_I2C_I2C3_IRQ_PRIORITY         10

-#define STM32_I2C_I2C1_DMA_PRIORITY         1

-#define STM32_I2C_I2C2_DMA_PRIORITY         1

-#define STM32_I2C_I2C3_DMA_PRIORITY         1

+#define STM32_I2C_I2C1_IRQ_PRIORITY         5

+#define STM32_I2C_I2C2_IRQ_PRIORITY         5

+#define STM32_I2C_I2C3_IRQ_PRIORITY         5

+#define STM32_I2C_I2C1_DMA_PRIORITY         3

+#define STM32_I2C_I2C2_DMA_PRIORITY         3

+#define STM32_I2C_I2C3_DMA_PRIORITY         3

 #define STM32_I2C_I2C1_DMA_ERROR_HOOK()     chSysHalt()

 #define STM32_I2C_I2C2_DMA_ERROR_HOOK()     chSysHalt()

 #define STM32_I2C_I2C3_DMA_ERROR_HOOK()     chSysHalt()

diff --git a/testhal/STM32F1xx/CAN/mcuconf.h b/testhal/STM32F1xx/CAN/mcuconf.h
index 637d4b26f..c49fa23ba 100644
--- a/testhal/STM32F1xx/CAN/mcuconf.h
+++ b/testhal/STM32F1xx/CAN/mcuconf.h
@@ -60,7 +60,7 @@
  */

 #define STM32_ADC_USE_ADC1                  TRUE

 #define STM32_ADC_ADC1_DMA_PRIORITY         2

-#define STM32_ADC_ADC1_IRQ_PRIORITY         5

+#define STM32_ADC_ADC1_IRQ_PRIORITY         6

 

 /*

  * CAN driver system settings.

@@ -105,12 +105,12 @@
 #define STM32_I2C_USE_I2C1                  FALSE

 #define STM32_I2C_USE_I2C2                  FALSE

 #define STM32_I2C_USE_I2C3                  FALSE

-#define STM32_I2C_I2C1_IRQ_PRIORITY         10

-#define STM32_I2C_I2C2_IRQ_PRIORITY         10

-#define STM32_I2C_I2C3_IRQ_PRIORITY         10

-#define STM32_I2C_I2C1_DMA_PRIORITY         1

-#define STM32_I2C_I2C2_DMA_PRIORITY         1

-#define STM32_I2C_I2C3_DMA_PRIORITY         1

+#define STM32_I2C_I2C1_IRQ_PRIORITY         5

+#define STM32_I2C_I2C2_IRQ_PRIORITY         5

+#define STM32_I2C_I2C3_IRQ_PRIORITY         5

+#define STM32_I2C_I2C1_DMA_PRIORITY         3

+#define STM32_I2C_I2C2_DMA_PRIORITY         3

+#define STM32_I2C_I2C3_DMA_PRIORITY         3

 #define STM32_I2C_I2C1_DMA_ERROR_HOOK()     chSysHalt()

 #define STM32_I2C_I2C2_DMA_ERROR_HOOK()     chSysHalt()

 #define STM32_I2C_I2C3_DMA_ERROR_HOOK()     chSysHalt()

diff --git a/testhal/STM32F1xx/EXT/mcuconf.h b/testhal/STM32F1xx/EXT/mcuconf.h
index 637d4b26f..c49fa23ba 100644
--- a/testhal/STM32F1xx/EXT/mcuconf.h
+++ b/testhal/STM32F1xx/EXT/mcuconf.h
@@ -60,7 +60,7 @@
  */

 #define STM32_ADC_USE_ADC1                  TRUE

 #define STM32_ADC_ADC1_DMA_PRIORITY         2

-#define STM32_ADC_ADC1_IRQ_PRIORITY         5

+#define STM32_ADC_ADC1_IRQ_PRIORITY         6

 

 /*

  * CAN driver system settings.

@@ -105,12 +105,12 @@
 #define STM32_I2C_USE_I2C1                  FALSE

 #define STM32_I2C_USE_I2C2                  FALSE

 #define STM32_I2C_USE_I2C3                  FALSE

-#define STM32_I2C_I2C1_IRQ_PRIORITY         10

-#define STM32_I2C_I2C2_IRQ_PRIORITY         10

-#define STM32_I2C_I2C3_IRQ_PRIORITY         10

-#define STM32_I2C_I2C1_DMA_PRIORITY         1

-#define STM32_I2C_I2C2_DMA_PRIORITY         1

-#define STM32_I2C_I2C3_DMA_PRIORITY         1

+#define STM32_I2C_I2C1_IRQ_PRIORITY         5

+#define STM32_I2C_I2C2_IRQ_PRIORITY         5

+#define STM32_I2C_I2C3_IRQ_PRIORITY         5

+#define STM32_I2C_I2C1_DMA_PRIORITY         3

+#define STM32_I2C_I2C2_DMA_PRIORITY         3

+#define STM32_I2C_I2C3_DMA_PRIORITY         3

 #define STM32_I2C_I2C1_DMA_ERROR_HOOK()     chSysHalt()

 #define STM32_I2C_I2C2_DMA_ERROR_HOOK()     chSysHalt()

 #define STM32_I2C_I2C3_DMA_ERROR_HOOK()     chSysHalt()

diff --git a/testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h b/testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h
index d13f2ad3c..a9eb9f298 100644
--- a/testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h
+++ b/testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h
@@ -60,7 +60,7 @@
  */

 #define STM32_ADC_USE_ADC1                  TRUE

 #define STM32_ADC_ADC1_DMA_PRIORITY         2

-#define STM32_ADC_ADC1_IRQ_PRIORITY         5

+#define STM32_ADC_ADC1_IRQ_PRIORITY         6

 

 /*

  * CAN driver system settings.

@@ -105,12 +105,12 @@
 #define STM32_I2C_USE_I2C1                  FALSE

 #define STM32_I2C_USE_I2C2                  FALSE

 #define STM32_I2C_USE_I2C3                  FALSE

-#define STM32_I2C_I2C1_IRQ_PRIORITY         10

-#define STM32_I2C_I2C2_IRQ_PRIORITY         10

-#define STM32_I2C_I2C3_IRQ_PRIORITY         10

-#define STM32_I2C_I2C1_DMA_PRIORITY         1

-#define STM32_I2C_I2C2_DMA_PRIORITY         1

-#define STM32_I2C_I2C3_DMA_PRIORITY         1

+#define STM32_I2C_I2C1_IRQ_PRIORITY         5

+#define STM32_I2C_I2C2_IRQ_PRIORITY         5

+#define STM32_I2C_I2C3_IRQ_PRIORITY         5

+#define STM32_I2C_I2C1_DMA_PRIORITY         3

+#define STM32_I2C_I2C2_DMA_PRIORITY         3

+#define STM32_I2C_I2C3_DMA_PRIORITY         3

 #define STM32_I2C_I2C1_DMA_ERROR_HOOK()     chSysHalt()

 #define STM32_I2C_I2C2_DMA_ERROR_HOOK()     chSysHalt()

 #define STM32_I2C_I2C3_DMA_ERROR_HOOK()     chSysHalt()

diff --git a/testhal/STM32F1xx/GPT/mcuconf.h b/testhal/STM32F1xx/GPT/mcuconf.h
index b676befa3..49b7dfa48 100644
--- a/testhal/STM32F1xx/GPT/mcuconf.h
+++ b/testhal/STM32F1xx/GPT/mcuconf.h
@@ -60,7 +60,7 @@
  */

 #define STM32_ADC_USE_ADC1                  TRUE

 #define STM32_ADC_ADC1_DMA_PRIORITY         2

-#define STM32_ADC_ADC1_IRQ_PRIORITY         5

+#define STM32_ADC_ADC1_IRQ_PRIORITY         6

 

 /*

  * CAN driver system settings.

@@ -105,12 +105,12 @@
 #define STM32_I2C_USE_I2C1                  FALSE

 #define STM32_I2C_USE_I2C2                  FALSE

 #define STM32_I2C_USE_I2C3                  FALSE

-#define STM32_I2C_I2C1_IRQ_PRIORITY         10

-#define STM32_I2C_I2C2_IRQ_PRIORITY         10

-#define STM32_I2C_I2C3_IRQ_PRIORITY         10

-#define STM32_I2C_I2C1_DMA_PRIORITY         1

-#define STM32_I2C_I2C2_DMA_PRIORITY         1

-#define STM32_I2C_I2C3_DMA_PRIORITY         1

+#define STM32_I2C_I2C1_IRQ_PRIORITY         5

+#define STM32_I2C_I2C2_IRQ_PRIORITY         5

+#define STM32_I2C_I2C3_IRQ_PRIORITY         5

+#define STM32_I2C_I2C1_DMA_PRIORITY         3

+#define STM32_I2C_I2C2_DMA_PRIORITY         3

+#define STM32_I2C_I2C3_DMA_PRIORITY         3

 #define STM32_I2C_I2C1_DMA_ERROR_HOOK()     chSysHalt()

 #define STM32_I2C_I2C2_DMA_ERROR_HOOK()     chSysHalt()

 #define STM32_I2C_I2C3_DMA_ERROR_HOOK()     chSysHalt()

diff --git a/testhal/STM32F1xx/I2C/mcuconf.h b/testhal/STM32F1xx/I2C/mcuconf.h
index 67c11c072..8478853cd 100644
--- a/testhal/STM32F1xx/I2C/mcuconf.h
+++ b/testhal/STM32F1xx/I2C/mcuconf.h
@@ -60,7 +60,7 @@
  */

 #define STM32_ADC_USE_ADC1                  TRUE

 #define STM32_ADC_ADC1_DMA_PRIORITY         2

-#define STM32_ADC_ADC1_IRQ_PRIORITY         5

+#define STM32_ADC_ADC1_IRQ_PRIORITY         6

 

 /*

  * CAN driver system settings.

@@ -105,12 +105,12 @@
 #define STM32_I2C_USE_I2C1                  TRUE

 #define STM32_I2C_USE_I2C2                  FALSE

 #define STM32_I2C_USE_I2C3                  FALSE

-#define STM32_I2C_I2C1_IRQ_PRIORITY         10

-#define STM32_I2C_I2C2_IRQ_PRIORITY         10

-#define STM32_I2C_I2C3_IRQ_PRIORITY         10

-#define STM32_I2C_I2C1_DMA_PRIORITY         1

-#define STM32_I2C_I2C2_DMA_PRIORITY         1

-#define STM32_I2C_I2C3_DMA_PRIORITY         1

+#define STM32_I2C_I2C1_IRQ_PRIORITY         5

+#define STM32_I2C_I2C2_IRQ_PRIORITY         5

+#define STM32_I2C_I2C3_IRQ_PRIORITY         5

+#define STM32_I2C_I2C1_DMA_PRIORITY         3

+#define STM32_I2C_I2C2_DMA_PRIORITY         3

+#define STM32_I2C_I2C3_DMA_PRIORITY         3

 #define STM32_I2C_I2C1_DMA_ERROR_HOOK()     chSysHalt()

 #define STM32_I2C_I2C2_DMA_ERROR_HOOK()     chSysHalt()

 #define STM32_I2C_I2C3_DMA_ERROR_HOOK()     chSysHalt()

diff --git a/testhal/STM32F1xx/IRQ_STORM/mcuconf.h b/testhal/STM32F1xx/IRQ_STORM/mcuconf.h
index 08c964954..27d9b034a 100644
--- a/testhal/STM32F1xx/IRQ_STORM/mcuconf.h
+++ b/testhal/STM32F1xx/IRQ_STORM/mcuconf.h
@@ -60,7 +60,7 @@
  */

 #define STM32_ADC_USE_ADC1                  TRUE

 #define STM32_ADC_ADC1_DMA_PRIORITY         2

-#define STM32_ADC_ADC1_IRQ_PRIORITY         5

+#define STM32_ADC_ADC1_IRQ_PRIORITY         6

 

 /*

  * CAN driver system settings.

@@ -105,12 +105,12 @@
 #define STM32_I2C_USE_I2C1                  FALSE

 #define STM32_I2C_USE_I2C2                  FALSE

 #define STM32_I2C_USE_I2C3                  FALSE

-#define STM32_I2C_I2C1_IRQ_PRIORITY         10

-#define STM32_I2C_I2C2_IRQ_PRIORITY         10

-#define STM32_I2C_I2C3_IRQ_PRIORITY         10

-#define STM32_I2C_I2C1_DMA_PRIORITY         1

-#define STM32_I2C_I2C2_DMA_PRIORITY         1

-#define STM32_I2C_I2C3_DMA_PRIORITY         1

+#define STM32_I2C_I2C1_IRQ_PRIORITY         5

+#define STM32_I2C_I2C2_IRQ_PRIORITY         5

+#define STM32_I2C_I2C3_IRQ_PRIORITY         5

+#define STM32_I2C_I2C1_DMA_PRIORITY         3

+#define STM32_I2C_I2C2_DMA_PRIORITY         3

+#define STM32_I2C_I2C3_DMA_PRIORITY         3

 #define STM32_I2C_I2C1_DMA_ERROR_HOOK()     chSysHalt()

 #define STM32_I2C_I2C2_DMA_ERROR_HOOK()     chSysHalt()

 #define STM32_I2C_I2C3_DMA_ERROR_HOOK()     chSysHalt()

diff --git a/testhal/STM32F1xx/MAC/mcuconf.h b/testhal/STM32F1xx/MAC/mcuconf.h
index f6cafb56e..d12835c04 100644
--- a/testhal/STM32F1xx/MAC/mcuconf.h
+++ b/testhal/STM32F1xx/MAC/mcuconf.h
@@ -65,7 +65,7 @@
  */

 #define STM32_ADC_USE_ADC1                  TRUE

 #define STM32_ADC_ADC1_DMA_PRIORITY         2

-#define STM32_ADC_ADC1_IRQ_PRIORITY         5

+#define STM32_ADC_ADC1_IRQ_PRIORITY         6

 

 /*

  * CAN driver system settings.

@@ -110,12 +110,12 @@
 #define STM32_I2C_USE_I2C1                  FALSE

 #define STM32_I2C_USE_I2C2                  FALSE

 #define STM32_I2C_USE_I2C3                  FALSE

-#define STM32_I2C_I2C1_IRQ_PRIORITY         10

-#define STM32_I2C_I2C2_IRQ_PRIORITY         10

-#define STM32_I2C_I2C3_IRQ_PRIORITY         10

-#define STM32_I2C_I2C1_DMA_PRIORITY         1

-#define STM32_I2C_I2C2_DMA_PRIORITY         1

-#define STM32_I2C_I2C3_DMA_PRIORITY         1

+#define STM32_I2C_I2C1_IRQ_PRIORITY         5

+#define STM32_I2C_I2C2_IRQ_PRIORITY         5

+#define STM32_I2C_I2C3_IRQ_PRIORITY         5

+#define STM32_I2C_I2C1_DMA_PRIORITY         3

+#define STM32_I2C_I2C2_DMA_PRIORITY         3

+#define STM32_I2C_I2C3_DMA_PRIORITY         3

 #define STM32_I2C_I2C1_DMA_ERROR_HOOK()     chSysHalt()

 #define STM32_I2C_I2C2_DMA_ERROR_HOOK()     chSysHalt()

 #define STM32_I2C_I2C3_DMA_ERROR_HOOK()     chSysHalt()

diff --git a/testhal/STM32F1xx/PVD/mcuconf.h b/testhal/STM32F1xx/PVD/mcuconf.h
index 637d4b26f..c49fa23ba 100644
--- a/testhal/STM32F1xx/PVD/mcuconf.h
+++ b/testhal/STM32F1xx/PVD/mcuconf.h
@@ -60,7 +60,7 @@
  */

 #define STM32_ADC_USE_ADC1                  TRUE

 #define STM32_ADC_ADC1_DMA_PRIORITY         2

-#define STM32_ADC_ADC1_IRQ_PRIORITY         5

+#define STM32_ADC_ADC1_IRQ_PRIORITY         6

 

 /*

  * CAN driver system settings.

@@ -105,12 +105,12 @@
 #define STM32_I2C_USE_I2C1                  FALSE

 #define STM32_I2C_USE_I2C2                  FALSE

 #define STM32_I2C_USE_I2C3                  FALSE

-#define STM32_I2C_I2C1_IRQ_PRIORITY         10

-#define STM32_I2C_I2C2_IRQ_PRIORITY         10

-#define STM32_I2C_I2C3_IRQ_PRIORITY         10

-#define STM32_I2C_I2C1_DMA_PRIORITY         1

-#define STM32_I2C_I2C2_DMA_PRIORITY         1

-#define STM32_I2C_I2C3_DMA_PRIORITY         1

+#define STM32_I2C_I2C1_IRQ_PRIORITY         5

+#define STM32_I2C_I2C2_IRQ_PRIORITY         5

+#define STM32_I2C_I2C3_IRQ_PRIORITY         5

+#define STM32_I2C_I2C1_DMA_PRIORITY         3

+#define STM32_I2C_I2C2_DMA_PRIORITY         3

+#define STM32_I2C_I2C3_DMA_PRIORITY         3

 #define STM32_I2C_I2C1_DMA_ERROR_HOOK()     chSysHalt()

 #define STM32_I2C_I2C2_DMA_ERROR_HOOK()     chSysHalt()

 #define STM32_I2C_I2C3_DMA_ERROR_HOOK()     chSysHalt()

diff --git a/testhal/STM32F1xx/PWM-ICU/mcuconf.h b/testhal/STM32F1xx/PWM-ICU/mcuconf.h
index f728d5a33..3aa45f2de 100644
--- a/testhal/STM32F1xx/PWM-ICU/mcuconf.h
+++ b/testhal/STM32F1xx/PWM-ICU/mcuconf.h
@@ -60,7 +60,7 @@
  */

 #define STM32_ADC_USE_ADC1                  TRUE

 #define STM32_ADC_ADC1_DMA_PRIORITY         2

-#define STM32_ADC_ADC1_IRQ_PRIORITY         5

+#define STM32_ADC_ADC1_IRQ_PRIORITY         6

 

 /*

  * CAN driver system settings.

@@ -105,12 +105,12 @@
 #define STM32_I2C_USE_I2C1                  FALSE

 #define STM32_I2C_USE_I2C2                  FALSE

 #define STM32_I2C_USE_I2C3                  FALSE

-#define STM32_I2C_I2C1_IRQ_PRIORITY         10

-#define STM32_I2C_I2C2_IRQ_PRIORITY         10

-#define STM32_I2C_I2C3_IRQ_PRIORITY         10

-#define STM32_I2C_I2C1_DMA_PRIORITY         1

-#define STM32_I2C_I2C2_DMA_PRIORITY         1

-#define STM32_I2C_I2C3_DMA_PRIORITY         1

+#define STM32_I2C_I2C1_IRQ_PRIORITY         5

+#define STM32_I2C_I2C2_IRQ_PRIORITY         5

+#define STM32_I2C_I2C3_IRQ_PRIORITY         5

+#define STM32_I2C_I2C1_DMA_PRIORITY         3

+#define STM32_I2C_I2C2_DMA_PRIORITY         3

+#define STM32_I2C_I2C3_DMA_PRIORITY         3

 #define STM32_I2C_I2C1_DMA_ERROR_HOOK()     chSysHalt()

 #define STM32_I2C_I2C2_DMA_ERROR_HOOK()     chSysHalt()

 #define STM32_I2C_I2C3_DMA_ERROR_HOOK()     chSysHalt()

diff --git a/testhal/STM32F1xx/RTC/mcuconf.h b/testhal/STM32F1xx/RTC/mcuconf.h
index 6220d2140..ce8a01498 100644
--- a/testhal/STM32F1xx/RTC/mcuconf.h
+++ b/testhal/STM32F1xx/RTC/mcuconf.h
@@ -60,7 +60,7 @@
  */

 #define STM32_ADC_USE_ADC1                  TRUE

 #define STM32_ADC_ADC1_DMA_PRIORITY         2

-#define STM32_ADC_ADC1_IRQ_PRIORITY         5

+#define STM32_ADC_ADC1_IRQ_PRIORITY         6

 

 /*

  * CAN driver system settings.

@@ -105,12 +105,12 @@
 #define STM32_I2C_USE_I2C1                  FALSE

 #define STM32_I2C_USE_I2C2                  FALSE

 #define STM32_I2C_USE_I2C3                  FALSE

-#define STM32_I2C_I2C1_IRQ_PRIORITY         10

-#define STM32_I2C_I2C2_IRQ_PRIORITY         10

-#define STM32_I2C_I2C3_IRQ_PRIORITY         10

-#define STM32_I2C_I2C1_DMA_PRIORITY         1

-#define STM32_I2C_I2C2_DMA_PRIORITY         1

-#define STM32_I2C_I2C3_DMA_PRIORITY         1

+#define STM32_I2C_I2C1_IRQ_PRIORITY         5

+#define STM32_I2C_I2C2_IRQ_PRIORITY         5

+#define STM32_I2C_I2C3_IRQ_PRIORITY         5

+#define STM32_I2C_I2C1_DMA_PRIORITY         3

+#define STM32_I2C_I2C2_DMA_PRIORITY         3

+#define STM32_I2C_I2C3_DMA_PRIORITY         3

 #define STM32_I2C_I2C1_DMA_ERROR_HOOK()     chSysHalt()

 #define STM32_I2C_I2C2_DMA_ERROR_HOOK()     chSysHalt()

 #define STM32_I2C_I2C3_DMA_ERROR_HOOK()     chSysHalt()

diff --git a/testhal/STM32F1xx/SDC/mcuconf.h b/testhal/STM32F1xx/SDC/mcuconf.h
index 637d4b26f..c49fa23ba 100644
--- a/testhal/STM32F1xx/SDC/mcuconf.h
+++ b/testhal/STM32F1xx/SDC/mcuconf.h
@@ -60,7 +60,7 @@
  */

 #define STM32_ADC_USE_ADC1                  TRUE

 #define STM32_ADC_ADC1_DMA_PRIORITY         2

-#define STM32_ADC_ADC1_IRQ_PRIORITY         5

+#define STM32_ADC_ADC1_IRQ_PRIORITY         6

 

 /*

  * CAN driver system settings.

@@ -105,12 +105,12 @@
 #define STM32_I2C_USE_I2C1                  FALSE

 #define STM32_I2C_USE_I2C2                  FALSE

 #define STM32_I2C_USE_I2C3                  FALSE

-#define STM32_I2C_I2C1_IRQ_PRIORITY         10

-#define STM32_I2C_I2C2_IRQ_PRIORITY         10

-#define STM32_I2C_I2C3_IRQ_PRIORITY         10

-#define STM32_I2C_I2C1_DMA_PRIORITY         1

-#define STM32_I2C_I2C2_DMA_PRIORITY         1

-#define STM32_I2C_I2C3_DMA_PRIORITY         1

+#define STM32_I2C_I2C1_IRQ_PRIORITY         5

+#define STM32_I2C_I2C2_IRQ_PRIORITY         5

+#define STM32_I2C_I2C3_IRQ_PRIORITY         5

+#define STM32_I2C_I2C1_DMA_PRIORITY         3

+#define STM32_I2C_I2C2_DMA_PRIORITY         3

+#define STM32_I2C_I2C3_DMA_PRIORITY         3

 #define STM32_I2C_I2C1_DMA_ERROR_HOOK()     chSysHalt()

 #define STM32_I2C_I2C2_DMA_ERROR_HOOK()     chSysHalt()

 #define STM32_I2C_I2C3_DMA_ERROR_HOOK()     chSysHalt()

diff --git a/testhal/STM32F1xx/SPI/mcuconf.h b/testhal/STM32F1xx/SPI/mcuconf.h
index b5079e96b..c4e65daf1 100644
--- a/testhal/STM32F1xx/SPI/mcuconf.h
+++ b/testhal/STM32F1xx/SPI/mcuconf.h
@@ -60,7 +60,7 @@
  */

 #define STM32_ADC_USE_ADC1                  TRUE

 #define STM32_ADC_ADC1_DMA_PRIORITY         2

-#define STM32_ADC_ADC1_IRQ_PRIORITY         5

+#define STM32_ADC_ADC1_IRQ_PRIORITY         6

 

 /*

  * CAN driver system settings.

@@ -105,12 +105,12 @@
 #define STM32_I2C_USE_I2C1                  FALSE

 #define STM32_I2C_USE_I2C2                  FALSE

 #define STM32_I2C_USE_I2C3                  FALSE

-#define STM32_I2C_I2C1_IRQ_PRIORITY         10

-#define STM32_I2C_I2C2_IRQ_PRIORITY         10

-#define STM32_I2C_I2C3_IRQ_PRIORITY         10

-#define STM32_I2C_I2C1_DMA_PRIORITY         1

-#define STM32_I2C_I2C2_DMA_PRIORITY         1

-#define STM32_I2C_I2C3_DMA_PRIORITY         1

+#define STM32_I2C_I2C1_IRQ_PRIORITY         5

+#define STM32_I2C_I2C2_IRQ_PRIORITY         5

+#define STM32_I2C_I2C3_IRQ_PRIORITY         5

+#define STM32_I2C_I2C1_DMA_PRIORITY         3

+#define STM32_I2C_I2C2_DMA_PRIORITY         3

+#define STM32_I2C_I2C3_DMA_PRIORITY         3

 #define STM32_I2C_I2C1_DMA_ERROR_HOOK()     chSysHalt()

 #define STM32_I2C_I2C2_DMA_ERROR_HOOK()     chSysHalt()

 #define STM32_I2C_I2C3_DMA_ERROR_HOOK()     chSysHalt()

diff --git a/testhal/STM32F1xx/UART/mcuconf.h b/testhal/STM32F1xx/UART/mcuconf.h
index 05dff0cdd..e90923442 100644
--- a/testhal/STM32F1xx/UART/mcuconf.h
+++ b/testhal/STM32F1xx/UART/mcuconf.h
@@ -60,7 +60,7 @@
  */

 #define STM32_ADC_USE_ADC1                  TRUE

 #define STM32_ADC_ADC1_DMA_PRIORITY         2

-#define STM32_ADC_ADC1_IRQ_PRIORITY         5

+#define STM32_ADC_ADC1_IRQ_PRIORITY         6

 

 /*

  * CAN driver system settings.

@@ -105,12 +105,12 @@
 #define STM32_I2C_USE_I2C1                  FALSE

 #define STM32_I2C_USE_I2C2                  FALSE

 #define STM32_I2C_USE_I2C3                  FALSE

-#define STM32_I2C_I2C1_IRQ_PRIORITY         10

-#define STM32_I2C_I2C2_IRQ_PRIORITY         10

-#define STM32_I2C_I2C3_IRQ_PRIORITY         10

-#define STM32_I2C_I2C1_DMA_PRIORITY         1

-#define STM32_I2C_I2C2_DMA_PRIORITY         1

-#define STM32_I2C_I2C3_DMA_PRIORITY         1

+#define STM32_I2C_I2C1_IRQ_PRIORITY         5

+#define STM32_I2C_I2C2_IRQ_PRIORITY         5

+#define STM32_I2C_I2C3_IRQ_PRIORITY         5

+#define STM32_I2C_I2C1_DMA_PRIORITY         3

+#define STM32_I2C_I2C2_DMA_PRIORITY         3

+#define STM32_I2C_I2C3_DMA_PRIORITY         3

 #define STM32_I2C_I2C1_DMA_ERROR_HOOK()     chSysHalt()

 #define STM32_I2C_I2C2_DMA_ERROR_HOOK()     chSysHalt()

 #define STM32_I2C_I2C3_DMA_ERROR_HOOK()     chSysHalt()

diff --git a/testhal/STM32F1xx/USB_CDC/mcuconf.h b/testhal/STM32F1xx/USB_CDC/mcuconf.h
index 637d4b26f..c49fa23ba 100644
--- a/testhal/STM32F1xx/USB_CDC/mcuconf.h
+++ b/testhal/STM32F1xx/USB_CDC/mcuconf.h
@@ -60,7 +60,7 @@
  */

 #define STM32_ADC_USE_ADC1                  TRUE

 #define STM32_ADC_ADC1_DMA_PRIORITY         2

-#define STM32_ADC_ADC1_IRQ_PRIORITY         5

+#define STM32_ADC_ADC1_IRQ_PRIORITY         6

 

 /*

  * CAN driver system settings.

@@ -105,12 +105,12 @@
 #define STM32_I2C_USE_I2C1                  FALSE

 #define STM32_I2C_USE_I2C2                  FALSE

 #define STM32_I2C_USE_I2C3                  FALSE

-#define STM32_I2C_I2C1_IRQ_PRIORITY         10

-#define STM32_I2C_I2C2_IRQ_PRIORITY         10

-#define STM32_I2C_I2C3_IRQ_PRIORITY         10

-#define STM32_I2C_I2C1_DMA_PRIORITY         1

-#define STM32_I2C_I2C2_DMA_PRIORITY         1

-#define STM32_I2C_I2C3_DMA_PRIORITY         1

+#define STM32_I2C_I2C1_IRQ_PRIORITY         5

+#define STM32_I2C_I2C2_IRQ_PRIORITY         5

+#define STM32_I2C_I2C3_IRQ_PRIORITY         5

+#define STM32_I2C_I2C1_DMA_PRIORITY         3

+#define STM32_I2C_I2C2_DMA_PRIORITY         3

+#define STM32_I2C_I2C3_DMA_PRIORITY         3

 #define STM32_I2C_I2C1_DMA_ERROR_HOOK()     chSysHalt()

 #define STM32_I2C_I2C2_DMA_ERROR_HOOK()     chSysHalt()

 #define STM32_I2C_I2C3_DMA_ERROR_HOOK()     chSysHalt()

diff --git a/testhal/STM32F1xx/USB_MSC/mcuconf.h b/testhal/STM32F1xx/USB_MSC/mcuconf.h
index 637d4b26f..c49fa23ba 100644
--- a/testhal/STM32F1xx/USB_MSC/mcuconf.h
+++ b/testhal/STM32F1xx/USB_MSC/mcuconf.h
@@ -60,7 +60,7 @@
  */

 #define STM32_ADC_USE_ADC1                  TRUE

 #define STM32_ADC_ADC1_DMA_PRIORITY         2

-#define STM32_ADC_ADC1_IRQ_PRIORITY         5

+#define STM32_ADC_ADC1_IRQ_PRIORITY         6

 

 /*

  * CAN driver system settings.

@@ -105,12 +105,12 @@
 #define STM32_I2C_USE_I2C1                  FALSE

 #define STM32_I2C_USE_I2C2                  FALSE

 #define STM32_I2C_USE_I2C3                  FALSE

-#define STM32_I2C_I2C1_IRQ_PRIORITY         10

-#define STM32_I2C_I2C2_IRQ_PRIORITY         10

-#define STM32_I2C_I2C3_IRQ_PRIORITY         10

-#define STM32_I2C_I2C1_DMA_PRIORITY         1

-#define STM32_I2C_I2C2_DMA_PRIORITY         1

-#define STM32_I2C_I2C3_DMA_PRIORITY         1

+#define STM32_I2C_I2C1_IRQ_PRIORITY         5

+#define STM32_I2C_I2C2_IRQ_PRIORITY         5

+#define STM32_I2C_I2C3_IRQ_PRIORITY         5

+#define STM32_I2C_I2C1_DMA_PRIORITY         3

+#define STM32_I2C_I2C2_DMA_PRIORITY         3

+#define STM32_I2C_I2C3_DMA_PRIORITY         3

 #define STM32_I2C_I2C1_DMA_ERROR_HOOK()     chSysHalt()

 #define STM32_I2C_I2C2_DMA_ERROR_HOOK()     chSysHalt()

 #define STM32_I2C_I2C3_DMA_ERROR_HOOK()     chSysHalt()

diff --git a/testhal/STM32F4xx/ADC/mcuconf.h b/testhal/STM32F4xx/ADC/mcuconf.h
index 0fd455eb5..e7f082583 100644
--- a/testhal/STM32F4xx/ADC/mcuconf.h
+++ b/testhal/STM32F4xx/ADC/mcuconf.h
@@ -76,10 +76,10 @@
 #define STM32_ADC_ADC1_DMA_PRIORITY         2

 #define STM32_ADC_ADC2_DMA_PRIORITY         2

 #define STM32_ADC_ADC3_DMA_PRIORITY         2

-#define STM32_ADC_IRQ_PRIORITY              5

-#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     5

-#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY     5

-#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY     5

+#define STM32_ADC_IRQ_PRIORITY              6

+#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     6

+#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY     6

+#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY     6

 

 /*

  * CAN driver system settings.

@@ -227,12 +227,12 @@
 #define STM32_I2C_I2C2_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 7)

 #define STM32_I2C_I2C3_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 2)

 #define STM32_I2C_I2C3_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 4)

-#define STM32_I2C_I2C1_IRQ_PRIORITY         6

-#define STM32_I2C_I2C2_IRQ_PRIORITY         6

-#define STM32_I2C_I2C3_IRQ_PRIORITY         6

-#define STM32_I2C_I2C1_DMA_PRIORITY         1

-#define STM32_I2C_I2C2_DMA_PRIORITY         1

-#define STM32_I2C_I2C3_DMA_PRIORITY         1

+#define STM32_I2C_I2C1_IRQ_PRIORITY         5

+#define STM32_I2C_I2C2_IRQ_PRIORITY         5

+#define STM32_I2C_I2C3_IRQ_PRIORITY         5

+#define STM32_I2C_I2C1_DMA_PRIORITY         3

+#define STM32_I2C_I2C2_DMA_PRIORITY         3

+#define STM32_I2C_I2C3_DMA_PRIORITY         3

 #define STM32_I2C_I2C1_DMA_ERROR_HOOK()     chSysHalt()

 #define STM32_I2C_I2C2_DMA_ERROR_HOOK()     chSysHalt()

 #define STM32_I2C_I2C3_DMA_ERROR_HOOK()     chSysHalt()

diff --git a/testhal/STM32F4xx/CAN/mcuconf.h b/testhal/STM32F4xx/CAN/mcuconf.h
index 0fd455eb5..e7f082583 100644
--- a/testhal/STM32F4xx/CAN/mcuconf.h
+++ b/testhal/STM32F4xx/CAN/mcuconf.h
@@ -76,10 +76,10 @@
 #define STM32_ADC_ADC1_DMA_PRIORITY         2

 #define STM32_ADC_ADC2_DMA_PRIORITY         2

 #define STM32_ADC_ADC3_DMA_PRIORITY         2

-#define STM32_ADC_IRQ_PRIORITY              5

-#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     5

-#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY     5

-#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY     5

+#define STM32_ADC_IRQ_PRIORITY              6

+#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     6

+#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY     6

+#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY     6

 

 /*

  * CAN driver system settings.

@@ -227,12 +227,12 @@
 #define STM32_I2C_I2C2_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 7)

 #define STM32_I2C_I2C3_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 2)

 #define STM32_I2C_I2C3_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 4)

-#define STM32_I2C_I2C1_IRQ_PRIORITY         6

-#define STM32_I2C_I2C2_IRQ_PRIORITY         6

-#define STM32_I2C_I2C3_IRQ_PRIORITY         6

-#define STM32_I2C_I2C1_DMA_PRIORITY         1

-#define STM32_I2C_I2C2_DMA_PRIORITY         1

-#define STM32_I2C_I2C3_DMA_PRIORITY         1

+#define STM32_I2C_I2C1_IRQ_PRIORITY         5

+#define STM32_I2C_I2C2_IRQ_PRIORITY         5

+#define STM32_I2C_I2C3_IRQ_PRIORITY         5

+#define STM32_I2C_I2C1_DMA_PRIORITY         3

+#define STM32_I2C_I2C2_DMA_PRIORITY         3

+#define STM32_I2C_I2C3_DMA_PRIORITY         3

 #define STM32_I2C_I2C1_DMA_ERROR_HOOK()     chSysHalt()

 #define STM32_I2C_I2C2_DMA_ERROR_HOOK()     chSysHalt()

 #define STM32_I2C_I2C3_DMA_ERROR_HOOK()     chSysHalt()

diff --git a/testhal/STM32F4xx/DMA_STORM/mcuconf.h b/testhal/STM32F4xx/DMA_STORM/mcuconf.h
index 710e783e5..f650d42d0 100644
--- a/testhal/STM32F4xx/DMA_STORM/mcuconf.h
+++ b/testhal/STM32F4xx/DMA_STORM/mcuconf.h
@@ -76,10 +76,10 @@
 #define STM32_ADC_ADC1_DMA_PRIORITY         2

 #define STM32_ADC_ADC2_DMA_PRIORITY         2

 #define STM32_ADC_ADC3_DMA_PRIORITY         2

-#define STM32_ADC_IRQ_PRIORITY              5

-#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     5

-#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY     5

-#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY     5

+#define STM32_ADC_IRQ_PRIORITY              6

+#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     6

+#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY     6

+#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY     6

 

 /*

  * CAN driver system settings.

@@ -227,12 +227,12 @@
 #define STM32_I2C_I2C2_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 7)

 #define STM32_I2C_I2C3_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 2)

 #define STM32_I2C_I2C3_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 4)

-#define STM32_I2C_I2C1_IRQ_PRIORITY         6

-#define STM32_I2C_I2C2_IRQ_PRIORITY         6

-#define STM32_I2C_I2C3_IRQ_PRIORITY         6

-#define STM32_I2C_I2C1_DMA_PRIORITY         1

-#define STM32_I2C_I2C2_DMA_PRIORITY         1

-#define STM32_I2C_I2C3_DMA_PRIORITY         1

+#define STM32_I2C_I2C1_IRQ_PRIORITY         5

+#define STM32_I2C_I2C2_IRQ_PRIORITY         5

+#define STM32_I2C_I2C3_IRQ_PRIORITY         5

+#define STM32_I2C_I2C1_DMA_PRIORITY         3

+#define STM32_I2C_I2C2_DMA_PRIORITY         3

+#define STM32_I2C_I2C3_DMA_PRIORITY         3

 #define STM32_I2C_I2C1_DMA_ERROR_HOOK()     chSysHalt()

 #define STM32_I2C_I2C2_DMA_ERROR_HOOK()     chSysHalt()

 #define STM32_I2C_I2C3_DMA_ERROR_HOOK()     chSysHalt()

diff --git a/testhal/STM32F4xx/EXT/mcuconf.h b/testhal/STM32F4xx/EXT/mcuconf.h
index 1bad2dec7..e7e5fcb95 100644
--- a/testhal/STM32F4xx/EXT/mcuconf.h
+++ b/testhal/STM32F4xx/EXT/mcuconf.h
@@ -76,10 +76,10 @@
 #define STM32_ADC_ADC1_DMA_PRIORITY         2

 #define STM32_ADC_ADC2_DMA_PRIORITY         2

 #define STM32_ADC_ADC3_DMA_PRIORITY         2

-#define STM32_ADC_IRQ_PRIORITY              5

-#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     5

-#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY     5

-#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY     5

+#define STM32_ADC_IRQ_PRIORITY              6

+#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     6

+#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY     6

+#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY     6

 

 /*

  * CAN driver system settings.

@@ -227,12 +227,12 @@
 #define STM32_I2C_I2C2_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 7)

 #define STM32_I2C_I2C3_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 2)

 #define STM32_I2C_I2C3_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 4)

-#define STM32_I2C_I2C1_IRQ_PRIORITY         6

-#define STM32_I2C_I2C2_IRQ_PRIORITY         6

-#define STM32_I2C_I2C3_IRQ_PRIORITY         6

-#define STM32_I2C_I2C1_DMA_PRIORITY         1

-#define STM32_I2C_I2C2_DMA_PRIORITY         1

-#define STM32_I2C_I2C3_DMA_PRIORITY         1

+#define STM32_I2C_I2C1_IRQ_PRIORITY         5

+#define STM32_I2C_I2C2_IRQ_PRIORITY         5

+#define STM32_I2C_I2C3_IRQ_PRIORITY         5

+#define STM32_I2C_I2C1_DMA_PRIORITY         3

+#define STM32_I2C_I2C2_DMA_PRIORITY         3

+#define STM32_I2C_I2C3_DMA_PRIORITY         3

 #define STM32_I2C_I2C1_DMA_ERROR_HOOK()     chSysHalt()

 #define STM32_I2C_I2C2_DMA_ERROR_HOOK()     chSysHalt()

 #define STM32_I2C_I2C3_DMA_ERROR_HOOK()     chSysHalt()

diff --git a/testhal/STM32F4xx/GPT/mcuconf.h b/testhal/STM32F4xx/GPT/mcuconf.h
index 0fd455eb5..e7f082583 100644
--- a/testhal/STM32F4xx/GPT/mcuconf.h
+++ b/testhal/STM32F4xx/GPT/mcuconf.h
@@ -76,10 +76,10 @@
 #define STM32_ADC_ADC1_DMA_PRIORITY         2

 #define STM32_ADC_ADC2_DMA_PRIORITY         2

 #define STM32_ADC_ADC3_DMA_PRIORITY         2

-#define STM32_ADC_IRQ_PRIORITY              5

-#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     5

-#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY     5

-#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY     5

+#define STM32_ADC_IRQ_PRIORITY              6

+#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     6

+#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY     6

+#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY     6

 

 /*

  * CAN driver system settings.

@@ -227,12 +227,12 @@
 #define STM32_I2C_I2C2_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 7)

 #define STM32_I2C_I2C3_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 2)

 #define STM32_I2C_I2C3_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 4)

-#define STM32_I2C_I2C1_IRQ_PRIORITY         6

-#define STM32_I2C_I2C2_IRQ_PRIORITY         6

-#define STM32_I2C_I2C3_IRQ_PRIORITY         6

-#define STM32_I2C_I2C1_DMA_PRIORITY         1

-#define STM32_I2C_I2C2_DMA_PRIORITY         1

-#define STM32_I2C_I2C3_DMA_PRIORITY         1

+#define STM32_I2C_I2C1_IRQ_PRIORITY         5

+#define STM32_I2C_I2C2_IRQ_PRIORITY         5

+#define STM32_I2C_I2C3_IRQ_PRIORITY         5

+#define STM32_I2C_I2C1_DMA_PRIORITY         3

+#define STM32_I2C_I2C2_DMA_PRIORITY         3

+#define STM32_I2C_I2C3_DMA_PRIORITY         3

 #define STM32_I2C_I2C1_DMA_ERROR_HOOK()     chSysHalt()

 #define STM32_I2C_I2C2_DMA_ERROR_HOOK()     chSysHalt()

 #define STM32_I2C_I2C3_DMA_ERROR_HOOK()     chSysHalt()

diff --git a/testhal/STM32F4xx/I2C/mcuconf.h b/testhal/STM32F4xx/I2C/mcuconf.h
index e30594b18..cf6784195 100644
--- a/testhal/STM32F4xx/I2C/mcuconf.h
+++ b/testhal/STM32F4xx/I2C/mcuconf.h
@@ -77,10 +77,10 @@
 #define STM32_ADC_ADC1_DMA_PRIORITY         2

 #define STM32_ADC_ADC2_DMA_PRIORITY         2

 #define STM32_ADC_ADC3_DMA_PRIORITY         2

-#define STM32_ADC_IRQ_PRIORITY              5

-#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     5

-#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY     5

-#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY     5

+#define STM32_ADC_IRQ_PRIORITY              6

+#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     6

+#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY     6

+#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY     6

 

 /*

  * CAN driver system settings.

@@ -235,12 +235,12 @@
 #define STM32_I2C_I2C2_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 7)

 #define STM32_I2C_I2C3_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 2)

 #define STM32_I2C_I2C3_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 4)

-#define STM32_I2C_I2C1_IRQ_PRIORITY         6

-#define STM32_I2C_I2C2_IRQ_PRIORITY         6

-#define STM32_I2C_I2C3_IRQ_PRIORITY         6

-#define STM32_I2C_I2C1_DMA_PRIORITY         1

-#define STM32_I2C_I2C2_DMA_PRIORITY         1

-#define STM32_I2C_I2C3_DMA_PRIORITY         1

+#define STM32_I2C_I2C1_IRQ_PRIORITY         5

+#define STM32_I2C_I2C2_IRQ_PRIORITY         5

+#define STM32_I2C_I2C3_IRQ_PRIORITY         5

+#define STM32_I2C_I2C1_DMA_PRIORITY         3

+#define STM32_I2C_I2C2_DMA_PRIORITY         3

+#define STM32_I2C_I2C3_DMA_PRIORITY         3

 #define STM32_I2C_I2C1_DMA_ERROR_HOOK()     chSysHalt()

 #define STM32_I2C_I2C2_DMA_ERROR_HOOK()     chSysHalt()

 #define STM32_I2C_I2C3_DMA_ERROR_HOOK()     chSysHalt()

diff --git a/testhal/STM32F4xx/IRQ_STORM/mcuconf.h b/testhal/STM32F4xx/IRQ_STORM/mcuconf.h
index a9e37c9b6..7a38c4f4f 100644
--- a/testhal/STM32F4xx/IRQ_STORM/mcuconf.h
+++ b/testhal/STM32F4xx/IRQ_STORM/mcuconf.h
@@ -76,10 +76,10 @@
 #define STM32_ADC_ADC1_DMA_PRIORITY         2

 #define STM32_ADC_ADC2_DMA_PRIORITY         2

 #define STM32_ADC_ADC3_DMA_PRIORITY         2

-#define STM32_ADC_IRQ_PRIORITY              5

-#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     5

-#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY     5

-#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY     5

+#define STM32_ADC_IRQ_PRIORITY              6

+#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     6

+#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY     6

+#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY     6

 

 /*

  * CAN driver system settings.

@@ -227,12 +227,12 @@
 #define STM32_I2C_I2C2_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 7)

 #define STM32_I2C_I2C3_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 2)

 #define STM32_I2C_I2C3_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 4)

-#define STM32_I2C_I2C1_IRQ_PRIORITY         6

-#define STM32_I2C_I2C2_IRQ_PRIORITY         6

-#define STM32_I2C_I2C3_IRQ_PRIORITY         6

-#define STM32_I2C_I2C1_DMA_PRIORITY         1

-#define STM32_I2C_I2C2_DMA_PRIORITY         1

-#define STM32_I2C_I2C3_DMA_PRIORITY         1

+#define STM32_I2C_I2C1_IRQ_PRIORITY         5

+#define STM32_I2C_I2C2_IRQ_PRIORITY         5

+#define STM32_I2C_I2C3_IRQ_PRIORITY         5

+#define STM32_I2C_I2C1_DMA_PRIORITY         3

+#define STM32_I2C_I2C2_DMA_PRIORITY         3

+#define STM32_I2C_I2C3_DMA_PRIORITY         3

 #define STM32_I2C_I2C1_DMA_ERROR_HOOK()     chSysHalt()

 #define STM32_I2C_I2C2_DMA_ERROR_HOOK()     chSysHalt()

 #define STM32_I2C_I2C3_DMA_ERROR_HOOK()     chSysHalt()

diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h b/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h
index a9e37c9b6..7a38c4f4f 100644
--- a/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h
+++ b/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h
@@ -76,10 +76,10 @@
 #define STM32_ADC_ADC1_DMA_PRIORITY         2

 #define STM32_ADC_ADC2_DMA_PRIORITY         2

 #define STM32_ADC_ADC3_DMA_PRIORITY         2

-#define STM32_ADC_IRQ_PRIORITY              5

-#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     5

-#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY     5

-#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY     5

+#define STM32_ADC_IRQ_PRIORITY              6

+#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     6

+#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY     6

+#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY     6

 

 /*

  * CAN driver system settings.

@@ -227,12 +227,12 @@
 #define STM32_I2C_I2C2_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 7)

 #define STM32_I2C_I2C3_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 2)

 #define STM32_I2C_I2C3_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 4)

-#define STM32_I2C_I2C1_IRQ_PRIORITY         6

-#define STM32_I2C_I2C2_IRQ_PRIORITY         6

-#define STM32_I2C_I2C3_IRQ_PRIORITY         6

-#define STM32_I2C_I2C1_DMA_PRIORITY         1

-#define STM32_I2C_I2C2_DMA_PRIORITY         1

-#define STM32_I2C_I2C3_DMA_PRIORITY         1

+#define STM32_I2C_I2C1_IRQ_PRIORITY         5

+#define STM32_I2C_I2C2_IRQ_PRIORITY         5

+#define STM32_I2C_I2C3_IRQ_PRIORITY         5

+#define STM32_I2C_I2C1_DMA_PRIORITY         3

+#define STM32_I2C_I2C2_DMA_PRIORITY         3

+#define STM32_I2C_I2C3_DMA_PRIORITY         3

 #define STM32_I2C_I2C1_DMA_ERROR_HOOK()     chSysHalt()

 #define STM32_I2C_I2C2_DMA_ERROR_HOOK()     chSysHalt()

 #define STM32_I2C_I2C3_DMA_ERROR_HOOK()     chSysHalt()

diff --git a/testhal/STM32F4xx/PVD/mcuconf.h b/testhal/STM32F4xx/PVD/mcuconf.h
index 37b3e2f45..b51fbca14 100644
--- a/testhal/STM32F4xx/PVD/mcuconf.h
+++ b/testhal/STM32F4xx/PVD/mcuconf.h
@@ -77,10 +77,10 @@
 #define STM32_ADC_ADC1_DMA_PRIORITY         2

 #define STM32_ADC_ADC2_DMA_PRIORITY         2

 #define STM32_ADC_ADC3_DMA_PRIORITY         2

-#define STM32_ADC_IRQ_PRIORITY              5

-#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     5

-#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY     5

-#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY     5

+#define STM32_ADC_IRQ_PRIORITY              6

+#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     6

+#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY     6

+#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY     6

 

 /*

  * CAN driver system settings.

@@ -235,12 +235,12 @@
 #define STM32_I2C_I2C2_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 7)

 #define STM32_I2C_I2C3_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 2)

 #define STM32_I2C_I2C3_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 4)

-#define STM32_I2C_I2C1_IRQ_PRIORITY         6

-#define STM32_I2C_I2C2_IRQ_PRIORITY         6

-#define STM32_I2C_I2C3_IRQ_PRIORITY         6

-#define STM32_I2C_I2C1_DMA_PRIORITY         1

-#define STM32_I2C_I2C2_DMA_PRIORITY         1

-#define STM32_I2C_I2C3_DMA_PRIORITY         1

+#define STM32_I2C_I2C1_IRQ_PRIORITY         5

+#define STM32_I2C_I2C2_IRQ_PRIORITY         5

+#define STM32_I2C_I2C3_IRQ_PRIORITY         5

+#define STM32_I2C_I2C1_DMA_PRIORITY         3

+#define STM32_I2C_I2C2_DMA_PRIORITY         3

+#define STM32_I2C_I2C3_DMA_PRIORITY         3

 #define STM32_I2C_I2C1_DMA_ERROR_HOOK()     chSysHalt()

 #define STM32_I2C_I2C2_DMA_ERROR_HOOK()     chSysHalt()

 #define STM32_I2C_I2C3_DMA_ERROR_HOOK()     chSysHalt()

diff --git a/testhal/STM32F4xx/PWM-ICU/mcuconf.h b/testhal/STM32F4xx/PWM-ICU/mcuconf.h
index e84c9dddc..9498f9303 100644
--- a/testhal/STM32F4xx/PWM-ICU/mcuconf.h
+++ b/testhal/STM32F4xx/PWM-ICU/mcuconf.h
@@ -76,10 +76,10 @@
 #define STM32_ADC_ADC1_DMA_PRIORITY         2

 #define STM32_ADC_ADC2_DMA_PRIORITY         2

 #define STM32_ADC_ADC3_DMA_PRIORITY         2

-#define STM32_ADC_IRQ_PRIORITY              5

-#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     5

-#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY     5

-#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY     5

+#define STM32_ADC_IRQ_PRIORITY              6

+#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     6

+#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY     6

+#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY     6

 

 /*

  * CAN driver system settings.

@@ -227,12 +227,12 @@
 #define STM32_I2C_I2C2_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 7)

 #define STM32_I2C_I2C3_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 2)

 #define STM32_I2C_I2C3_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 4)

-#define STM32_I2C_I2C1_IRQ_PRIORITY         6

-#define STM32_I2C_I2C2_IRQ_PRIORITY         6

-#define STM32_I2C_I2C3_IRQ_PRIORITY         6

-#define STM32_I2C_I2C1_DMA_PRIORITY         1

-#define STM32_I2C_I2C2_DMA_PRIORITY         1

-#define STM32_I2C_I2C3_DMA_PRIORITY         1

+#define STM32_I2C_I2C1_IRQ_PRIORITY         5

+#define STM32_I2C_I2C2_IRQ_PRIORITY         5

+#define STM32_I2C_I2C3_IRQ_PRIORITY         5

+#define STM32_I2C_I2C1_DMA_PRIORITY         3

+#define STM32_I2C_I2C2_DMA_PRIORITY         3

+#define STM32_I2C_I2C3_DMA_PRIORITY         3

 #define STM32_I2C_I2C1_DMA_ERROR_HOOK()     chSysHalt()

 #define STM32_I2C_I2C2_DMA_ERROR_HOOK()     chSysHalt()

 #define STM32_I2C_I2C3_DMA_ERROR_HOOK()     chSysHalt()

diff --git a/testhal/STM32F4xx/RTC/mcuconf.h b/testhal/STM32F4xx/RTC/mcuconf.h
index 60df794a8..bf75a124c 100644
--- a/testhal/STM32F4xx/RTC/mcuconf.h
+++ b/testhal/STM32F4xx/RTC/mcuconf.h
@@ -76,10 +76,10 @@
 #define STM32_ADC_ADC1_DMA_PRIORITY         2

 #define STM32_ADC_ADC2_DMA_PRIORITY         2

 #define STM32_ADC_ADC3_DMA_PRIORITY         2

-#define STM32_ADC_IRQ_PRIORITY              5

-#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     5

-#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY     5

-#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY     5

+#define STM32_ADC_IRQ_PRIORITY              6

+#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     6

+#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY     6

+#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY     6

 

 /*

  * CAN driver system settings.

@@ -227,12 +227,12 @@
 #define STM32_I2C_I2C2_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 7)

 #define STM32_I2C_I2C3_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 2)

 #define STM32_I2C_I2C3_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 4)

-#define STM32_I2C_I2C1_IRQ_PRIORITY         6

-#define STM32_I2C_I2C2_IRQ_PRIORITY         6

-#define STM32_I2C_I2C3_IRQ_PRIORITY         6

-#define STM32_I2C_I2C1_DMA_PRIORITY         1

-#define STM32_I2C_I2C2_DMA_PRIORITY         1

-#define STM32_I2C_I2C3_DMA_PRIORITY         1

+#define STM32_I2C_I2C1_IRQ_PRIORITY         5

+#define STM32_I2C_I2C2_IRQ_PRIORITY         5

+#define STM32_I2C_I2C3_IRQ_PRIORITY         5

+#define STM32_I2C_I2C1_DMA_PRIORITY         3

+#define STM32_I2C_I2C2_DMA_PRIORITY         3

+#define STM32_I2C_I2C3_DMA_PRIORITY         3

 #define STM32_I2C_I2C1_DMA_ERROR_HOOK()     chSysHalt()

 #define STM32_I2C_I2C2_DMA_ERROR_HOOK()     chSysHalt()

 #define STM32_I2C_I2C3_DMA_ERROR_HOOK()     chSysHalt()

diff --git a/testhal/STM32F4xx/SDC/mcuconf.h b/testhal/STM32F4xx/SDC/mcuconf.h
index ee300062e..9b65c0b44 100755
--- a/testhal/STM32F4xx/SDC/mcuconf.h
+++ b/testhal/STM32F4xx/SDC/mcuconf.h
@@ -77,10 +77,10 @@
 #define STM32_ADC_ADC1_DMA_PRIORITY         2

 #define STM32_ADC_ADC2_DMA_PRIORITY         2

 #define STM32_ADC_ADC3_DMA_PRIORITY         2

-#define STM32_ADC_IRQ_PRIORITY              5

-#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     5

-#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY     5

-#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY     5

+#define STM32_ADC_IRQ_PRIORITY              6

+#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     6

+#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY     6

+#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY     6

 

 /*

  * CAN driver system settings.

@@ -235,12 +235,12 @@
 #define STM32_I2C_I2C2_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 7)

 #define STM32_I2C_I2C3_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 2)

 #define STM32_I2C_I2C3_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 4)

-#define STM32_I2C_I2C1_IRQ_PRIORITY         6

-#define STM32_I2C_I2C2_IRQ_PRIORITY         6

-#define STM32_I2C_I2C3_IRQ_PRIORITY         6

-#define STM32_I2C_I2C1_DMA_PRIORITY         1

-#define STM32_I2C_I2C2_DMA_PRIORITY         1

-#define STM32_I2C_I2C3_DMA_PRIORITY         1

+#define STM32_I2C_I2C1_IRQ_PRIORITY         5

+#define STM32_I2C_I2C2_IRQ_PRIORITY         5

+#define STM32_I2C_I2C3_IRQ_PRIORITY         5

+#define STM32_I2C_I2C1_DMA_PRIORITY         3

+#define STM32_I2C_I2C2_DMA_PRIORITY         3

+#define STM32_I2C_I2C3_DMA_PRIORITY         3

 #define STM32_I2C_I2C1_DMA_ERROR_HOOK()     chSysHalt()

 #define STM32_I2C_I2C2_DMA_ERROR_HOOK()     chSysHalt()

 #define STM32_I2C_I2C3_DMA_ERROR_HOOK()     chSysHalt()

diff --git a/testhal/STM32F4xx/SPI/mcuconf.h b/testhal/STM32F4xx/SPI/mcuconf.h
index 9856f8523..c1ad73e44 100644
--- a/testhal/STM32F4xx/SPI/mcuconf.h
+++ b/testhal/STM32F4xx/SPI/mcuconf.h
@@ -76,10 +76,10 @@
 #define STM32_ADC_ADC1_DMA_PRIORITY         2

 #define STM32_ADC_ADC2_DMA_PRIORITY         2

 #define STM32_ADC_ADC3_DMA_PRIORITY         2

-#define STM32_ADC_IRQ_PRIORITY              5

-#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     5

-#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY     5

-#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY     5

+#define STM32_ADC_IRQ_PRIORITY              6

+#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     6

+#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY     6

+#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY     6

 

 /*

  * CAN driver system settings.

@@ -227,12 +227,12 @@
 #define STM32_I2C_I2C2_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 7)

 #define STM32_I2C_I2C3_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 2)

 #define STM32_I2C_I2C3_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 4)

-#define STM32_I2C_I2C1_IRQ_PRIORITY         6

-#define STM32_I2C_I2C2_IRQ_PRIORITY         6

-#define STM32_I2C_I2C3_IRQ_PRIORITY         6

-#define STM32_I2C_I2C1_DMA_PRIORITY         1

-#define STM32_I2C_I2C2_DMA_PRIORITY         1

-#define STM32_I2C_I2C3_DMA_PRIORITY         1

+#define STM32_I2C_I2C1_IRQ_PRIORITY         5

+#define STM32_I2C_I2C2_IRQ_PRIORITY         5

+#define STM32_I2C_I2C3_IRQ_PRIORITY         5

+#define STM32_I2C_I2C1_DMA_PRIORITY         3

+#define STM32_I2C_I2C2_DMA_PRIORITY         3

+#define STM32_I2C_I2C3_DMA_PRIORITY         3

 #define STM32_I2C_I2C1_DMA_ERROR_HOOK()     chSysHalt()

 #define STM32_I2C_I2C2_DMA_ERROR_HOOK()     chSysHalt()

 #define STM32_I2C_I2C3_DMA_ERROR_HOOK()     chSysHalt()

diff --git a/testhal/STM32F4xx/UART/mcuconf.h b/testhal/STM32F4xx/UART/mcuconf.h
index df759c848..f76ef9058 100644
--- a/testhal/STM32F4xx/UART/mcuconf.h
+++ b/testhal/STM32F4xx/UART/mcuconf.h
@@ -76,10 +76,10 @@
 #define STM32_ADC_ADC1_DMA_PRIORITY         2

 #define STM32_ADC_ADC2_DMA_PRIORITY         2

 #define STM32_ADC_ADC3_DMA_PRIORITY         2

-#define STM32_ADC_IRQ_PRIORITY              5

-#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     5

-#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY     5

-#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY     5

+#define STM32_ADC_IRQ_PRIORITY              6

+#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     6

+#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY     6

+#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY     6

 

 /*

  * CAN driver system settings.

@@ -227,12 +227,12 @@
 #define STM32_I2C_I2C2_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 7)

 #define STM32_I2C_I2C3_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 2)

 #define STM32_I2C_I2C3_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 4)

-#define STM32_I2C_I2C1_IRQ_PRIORITY         6

-#define STM32_I2C_I2C2_IRQ_PRIORITY         6

-#define STM32_I2C_I2C3_IRQ_PRIORITY         6

-#define STM32_I2C_I2C1_DMA_PRIORITY         1

-#define STM32_I2C_I2C2_DMA_PRIORITY         1

-#define STM32_I2C_I2C3_DMA_PRIORITY         1

+#define STM32_I2C_I2C1_IRQ_PRIORITY         5

+#define STM32_I2C_I2C2_IRQ_PRIORITY         5

+#define STM32_I2C_I2C3_IRQ_PRIORITY         5

+#define STM32_I2C_I2C1_DMA_PRIORITY         3

+#define STM32_I2C_I2C2_DMA_PRIORITY         3

+#define STM32_I2C_I2C3_DMA_PRIORITY         3

 #define STM32_I2C_I2C1_DMA_ERROR_HOOK()     chSysHalt()

 #define STM32_I2C_I2C2_DMA_ERROR_HOOK()     chSysHalt()

 #define STM32_I2C_I2C3_DMA_ERROR_HOOK()     chSysHalt()

diff --git a/testhal/STM32F4xx/USB_CDC/mcuconf.h b/testhal/STM32F4xx/USB_CDC/mcuconf.h
index 0fd455eb5..e7f082583 100644
--- a/testhal/STM32F4xx/USB_CDC/mcuconf.h
+++ b/testhal/STM32F4xx/USB_CDC/mcuconf.h
@@ -76,10 +76,10 @@
 #define STM32_ADC_ADC1_DMA_PRIORITY         2

 #define STM32_ADC_ADC2_DMA_PRIORITY         2

 #define STM32_ADC_ADC3_DMA_PRIORITY         2

-#define STM32_ADC_IRQ_PRIORITY              5

-#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     5

-#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY     5

-#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY     5

+#define STM32_ADC_IRQ_PRIORITY              6

+#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     6

+#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY     6

+#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY     6

 

 /*

  * CAN driver system settings.

@@ -227,12 +227,12 @@
 #define STM32_I2C_I2C2_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 7)

 #define STM32_I2C_I2C3_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 2)

 #define STM32_I2C_I2C3_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 4)

-#define STM32_I2C_I2C1_IRQ_PRIORITY         6

-#define STM32_I2C_I2C2_IRQ_PRIORITY         6

-#define STM32_I2C_I2C3_IRQ_PRIORITY         6

-#define STM32_I2C_I2C1_DMA_PRIORITY         1

-#define STM32_I2C_I2C2_DMA_PRIORITY         1

-#define STM32_I2C_I2C3_DMA_PRIORITY         1

+#define STM32_I2C_I2C1_IRQ_PRIORITY         5

+#define STM32_I2C_I2C2_IRQ_PRIORITY         5

+#define STM32_I2C_I2C3_IRQ_PRIORITY         5

+#define STM32_I2C_I2C1_DMA_PRIORITY         3

+#define STM32_I2C_I2C2_DMA_PRIORITY         3

+#define STM32_I2C_I2C3_DMA_PRIORITY         3

 #define STM32_I2C_I2C1_DMA_ERROR_HOOK()     chSysHalt()

 #define STM32_I2C_I2C2_DMA_ERROR_HOOK()     chSysHalt()

 #define STM32_I2C_I2C3_DMA_ERROR_HOOK()     chSysHalt()

diff --git a/testhal/STM32L1xx/ADC/mcuconf.h b/testhal/STM32L1xx/ADC/mcuconf.h
index 1aa91e950..97555af27 100644
--- a/testhal/STM32L1xx/ADC/mcuconf.h
+++ b/testhal/STM32L1xx/ADC/mcuconf.h
@@ -63,8 +63,8 @@
  */

 #define STM32_ADC_USE_ADC1                  TRUE

 #define STM32_ADC_ADC1_DMA_PRIORITY         2

-#define STM32_ADC_IRQ_PRIORITY              5

-#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     5

+#define STM32_ADC_IRQ_PRIORITY              6

+#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     6

 

 /*

  * CAN driver system settings.

diff --git a/testhal/STM32L1xx/EXT/mcuconf.h b/testhal/STM32L1xx/EXT/mcuconf.h
index 1aa91e950..97555af27 100644
--- a/testhal/STM32L1xx/EXT/mcuconf.h
+++ b/testhal/STM32L1xx/EXT/mcuconf.h
@@ -63,8 +63,8 @@
  */

 #define STM32_ADC_USE_ADC1                  TRUE

 #define STM32_ADC_ADC1_DMA_PRIORITY         2

-#define STM32_ADC_IRQ_PRIORITY              5

-#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     5

+#define STM32_ADC_IRQ_PRIORITY              6

+#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     6

 

 /*

  * CAN driver system settings.

diff --git a/testhal/STM32L1xx/GPT/mcuconf.h b/testhal/STM32L1xx/GPT/mcuconf.h
index 1aa91e950..97555af27 100644
--- a/testhal/STM32L1xx/GPT/mcuconf.h
+++ b/testhal/STM32L1xx/GPT/mcuconf.h
@@ -63,8 +63,8 @@
  */

 #define STM32_ADC_USE_ADC1                  TRUE

 #define STM32_ADC_ADC1_DMA_PRIORITY         2

-#define STM32_ADC_IRQ_PRIORITY              5

-#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     5

+#define STM32_ADC_IRQ_PRIORITY              6

+#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     6

 

 /*

  * CAN driver system settings.

diff --git a/testhal/STM32L1xx/IRQ_STORM/mcuconf.h b/testhal/STM32L1xx/IRQ_STORM/mcuconf.h
index 5b75140c3..6c240fbd4 100644
--- a/testhal/STM32L1xx/IRQ_STORM/mcuconf.h
+++ b/testhal/STM32L1xx/IRQ_STORM/mcuconf.h
@@ -63,8 +63,8 @@
  */

 #define STM32_ADC_USE_ADC1                  TRUE

 #define STM32_ADC_ADC1_DMA_PRIORITY         2

-#define STM32_ADC_IRQ_PRIORITY              5

-#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     5

+#define STM32_ADC_IRQ_PRIORITY              6

+#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     6

 

 /*

  * CAN driver system settings.

diff --git a/testhal/STM32L1xx/PVD/mcuconf.h b/testhal/STM32L1xx/PVD/mcuconf.h
index 473a0f2be..080979f0b 100644
--- a/testhal/STM32L1xx/PVD/mcuconf.h
+++ b/testhal/STM32L1xx/PVD/mcuconf.h
@@ -63,8 +63,8 @@
  */

 #define STM32_ADC_USE_ADC1                  TRUE

 #define STM32_ADC_ADC1_DMA_PRIORITY         2

-#define STM32_ADC_IRQ_PRIORITY              5

-#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     5

+#define STM32_ADC_IRQ_PRIORITY              6

+#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     6

 

 /*

  * CAN driver system settings.

diff --git a/testhal/STM32L1xx/PWM-ICU/mcuconf.h b/testhal/STM32L1xx/PWM-ICU/mcuconf.h
index 7fa9b73c7..bef51029f 100644
--- a/testhal/STM32L1xx/PWM-ICU/mcuconf.h
+++ b/testhal/STM32L1xx/PWM-ICU/mcuconf.h
@@ -63,8 +63,8 @@
  */

 #define STM32_ADC_USE_ADC1                  TRUE

 #define STM32_ADC_ADC1_DMA_PRIORITY         2

-#define STM32_ADC_IRQ_PRIORITY              5

-#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     5

+#define STM32_ADC_IRQ_PRIORITY              6

+#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     6

 

 /*

  * CAN driver system settings.

diff --git a/testhal/STM32L1xx/SPI/mcuconf.h b/testhal/STM32L1xx/SPI/mcuconf.h
index 8ec0616e8..06030aadf 100644
--- a/testhal/STM32L1xx/SPI/mcuconf.h
+++ b/testhal/STM32L1xx/SPI/mcuconf.h
@@ -63,8 +63,8 @@
  */

 #define STM32_ADC_USE_ADC1                  TRUE

 #define STM32_ADC_ADC1_DMA_PRIORITY         2

-#define STM32_ADC_IRQ_PRIORITY              5

-#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     5

+#define STM32_ADC_IRQ_PRIORITY              6

+#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     6

 

 /*

  * CAN driver system settings.

diff --git a/testhal/STM32L1xx/UART/mcuconf.h b/testhal/STM32L1xx/UART/mcuconf.h
index 1291113a1..64983188d 100644
--- a/testhal/STM32L1xx/UART/mcuconf.h
+++ b/testhal/STM32L1xx/UART/mcuconf.h
@@ -63,8 +63,8 @@
  */

 #define STM32_ADC_USE_ADC1                  TRUE

 #define STM32_ADC_ADC1_DMA_PRIORITY         2

-#define STM32_ADC_IRQ_PRIORITY              5

-#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     5

+#define STM32_ADC_IRQ_PRIORITY              6

+#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     6

 

 /*

  * CAN driver system settings.