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authorbarthess <barthess@35acf78f-673a-0410-8e92-d51de3d6d3f4>2011-09-18 22:35:18 +0000
committerbarthess <barthess@35acf78f-673a-0410-8e92-d51de3d6d3f4>2011-09-18 22:35:18 +0000
commitbf6ca955f1c2248138d51df53bb3767bd8c63a4b (patch)
treea27de7a5bcf87c5015ca76660f75532bef1a1735 /testhal
parente1afd2700be6c631f1e74766525724cf95588c3e (diff)
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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3343 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'testhal')
-rw-r--r--testhal/STM32F1xx/EXT_WAKEUP/halconf.h2
-rw-r--r--testhal/STM32F1xx/EXT_WAKEUP/main.c1
-rw-r--r--testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h20
3 files changed, 12 insertions, 11 deletions
diff --git a/testhal/STM32F1xx/EXT_WAKEUP/halconf.h b/testhal/STM32F1xx/EXT_WAKEUP/halconf.h
index 0bf380473..ca1d81b24 100644
--- a/testhal/STM32F1xx/EXT_WAKEUP/halconf.h
+++ b/testhal/STM32F1xx/EXT_WAKEUP/halconf.h
@@ -289,7 +289,7 @@
* default configuration.
*/
#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
-#define SERIAL_DEFAULT_BITRATE 9600
+#define SERIAL_DEFAULT_BITRATE 38400
#endif
/**
diff --git a/testhal/STM32F1xx/EXT_WAKEUP/main.c b/testhal/STM32F1xx/EXT_WAKEUP/main.c
index 26c8f9433..23c208873 100644
--- a/testhal/STM32F1xx/EXT_WAKEUP/main.c
+++ b/testhal/STM32F1xx/EXT_WAKEUP/main.c
@@ -86,6 +86,7 @@ static void cmd_reboot(BaseChannel *chp, int argc, char *argv[]){
return;
}
chprintf(chp, "rebooting...\r\n");
+ chThdSleepMilliseconds(100); // time to print out message in terminal
NVIC_SystemReset();
}
diff --git a/testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h b/testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h
index 78ed01659..26a7a4945 100644
--- a/testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h
+++ b/testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h
@@ -35,21 +35,21 @@
/*
* HAL driver system settings.
*/
-#define STM32_SW STM32_SW_PLL
-#define STM32_PLLSRC STM32_PLLSRC_HSE
-#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1
-#define STM32_PLLMUL_VALUE 9
+#define STM32_SW STM32_SW_HSI
+//#define STM32_PLLSRC STM32_PLLSRC_HSE
+//#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1
+//#define STM32_PLLMUL_VALUE 9
#define STM32_HPRE STM32_HPRE_DIV1
-#define STM32_PPRE1 STM32_PPRE1_DIV2
-#define STM32_PPRE2 STM32_PPRE2_DIV2
+#define STM32_PPRE1 STM32_PPRE1_DIV1
+#define STM32_PPRE2 STM32_PPRE2_DIV1
#define STM32_ADCPRE STM32_ADCPRE_DIV4
-#define STM32_USBPRE STM32_USBPRE_DIV1P5
+//#define STM32_USBPRE STM32_USBPRE_DIV1P5
#define STM32_MCO STM32_MCO_NOCLOCK
/*
* ADC driver system settings.
*/
-#define STM32_ADC_USE_ADC1 TRUE
+#define STM32_ADC_USE_ADC1 FALSE
#define STM32_ADC_ADC1_DMA_PRIORITY 2
#define STM32_ADC_ADC1_IRQ_PRIORITY 5
#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt()
@@ -57,7 +57,7 @@
/*
* CAN driver system settings.
*/
-#define STM32_CAN_USE_CAN1 TRUE
+#define STM32_CAN_USE_CAN1 FALSE
#define STM32_CAN_CAN1_IRQ_PRIORITY 11
/*
@@ -163,7 +163,7 @@
/*
* USB driver system settings.
*/
-#define STM32_USB_USE_USB1 TRUE
+#define STM32_USB_USE_USB1 FALSE
#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE
#define STM32_USB_USB1_HP_IRQ_PRIORITY 6
#define STM32_USB_USB1_LP_IRQ_PRIORITY 14