git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4606 35acf78f-673a-0410-8e92-d51de3d6d3f4

13 files changed, 2026 insertions, 69 deletions

diff --git a/testhal/STM32F0xx/ADC/mcuconf.h b/testhal/STM32F0xx/ADC/mcuconf.h
index 12eba360b..4cda58614 100644
--- a/testhal/STM32F0xx/ADC/mcuconf.h
+++ b/testhal/STM32F0xx/ADC/mcuconf.h
@@ -32,6 +32,8 @@
  * 0...3        Lowest...Highest.

  */

 

+#define STM32F0xx_MCUCONF

+

 /*

  * HAL driver system settings.

  */

@@ -80,8 +82,8 @@
  * GPT driver system settings.

  */

 #define STM32_GPT_USE_TIM1                  FALSE

-#define STM32_GPT_USE_TIM2                  TRUE

-#define STM32_GPT_USE_TIM3                  TRUE

+#define STM32_GPT_USE_TIM2                  FALSE

+#define STM32_GPT_USE_TIM3                  FALSE

 #define STM32_GPT_TIM1_IRQ_PRIORITY         2

 #define STM32_GPT_TIM2_IRQ_PRIORITY         2

 #define STM32_GPT_TIM3_IRQ_PRIORITY         2

@@ -91,7 +93,7 @@
  */

 #define STM32_ICU_USE_TIM1                  FALSE

 #define STM32_ICU_USE_TIM2                  FALSE

-#define STM32_ICU_USE_TIM3                  TRUE

+#define STM32_ICU_USE_TIM3                  FALSE

 #define STM32_ICU_TIM1_IRQ_PRIORITY         3

 #define STM32_ICU_TIM2_IRQ_PRIORITY         3

 #define STM32_ICU_TIM3_IRQ_PRIORITY         3

@@ -101,7 +103,7 @@
  */

 #define STM32_PWM_USE_ADVANCED              FALSE

 #define STM32_PWM_USE_TIM1                  FALSE

-#define STM32_PWM_USE_TIM2                  TRUE

+#define STM32_PWM_USE_TIM2                  FALSE

 #define STM32_PWM_USE_TIM3                  FALSE

 #define STM32_PWM_TIM1_IRQ_PRIORITY         3

 #define STM32_PWM_TIM2_IRQ_PRIORITY         3

@@ -110,21 +112,16 @@
 /*

  * SERIAL driver system settings.

  */

-#define STM32_SERIAL_USE_USART1             TRUE

+#define STM32_SERIAL_USE_USART1             FALSE

 #define STM32_SERIAL_USE_USART2             FALSE

-#define STM32_SERIAL_USE_USART3             FALSE

-#define STM32_SERIAL_USE_UART4              FALSE

-#define STM32_SERIAL_USE_UART5              FALSE

-#define STM32_SERIAL_USE_USART6             FALSE

 #define STM32_SERIAL_USART1_PRIORITY        3

 #define STM32_SERIAL_USART2_PRIORITY        3

 

 /*

  * SPI driver system settings.

  */

-#define STM32_SPI_USE_SPI1                  TRUE

-#define STM32_SPI_USE_SPI2                  TRUE

-#define STM32_SPI_USE_SPI3                  FALSE

+#define STM32_SPI_USE_SPI1                  FALSE

+#define STM32_SPI_USE_SPI2                  FALSE

 #define STM32_SPI_SPI1_DMA_PRIORITY         1

 #define STM32_SPI_SPI2_DMA_PRIORITY         1

 #define STM32_SPI_SPI1_IRQ_PRIORITY         2

@@ -134,8 +131,8 @@
 /*

  * UART driver system settings.

  */

-#define STM32_UART_USE_USART1               TRUE

-#define STM32_UART_USE_USART2               TRUE

+#define STM32_UART_USE_USART1               FALSE

+#define STM32_UART_USE_USART2               FALSE

 #define STM32_UART_USART1_IRQ_PRIORITY      3

 #define STM32_UART_USART2_IRQ_PRIORITY      3

 #define STM32_UART_USART1_DMA_PRIORITY      0

diff --git a/testhal/STM32F0xx/EXT/mcuconf.h b/testhal/STM32F0xx/EXT/mcuconf.h
index 12eba360b..e635e00b3 100644
--- a/testhal/STM32F0xx/EXT/mcuconf.h
+++ b/testhal/STM32F0xx/EXT/mcuconf.h
@@ -32,6 +32,8 @@
  * 0...3        Lowest...Highest.

  */

 

+#define STM32F0xx_MCUCONF

+

 /*

  * HAL driver system settings.

  */

@@ -62,7 +64,7 @@
 /*

  * ADC driver system settings.

  */

-#define STM32_ADC_USE_ADC1                  TRUE

+#define STM32_ADC_USE_ADC1                  FALSE

 #define STM32_ADC_ADC1_DMA_PRIORITY         2

 #define STM32_ADC_IRQ_PRIORITY              2

 #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     2

@@ -80,8 +82,8 @@
  * GPT driver system settings.

  */

 #define STM32_GPT_USE_TIM1                  FALSE

-#define STM32_GPT_USE_TIM2                  TRUE

-#define STM32_GPT_USE_TIM3                  TRUE

+#define STM32_GPT_USE_TIM2                  FALSE

+#define STM32_GPT_USE_TIM3                  FALSE

 #define STM32_GPT_TIM1_IRQ_PRIORITY         2

 #define STM32_GPT_TIM2_IRQ_PRIORITY         2

 #define STM32_GPT_TIM3_IRQ_PRIORITY         2

@@ -91,7 +93,7 @@
  */

 #define STM32_ICU_USE_TIM1                  FALSE

 #define STM32_ICU_USE_TIM2                  FALSE

-#define STM32_ICU_USE_TIM3                  TRUE

+#define STM32_ICU_USE_TIM3                  FALSE

 #define STM32_ICU_TIM1_IRQ_PRIORITY         3

 #define STM32_ICU_TIM2_IRQ_PRIORITY         3

 #define STM32_ICU_TIM3_IRQ_PRIORITY         3

@@ -101,7 +103,7 @@
  */

 #define STM32_PWM_USE_ADVANCED              FALSE

 #define STM32_PWM_USE_TIM1                  FALSE

-#define STM32_PWM_USE_TIM2                  TRUE

+#define STM32_PWM_USE_TIM2                  FALSE

 #define STM32_PWM_USE_TIM3                  FALSE

 #define STM32_PWM_TIM1_IRQ_PRIORITY         3

 #define STM32_PWM_TIM2_IRQ_PRIORITY         3

@@ -110,21 +112,16 @@
 /*

  * SERIAL driver system settings.

  */

-#define STM32_SERIAL_USE_USART1             TRUE

+#define STM32_SERIAL_USE_USART1             FALSE

 #define STM32_SERIAL_USE_USART2             FALSE

-#define STM32_SERIAL_USE_USART3             FALSE

-#define STM32_SERIAL_USE_UART4              FALSE

-#define STM32_SERIAL_USE_UART5              FALSE

-#define STM32_SERIAL_USE_USART6             FALSE

 #define STM32_SERIAL_USART1_PRIORITY        3

 #define STM32_SERIAL_USART2_PRIORITY        3

 

 /*

  * SPI driver system settings.

  */

-#define STM32_SPI_USE_SPI1                  TRUE

-#define STM32_SPI_USE_SPI2                  TRUE

-#define STM32_SPI_USE_SPI3                  FALSE

+#define STM32_SPI_USE_SPI1                  FALSE

+#define STM32_SPI_USE_SPI2                  FALSE

 #define STM32_SPI_SPI1_DMA_PRIORITY         1

 #define STM32_SPI_SPI2_DMA_PRIORITY         1

 #define STM32_SPI_SPI1_IRQ_PRIORITY         2

@@ -134,8 +131,8 @@
 /*

  * UART driver system settings.

  */

-#define STM32_UART_USE_USART1               TRUE

-#define STM32_UART_USE_USART2               TRUE

+#define STM32_UART_USE_USART1               FALSE

+#define STM32_UART_USE_USART2               FALSE

 #define STM32_UART_USART1_IRQ_PRIORITY      3

 #define STM32_UART_USART2_IRQ_PRIORITY      3

 #define STM32_UART_USART1_DMA_PRIORITY      0

diff --git a/testhal/STM32F0xx/IRQ_STORM/mcuconf.h b/testhal/STM32F0xx/IRQ_STORM/mcuconf.h
index 0ca5f107b..f1e7ab918 100644
--- a/testhal/STM32F0xx/IRQ_STORM/mcuconf.h
+++ b/testhal/STM32F0xx/IRQ_STORM/mcuconf.h
@@ -32,6 +32,8 @@
  * 0...3        Lowest...Highest.

  */

 

+#define STM32F0xx_MCUCONF

+

 /*

  * HAL driver system settings.

  */

@@ -62,7 +64,7 @@
 /*

  * ADC driver system settings.

  */

-#define STM32_ADC_USE_ADC1                  TRUE

+#define STM32_ADC_USE_ADC1                  FALSE

 #define STM32_ADC_ADC1_DMA_PRIORITY         2

 #define STM32_ADC_IRQ_PRIORITY              2

 #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     2

@@ -83,15 +85,15 @@
 #define STM32_GPT_USE_TIM2                  TRUE

 #define STM32_GPT_USE_TIM3                  TRUE

 #define STM32_GPT_TIM1_IRQ_PRIORITY         2

-#define STM32_GPT_TIM2_IRQ_PRIORITY         1

-#define STM32_GPT_TIM3_IRQ_PRIORITY         3

+#define STM32_GPT_TIM2_IRQ_PRIORITY         2

+#define STM32_GPT_TIM3_IRQ_PRIORITY         2

 

 /*

  * ICU driver system settings.

  */

 #define STM32_ICU_USE_TIM1                  FALSE

 #define STM32_ICU_USE_TIM2                  FALSE

-#define STM32_ICU_USE_TIM3                  TRUE

+#define STM32_ICU_USE_TIM3                  FALSE

 #define STM32_ICU_TIM1_IRQ_PRIORITY         3

 #define STM32_ICU_TIM2_IRQ_PRIORITY         3

 #define STM32_ICU_TIM3_IRQ_PRIORITY         3

@@ -101,7 +103,7 @@
  */

 #define STM32_PWM_USE_ADVANCED              FALSE

 #define STM32_PWM_USE_TIM1                  FALSE

-#define STM32_PWM_USE_TIM2                  TRUE

+#define STM32_PWM_USE_TIM2                  FALSE

 #define STM32_PWM_USE_TIM3                  FALSE

 #define STM32_PWM_TIM1_IRQ_PRIORITY         3

 #define STM32_PWM_TIM2_IRQ_PRIORITY         3

@@ -112,19 +114,14 @@
  */

 #define STM32_SERIAL_USE_USART1             TRUE

 #define STM32_SERIAL_USE_USART2             FALSE

-#define STM32_SERIAL_USE_USART3             FALSE

-#define STM32_SERIAL_USE_UART4              FALSE

-#define STM32_SERIAL_USE_UART5              FALSE

-#define STM32_SERIAL_USE_USART6             FALSE

 #define STM32_SERIAL_USART1_PRIORITY        3

 #define STM32_SERIAL_USART2_PRIORITY        3

 

 /*

  * SPI driver system settings.

  */

-#define STM32_SPI_USE_SPI1                  TRUE

-#define STM32_SPI_USE_SPI2                  TRUE

-#define STM32_SPI_USE_SPI3                  FALSE

+#define STM32_SPI_USE_SPI1                  FALSE

+#define STM32_SPI_USE_SPI2                  FALSE

 #define STM32_SPI_SPI1_DMA_PRIORITY         1

 #define STM32_SPI_SPI2_DMA_PRIORITY         1

 #define STM32_SPI_SPI1_IRQ_PRIORITY         2

@@ -134,8 +131,8 @@
 /*

  * UART driver system settings.

  */

-#define STM32_UART_USE_USART1               TRUE

-#define STM32_UART_USE_USART2               TRUE

+#define STM32_UART_USE_USART1               FALSE

+#define STM32_UART_USE_USART2               FALSE

 #define STM32_UART_USART1_IRQ_PRIORITY      3

 #define STM32_UART_USART2_IRQ_PRIORITY      3

 #define STM32_UART_USART1_DMA_PRIORITY      0

diff --git a/testhal/STM32F0xx/PWM-ICU/mcuconf.h b/testhal/STM32F0xx/PWM-ICU/mcuconf.h
index 12eba360b..fc02500bd 100644
--- a/testhal/STM32F0xx/PWM-ICU/mcuconf.h
+++ b/testhal/STM32F0xx/PWM-ICU/mcuconf.h
@@ -32,6 +32,8 @@
  * 0...3        Lowest...Highest.

  */

 

+#define STM32F0xx_MCUCONF

+

 /*

  * HAL driver system settings.

  */

@@ -62,7 +64,7 @@
 /*

  * ADC driver system settings.

  */

-#define STM32_ADC_USE_ADC1                  TRUE

+#define STM32_ADC_USE_ADC1                  FALSE

 #define STM32_ADC_ADC1_DMA_PRIORITY         2

 #define STM32_ADC_IRQ_PRIORITY              2

 #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     2

@@ -80,8 +82,8 @@
  * GPT driver system settings.

  */

 #define STM32_GPT_USE_TIM1                  FALSE

-#define STM32_GPT_USE_TIM2                  TRUE

-#define STM32_GPT_USE_TIM3                  TRUE

+#define STM32_GPT_USE_TIM2                  FALSE

+#define STM32_GPT_USE_TIM3                  FALSE

 #define STM32_GPT_TIM1_IRQ_PRIORITY         2

 #define STM32_GPT_TIM2_IRQ_PRIORITY         2

 #define STM32_GPT_TIM3_IRQ_PRIORITY         2

@@ -110,21 +112,16 @@
 /*

  * SERIAL driver system settings.

  */

-#define STM32_SERIAL_USE_USART1             TRUE

+#define STM32_SERIAL_USE_USART1             FALSE

 #define STM32_SERIAL_USE_USART2             FALSE

-#define STM32_SERIAL_USE_USART3             FALSE

-#define STM32_SERIAL_USE_UART4              FALSE

-#define STM32_SERIAL_USE_UART5              FALSE

-#define STM32_SERIAL_USE_USART6             FALSE

 #define STM32_SERIAL_USART1_PRIORITY        3

 #define STM32_SERIAL_USART2_PRIORITY        3

 

 /*

  * SPI driver system settings.

  */

-#define STM32_SPI_USE_SPI1                  TRUE

-#define STM32_SPI_USE_SPI2                  TRUE

-#define STM32_SPI_USE_SPI3                  FALSE

+#define STM32_SPI_USE_SPI1                  FALSE

+#define STM32_SPI_USE_SPI2                  FALSE

 #define STM32_SPI_SPI1_DMA_PRIORITY         1

 #define STM32_SPI_SPI2_DMA_PRIORITY         1

 #define STM32_SPI_SPI1_IRQ_PRIORITY         2

@@ -134,8 +131,8 @@
 /*

  * UART driver system settings.

  */

-#define STM32_UART_USE_USART1               TRUE

-#define STM32_UART_USE_USART2               TRUE

+#define STM32_UART_USE_USART1               FALSE

+#define STM32_UART_USE_USART2               FALSE

 #define STM32_UART_USART1_IRQ_PRIORITY      3

 #define STM32_UART_USART2_IRQ_PRIORITY      3

 #define STM32_UART_USART1_DMA_PRIORITY      0

diff --git a/testhal/STM32F0xx/UART/mcuconf.h b/testhal/STM32F0xx/UART/mcuconf.h
index 12eba360b..e148ed6bb 100644
--- a/testhal/STM32F0xx/UART/mcuconf.h
+++ b/testhal/STM32F0xx/UART/mcuconf.h
@@ -32,6 +32,8 @@
  * 0...3        Lowest...Highest.

  */

 

+#define STM32F0xx_MCUCONF

+

 /*

  * HAL driver system settings.

  */

@@ -62,7 +64,7 @@
 /*

  * ADC driver system settings.

  */

-#define STM32_ADC_USE_ADC1                  TRUE

+#define STM32_ADC_USE_ADC1                  FALSE

 #define STM32_ADC_ADC1_DMA_PRIORITY         2

 #define STM32_ADC_IRQ_PRIORITY              2

 #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     2

@@ -80,8 +82,8 @@
  * GPT driver system settings.

  */

 #define STM32_GPT_USE_TIM1                  FALSE

-#define STM32_GPT_USE_TIM2                  TRUE

-#define STM32_GPT_USE_TIM3                  TRUE

+#define STM32_GPT_USE_TIM2                  FALSE

+#define STM32_GPT_USE_TIM3                  FALSE

 #define STM32_GPT_TIM1_IRQ_PRIORITY         2

 #define STM32_GPT_TIM2_IRQ_PRIORITY         2

 #define STM32_GPT_TIM3_IRQ_PRIORITY         2

@@ -91,7 +93,7 @@
  */

 #define STM32_ICU_USE_TIM1                  FALSE

 #define STM32_ICU_USE_TIM2                  FALSE

-#define STM32_ICU_USE_TIM3                  TRUE

+#define STM32_ICU_USE_TIM3                  FALSE

 #define STM32_ICU_TIM1_IRQ_PRIORITY         3

 #define STM32_ICU_TIM2_IRQ_PRIORITY         3

 #define STM32_ICU_TIM3_IRQ_PRIORITY         3

@@ -101,7 +103,7 @@
  */

 #define STM32_PWM_USE_ADVANCED              FALSE

 #define STM32_PWM_USE_TIM1                  FALSE

-#define STM32_PWM_USE_TIM2                  TRUE

+#define STM32_PWM_USE_TIM2                  FALSE

 #define STM32_PWM_USE_TIM3                  FALSE

 #define STM32_PWM_TIM1_IRQ_PRIORITY         3

 #define STM32_PWM_TIM2_IRQ_PRIORITY         3

@@ -110,21 +112,16 @@
 /*

  * SERIAL driver system settings.

  */

-#define STM32_SERIAL_USE_USART1             TRUE

+#define STM32_SERIAL_USE_USART1             FALSE

 #define STM32_SERIAL_USE_USART2             FALSE

-#define STM32_SERIAL_USE_USART3             FALSE

-#define STM32_SERIAL_USE_UART4              FALSE

-#define STM32_SERIAL_USE_UART5              FALSE

-#define STM32_SERIAL_USE_USART6             FALSE

 #define STM32_SERIAL_USART1_PRIORITY        3

 #define STM32_SERIAL_USART2_PRIORITY        3

 

 /*

  * SPI driver system settings.

  */

-#define STM32_SPI_USE_SPI1                  TRUE

-#define STM32_SPI_USE_SPI2                  TRUE

-#define STM32_SPI_USE_SPI3                  FALSE

+#define STM32_SPI_USE_SPI1                  FALSE

+#define STM32_SPI_USE_SPI2                  FALSE

 #define STM32_SPI_SPI1_DMA_PRIORITY         1

 #define STM32_SPI_SPI2_DMA_PRIORITY         1

 #define STM32_SPI_SPI1_IRQ_PRIORITY         2

diff --git a/testhal/STM32F1xx/USB_CDC_F107/.cproject b/testhal/STM32F1xx/USB_CDC_F107/.cproject
new file mode 100644
index 000000000..e5f35ee12
--- /dev/null
+++ b/testhal/STM32F1xx/USB_CDC_F107/.cproject
@@ -0,0 +1,50 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?>
+
+<cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="0.606206631">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="0.606206631" moduleId="org.eclipse.cdt.core.settings" name="Default">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.VCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactName="${ProjName}" buildProperties="" description="" id="0.606206631" name="Default" parent="org.eclipse.cdt.build.core.prefbase.cfg">
+					<folderInfo id="0.606206631." name="/" resourcePath="">
+						<toolChain id="org.eclipse.cdt.build.core.prefbase.toolchain.1598191217" name="No ToolChain" resourceTypeBasedDiscovery="false" superClass="org.eclipse.cdt.build.core.prefbase.toolchain">
+							<targetPlatform id="org.eclipse.cdt.build.core.prefbase.toolchain.1598191217.431912395" name=""/>
+							<builder id="org.eclipse.cdt.build.core.settings.default.builder.491684214" keepEnvironmentInBuildfile="false" managedBuildOn="false" name="Gnu Make Builder" parallelBuildOn="true" parallelizationNumber="-1" superClass="org.eclipse.cdt.build.core.settings.default.builder"/>
+							<tool id="org.eclipse.cdt.build.core.settings.holder.libs.1033587510" name="holder for library settings" superClass="org.eclipse.cdt.build.core.settings.holder.libs"/>
+							<tool id="org.eclipse.cdt.build.core.settings.holder.381416483" name="Assembly" superClass="org.eclipse.cdt.build.core.settings.holder">
+								<inputType id="org.eclipse.cdt.build.core.settings.holder.inType.298564936" languageId="org.eclipse.cdt.core.assembly" languageName="Assembly" sourceContentType="org.eclipse.cdt.core.asmSource" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
+							</tool>
+							<tool id="org.eclipse.cdt.build.core.settings.holder.1960988986" name="GNU C++" superClass="org.eclipse.cdt.build.core.settings.holder">
+								<inputType id="org.eclipse.cdt.build.core.settings.holder.inType.830442676" languageId="org.eclipse.cdt.core.g++" languageName="GNU C++" sourceContentType="org.eclipse.cdt.core.cxxSource,org.eclipse.cdt.core.cxxHeader" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
+							</tool>
+							<tool id="org.eclipse.cdt.build.core.settings.holder.338669585" name="GNU C" superClass="org.eclipse.cdt.build.core.settings.holder">
+								<inputType id="org.eclipse.cdt.build.core.settings.holder.inType.1443003658" languageId="org.eclipse.cdt.core.gcc" languageName="GNU C" sourceContentType="org.eclipse.cdt.core.cSource,org.eclipse.cdt.core.cHeader" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
+							</tool>
+						</toolChain>
+					</folderInfo>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+	</storageModule>
+	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+		<project id="TEST-STM32F1xx-USB_CDC _F107.null.636142167" name="TEST-STM32F1xx-USB_CDC _F107"/>
+	</storageModule>
+	<storageModule moduleId="scannerConfiguration">
+		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+		<scannerConfigBuildInfo instanceId="0.606206631">
+			<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile"/>
+		</scannerConfigBuildInfo>
+	</storageModule>
+</cproject>
diff --git a/testhal/STM32F1xx/USB_CDC_F107/.project b/testhal/STM32F1xx/USB_CDC_F107/.project
new file mode 100644
index 000000000..cdd1937af
--- /dev/null
+++ b/testhal/STM32F1xx/USB_CDC_F107/.project
@@ -0,0 +1,95 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>TEST-STM32F1xx-USB_CDC_F107</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+				<dictionary>
+					<key>?name?</key>
+					<value></value>
+				</dictionary>
+				<dictionary>
+					<key>org.eclipse.cdt.make.core.append_environment</key>
+					<value>true</value>
+				</dictionary>
+				<dictionary>
+					<key>org.eclipse.cdt.make.core.autoBuildTarget</key>
+					<value>all</value>
+				</dictionary>
+				<dictionary>
+					<key>org.eclipse.cdt.make.core.buildArguments</key>
+					<value>-j</value>
+				</dictionary>
+				<dictionary>
+					<key>org.eclipse.cdt.make.core.buildCommand</key>
+					<value>make</value>
+				</dictionary>
+				<dictionary>
+					<key>org.eclipse.cdt.make.core.cleanBuildTarget</key>
+					<value>clean</value>
+				</dictionary>
+				<dictionary>
+					<key>org.eclipse.cdt.make.core.contents</key>
+					<value>org.eclipse.cdt.make.core.activeConfigSettings</value>
+				</dictionary>
+				<dictionary>
+					<key>org.eclipse.cdt.make.core.enableAutoBuild</key>
+					<value>false</value>
+				</dictionary>
+				<dictionary>
+					<key>org.eclipse.cdt.make.core.enableCleanBuild</key>
+					<value>true</value>
+				</dictionary>
+				<dictionary>
+					<key>org.eclipse.cdt.make.core.enableFullBuild</key>
+					<value>true</value>
+				</dictionary>
+				<dictionary>
+					<key>org.eclipse.cdt.make.core.fullBuildTarget</key>
+					<value>all</value>
+				</dictionary>
+				<dictionary>
+					<key>org.eclipse.cdt.make.core.stopOnError</key>
+					<value>true</value>
+				</dictionary>
+				<dictionary>
+					<key>org.eclipse.cdt.make.core.useDefaultBuildCmd</key>
+					<value>true</value>
+				</dictionary>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>board</name>
+			<type>2</type>
+			<locationURI>CHIBIOS/boards/OLIMEX_STM32_P107</locationURI>
+		</link>
+		<link>
+			<name>os</name>
+			<type>2</type>
+			<locationURI>CHIBIOS/os</locationURI>
+		</link>
+		<link>
+			<name>test</name>
+			<type>2</type>
+			<locationURI>CHIBIOS/test</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/testhal/STM32F1xx/USB_CDC_F107/Makefile b/testhal/STM32F1xx/USB_CDC_F107/Makefile
new file mode 100644
index 000000000..9b861f6d3
--- /dev/null
+++ b/testhal/STM32F1xx/USB_CDC_F107/Makefile
@@ -0,0 +1,209 @@
+##############################################################################

+# Build global options

+# NOTE: Can be overridden externally.

+#

+

+# Compiler options here.

+ifeq ($(USE_OPT),)

+  USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16

+endif

+

+# C specific options here (added to USE_OPT).

+ifeq ($(USE_COPT),)

+  USE_COPT = 

+endif

+

+# C++ specific options here (added to USE_OPT).

+ifeq ($(USE_CPPOPT),)

+  USE_CPPOPT = -fno-rtti

+endif

+

+# Enable this if you want the linker to remove unused code and data

+ifeq ($(USE_LINK_GC),)

+  USE_LINK_GC = yes

+endif

+

+# If enabled, this option allows to compile the application in THUMB mode.

+ifeq ($(USE_THUMB),)

+  USE_THUMB = yes

+endif

+

+# Enable this if you want to see the full log while compiling.

+ifeq ($(USE_VERBOSE_COMPILE),)

+  USE_VERBOSE_COMPILE = no

+endif

+

+#

+# Build global options

+##############################################################################

+

+##############################################################################

+# Architecture or project specific options

+#

+

+# Enable this if you really want to use the STM FWLib.

+ifeq ($(USE_FWLIB),)

+  USE_FWLIB = no

+endif

+

+#

+# Architecture or project specific options

+##############################################################################

+

+##############################################################################

+# Project, sources and paths

+#

+

+# Define project name here

+PROJECT = ch

+

+# Imported source files and paths

+CHIBIOS = ../../..

+include $(CHIBIOS)/boards/OLIMEX_STM32_P107/board.mk

+include $(CHIBIOS)/os/hal/platforms/STM32F1xx/platform_f105_f107.mk

+include $(CHIBIOS)/os/hal/hal.mk

+include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F1xx/port.mk

+include $(CHIBIOS)/os/kernel/kernel.mk

+include $(CHIBIOS)/test/test.mk

+

+# Define linker script file here

+LDSCRIPT= $(PORTLD)/STM32F107xC.ld

+

+# C sources that can be compiled in ARM or THUMB mode depending on the global

+# setting.

+CSRC = $(PORTSRC) \

+       $(KERNSRC) \

+       $(TESTSRC) \

+       $(HALSRC) \

+       $(PLATFORMSRC) \

+       $(BOARDSRC) \

+       $(CHIBIOS)/os/various/shell.c \

+       $(CHIBIOS)/os/various/chprintf.c \

+       main.c

+

+# C++ sources that can be compiled in ARM or THUMB mode depending on the global

+# setting.

+CPPSRC =

+

+# C sources to be compiled in ARM mode regardless of the global setting.

+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler

+#       option that results in lower performance and larger code size.

+ACSRC =

+

+# C++ sources to be compiled in ARM mode regardless of the global setting.

+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler

+#       option that results in lower performance and larger code size.

+ACPPSRC =

+

+# C sources to be compiled in THUMB mode regardless of the global setting.

+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler

+#       option that results in lower performance and larger code size.

+TCSRC =

+

+# C sources to be compiled in THUMB mode regardless of the global setting.

+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler

+#       option that results in lower performance and larger code size.

+TCPPSRC =

+

+# List ASM source files here

+ASMSRC = $(PORTASM)

+

+INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \

+         $(HALINC) $(PLATFORMINC) $(BOARDINC) \

+         $(CHIBIOS)/os/various

+

+#

+# Project, sources and paths

+##############################################################################

+

+##############################################################################

+# Compiler settings

+#

+

+MCU  = cortex-m3

+

+#TRGT = arm-elf-

+TRGT = arm-none-eabi-

+CC   = $(TRGT)gcc

+CPPC = $(TRGT)g++

+# Enable loading with g++ only if you need C++ runtime support.

+# NOTE: You can use C++ even without C++ support if you are careful. C++

+#       runtime support makes code size explode.

+LD   = $(TRGT)gcc

+#LD   = $(TRGT)g++

+CP   = $(TRGT)objcopy

+AS   = $(TRGT)gcc -x assembler-with-cpp

+OD   = $(TRGT)objdump

+HEX  = $(CP) -O ihex

+BIN  = $(CP) -O binary

+

+# ARM-specific options here

+AOPT =

+

+# THUMB-specific options here

+TOPT = -mthumb -DTHUMB

+

+# Define C warning options here

+CWARN = -Wall -Wextra -Wstrict-prototypes

+

+# Define C++ warning options here

+CPPWARN = -Wall -Wextra

+

+#

+# Compiler settings

+##############################################################################

+

+##############################################################################

+# Start of default section

+#

+

+# List all default C defines here, like -D_DEBUG=1

+DDEFS =

+

+# List all default ASM defines here, like -D_DEBUG=1

+DADEFS =

+

+# List all default directories to look for include files here

+DINCDIR =

+

+# List the default directory to look for the libraries here

+DLIBDIR =

+

+# List all default libraries here

+DLIBS =

+

+#

+# End of default section

+##############################################################################

+

+##############################################################################

+# Start of user section

+#

+

+# List all user C define here, like -D_DEBUG=1

+UDEFS =

+

+# Define ASM defines here

+UADEFS =

+

+# List all user directories here

+UINCDIR =

+

+# List the user directory to look for the libraries here

+ULIBDIR =

+

+# List all user libraries here

+ULIBS =

+

+#

+# End of user defines

+##############################################################################

+

+ifeq ($(USE_FWLIB),yes)

+  include $(CHIBIOS)/ext/stm32lib/stm32lib.mk

+  CSRC += $(STM32SRC)

+  INCDIR += $(STM32INC)

+  USE_OPT += -DUSE_STDPERIPH_DRIVER

+endif

+

+include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk

diff --git a/testhal/STM32F1xx/USB_CDC_F107/chconf.h b/testhal/STM32F1xx/USB_CDC_F107/chconf.h
new file mode 100644
index 000000000..290044421
--- /dev/null
+++ b/testhal/STM32F1xx/USB_CDC_F107/chconf.h
@@ -0,0 +1,535 @@
+/*

+    ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,

+                 2011,2012 Giovanni Di Sirio.

+

+    This file is part of ChibiOS/RT.

+

+    ChibiOS/RT is free software; you can redistribute it and/or modify

+    it under the terms of the GNU General Public License as published by

+    the Free Software Foundation; either version 3 of the License, or

+    (at your option) any later version.

+

+    ChibiOS/RT is distributed in the hope that it will be useful,

+    but WITHOUT ANY WARRANTY; without even the implied warranty of

+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

+    GNU General Public License for more details.

+

+    You should have received a copy of the GNU General Public License

+    along with this program.  If not, see <http://www.gnu.org/licenses/>.

+*/

+

+/**

+ * @file    templates/chconf.h

+ * @brief   Configuration file template.

+ * @details A copy of this file must be placed in each project directory, it

+ *          contains the application specific kernel settings.

+ *

+ * @addtogroup config

+ * @details Kernel related settings and hooks.

+ * @{

+ */

+

+#ifndef _CHCONF_H_

+#define _CHCONF_H_

+

+/*===========================================================================*/

+/**

+ * @name Kernel parameters and options

+ * @{

+ */

+/*===========================================================================*/

+

+/**

+ * @brief   System tick frequency.

+ * @details Frequency of the system timer that drives the system ticks. This

+ *          setting also defines the system tick time unit.

+ */

+#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__)

+#define CH_FREQUENCY                    1000

+#endif

+

+/**

+ * @brief   Round robin interval.

+ * @details This constant is the number of system ticks allowed for the

+ *          threads before preemption occurs. Setting this value to zero

+ *          disables the preemption for threads with equal priority and the

+ *          round robin becomes cooperative. Note that higher priority

+ *          threads can still preempt, the kernel is always preemptive.

+ *

+ * @note    Disabling the round robin preemption makes the kernel more compact

+ *          and generally faster.

+ */

+#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__)

+#define CH_TIME_QUANTUM                 20

+#endif

+

+/**

+ * @brief   Managed RAM size.

+ * @details Size of the RAM area to be managed by the OS. If set to zero

+ *          then the whole available RAM is used. The core memory is made

+ *          available to the heap allocator and/or can be used directly through

+ *          the simplified core memory allocator.

+ *

+ * @note    In order to let the OS manage the whole RAM the linker script must

+ *          provide the @p __heap_base__ and @p __heap_end__ symbols.

+ * @note    Requires @p CH_USE_MEMCORE.

+ */

+#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__)

+#define CH_MEMCORE_SIZE                 0

+#endif

+

+/**

+ * @brief   Idle thread automatic spawn suppression.

+ * @details When this option is activated the function @p chSysInit()

+ *          does not spawn the idle thread automatically. The application has

+ *          then the responsibility to do one of the following:

+ *          - Spawn a custom idle thread at priority @p IDLEPRIO.

+ *          - Change the main() thread priority to @p IDLEPRIO then enter

+ *            an endless loop. In this scenario the @p main() thread acts as

+ *            the idle thread.

+ *          .

+ * @note    Unless an idle thread is spawned the @p main() thread must not

+ *          enter a sleep state.

+ */

+#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__)

+#define CH_NO_IDLE_THREAD               FALSE

+#endif

+

+/** @} */

+

+/*===========================================================================*/

+/**

+ * @name Performance options

+ * @{

+ */

+/*===========================================================================*/

+

+/**

+ * @brief   OS optimization.

+ * @details If enabled then time efficient rather than space efficient code

+ *          is used when two possible implementations exist.

+ *

+ * @note    This is not related to the compiler optimization options.

+ * @note    The default is @p TRUE.

+ */

+#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__)

+#define CH_OPTIMIZE_SPEED               TRUE

+#endif

+

+/** @} */

+

+/*===========================================================================*/

+/**

+ * @name Subsystem options

+ * @{

+ */

+/*===========================================================================*/

+

+/**

+ * @brief   Threads registry APIs.

+ * @details If enabled then the registry APIs are included in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__)

+#define CH_USE_REGISTRY                 TRUE

+#endif

+

+/**

+ * @brief   Threads synchronization APIs.

+ * @details If enabled then the @p chThdWait() function is included in

+ *          the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__)

+#define CH_USE_WAITEXIT                 TRUE

+#endif

+

+/**

+ * @brief   Semaphores APIs.

+ * @details If enabled then the Semaphores APIs are included in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__)

+#define CH_USE_SEMAPHORES               TRUE

+#endif

+

+/**

+ * @brief   Semaphores queuing mode.

+ * @details If enabled then the threads are enqueued on semaphores by

+ *          priority rather than in FIFO order.

+ *

+ * @note    The default is @p FALSE. Enable this if you have special requirements.

+ * @note    Requires @p CH_USE_SEMAPHORES.

+ */

+#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__)

+#define CH_USE_SEMAPHORES_PRIORITY      FALSE

+#endif

+

+/**

+ * @brief   Atomic semaphore API.

+ * @details If enabled then the semaphores the @p chSemSignalWait() API

+ *          is included in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ * @note    Requires @p CH_USE_SEMAPHORES.

+ */

+#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__)

+#define CH_USE_SEMSW                    TRUE

+#endif

+

+/**

+ * @brief   Mutexes APIs.

+ * @details If enabled then the mutexes APIs are included in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__)

+#define CH_USE_MUTEXES                  TRUE

+#endif

+

+/**

+ * @brief   Conditional Variables APIs.

+ * @details If enabled then the conditional variables APIs are included

+ *          in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ * @note    Requires @p CH_USE_MUTEXES.

+ */

+#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__)

+#define CH_USE_CONDVARS                 TRUE

+#endif

+

+/**

+ * @brief   Conditional Variables APIs with timeout.

+ * @details If enabled then the conditional variables APIs with timeout

+ *          specification are included in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ * @note    Requires @p CH_USE_CONDVARS.

+ */

+#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__)

+#define CH_USE_CONDVARS_TIMEOUT         TRUE

+#endif

+

+/**

+ * @brief   Events Flags APIs.

+ * @details If enabled then the event flags APIs are included in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__)

+#define CH_USE_EVENTS                   TRUE

+#endif

+

+/**

+ * @brief   Events Flags APIs with timeout.

+ * @details If enabled then the events APIs with timeout specification

+ *          are included in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ * @note    Requires @p CH_USE_EVENTS.

+ */

+#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__)

+#define CH_USE_EVENTS_TIMEOUT           TRUE

+#endif

+

+/**

+ * @brief   Synchronous Messages APIs.

+ * @details If enabled then the synchronous messages APIs are included

+ *          in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__)

+#define CH_USE_MESSAGES                 TRUE

+#endif

+

+/**

+ * @brief   Synchronous Messages queuing mode.

+ * @details If enabled then messages are served by priority rather than in

+ *          FIFO order.

+ *

+ * @note    The default is @p FALSE. Enable this if you have special requirements.

+ * @note    Requires @p CH_USE_MESSAGES.

+ */

+#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__)

+#define CH_USE_MESSAGES_PRIORITY        FALSE

+#endif

+

+/**

+ * @brief   Mailboxes APIs.

+ * @details If enabled then the asynchronous messages (mailboxes) APIs are

+ *          included in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ * @note    Requires @p CH_USE_SEMAPHORES.

+ */

+#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__)

+#define CH_USE_MAILBOXES                TRUE

+#endif

+

+/**

+ * @brief   I/O Queues APIs.

+ * @details If enabled then the I/O queues APIs are included in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__)

+#define CH_USE_QUEUES                   TRUE

+#endif

+

+/**

+ * @brief   Core Memory Manager APIs.

+ * @details If enabled then the core memory manager APIs are included

+ *          in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__)

+#define CH_USE_MEMCORE                  TRUE

+#endif

+

+/**

+ * @brief   Heap Allocator APIs.

+ * @details If enabled then the memory heap allocator APIs are included

+ *          in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ * @note    Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or

+ *          @p CH_USE_SEMAPHORES.

+ * @note    Mutexes are recommended.

+ */

+#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__)

+#define CH_USE_HEAP                     TRUE

+#endif

+

+/**

+ * @brief   C-runtime allocator.

+ * @details If enabled the the heap allocator APIs just wrap the C-runtime

+ *          @p malloc() and @p free() functions.

+ *

+ * @note    The default is @p FALSE.

+ * @note    Requires @p CH_USE_HEAP.

+ * @note    The C-runtime may or may not require @p CH_USE_MEMCORE, see the

+ *          appropriate documentation.

+ */

+#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__)

+#define CH_USE_MALLOC_HEAP              FALSE

+#endif

+

+/**

+ * @brief   Memory Pools Allocator APIs.

+ * @details If enabled then the memory pools allocator APIs are included

+ *          in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__)

+#define CH_USE_MEMPOOLS                 TRUE

+#endif

+

+/**

+ * @brief   Dynamic Threads APIs.

+ * @details If enabled then the dynamic threads creation APIs are included

+ *          in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ * @note    Requires @p CH_USE_WAITEXIT.

+ * @note    Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS.

+ */

+#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__)

+#define CH_USE_DYNAMIC                  TRUE

+#endif

+

+/** @} */

+

+/*===========================================================================*/

+/**

+ * @name Debug options

+ * @{

+ */

+/*===========================================================================*/

+

+/**

+ * @brief   Debug option, system state check.

+ * @details If enabled the correct call protocol for system APIs is checked

+ *          at runtime.

+ *

+ * @note    The default is @p FALSE.

+ */

+#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__)

+#define CH_DBG_SYSTEM_STATE_CHECK       TRUE

+#endif

+

+/**

+ * @brief   Debug option, parameters checks.

+ * @details If enabled then the checks on the API functions input

+ *          parameters are activated.

+ *

+ * @note    The default is @p FALSE.

+ */

+#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__)

+#define CH_DBG_ENABLE_CHECKS            TRUE

+#endif

+

+/**

+ * @brief   Debug option, consistency checks.

+ * @details If enabled then all the assertions in the kernel code are

+ *          activated. This includes consistency checks inside the kernel,

+ *          runtime anomalies and port-defined checks.

+ *

+ * @note    The default is @p FALSE.

+ */

+#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__)

+#define CH_DBG_ENABLE_ASSERTS           TRUE

+#endif

+

+/**

+ * @brief   Debug option, trace buffer.

+ * @details If enabled then the context switch circular trace buffer is

+ *          activated.

+ *

+ * @note    The default is @p FALSE.

+ */

+#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__)

+#define CH_DBG_ENABLE_TRACE             TRUE

+#endif

+

+/**

+ * @brief   Debug option, stack checks.

+ * @details If enabled then a runtime stack check is performed.

+ *

+ * @note    The default is @p FALSE.

+ * @note    The stack check is performed in a architecture/port dependent way.

+ *          It may not be implemented or some ports.

+ * @note    The default failure mode is to halt the system with the global

+ *          @p panic_msg variable set to @p NULL.

+ */

+#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__)

+#define CH_DBG_ENABLE_STACK_CHECK       TRUE

+#endif

+

+/**

+ * @brief   Debug option, stacks initialization.

+ * @details If enabled then the threads working area is filled with a byte

+ *          value when a thread is created. This can be useful for the

+ *          runtime measurement of the used stack.

+ *

+ * @note    The default is @p FALSE.

+ */

+#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__)

+#define CH_DBG_FILL_THREADS             TRUE

+#endif

+

+/**

+ * @brief   Debug option, threads profiling.

+ * @details If enabled then a field is added to the @p Thread structure that

+ *          counts the system ticks occurred while executing the thread.

+ *

+ * @note    The default is @p TRUE.

+ * @note    This debug option is defaulted to TRUE because it is required by

+ *          some test cases into the test suite.

+ */

+#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__)

+#define CH_DBG_THREADS_PROFILING        TRUE

+#endif

+

+/** @} */

+

+/*===========================================================================*/

+/**

+ * @name Kernel hooks

+ * @{

+ */

+/*===========================================================================*/

+

+/**

+ * @brief   Threads descriptor structure extension.

+ * @details User fields added to the end of the @p Thread structure.

+ */

+#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__)

+#define THREAD_EXT_FIELDS                                                   \

+  /* Add threads custom fields here.*/

+#endif

+

+/**

+ * @brief   Threads initialization hook.

+ * @details User initialization code added to the @p chThdInit() API.

+ *

+ * @note    It is invoked from within @p chThdInit() and implicitly from all

+ *          the threads creation APIs.

+ */

+#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__)

+#define THREAD_EXT_INIT_HOOK(tp) {                                          \

+  /* Add threads initialization code here.*/                                \

+}

+#endif

+

+/**

+ * @brief   Threads finalization hook.

+ * @details User finalization code added to the @p chThdExit() API.

+ *

+ * @note    It is inserted into lock zone.

+ * @note    It is also invoked when the threads simply return in order to

+ *          terminate.

+ */

+#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__)

+#define THREAD_EXT_EXIT_HOOK(tp) {                                          \

+  /* Add threads finalization code here.*/                                  \

+}

+#endif

+

+/**

+ * @brief   Context switch hook.

+ * @details This hook is invoked just before switching between threads.

+ */

+#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__)

+#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) {                              \

+  /* System halt code here.*/                                               \

+}

+#endif

+

+/**

+ * @brief   Idle Loop hook.

+ * @details This hook is continuously invoked by the idle thread loop.

+ */

+#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__)

+#define IDLE_LOOP_HOOK() {                                                  \

+  /* Idle loop code here.*/                                                 \

+}

+#endif

+

+/**

+ * @brief   System tick event hook.

+ * @details This hook is invoked in the system tick handler immediately

+ *          after processing the virtual timers queue.

+ */

+#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__)

+#define SYSTEM_TICK_EVENT_HOOK() {                                          \

+  /* System tick event code here.*/                                         \

+}

+#endif

+

+/**

+ * @brief   System halt hook.

+ * @details This hook is invoked in case to a system halting error before

+ *          the system is halted.

+ */

+#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__)

+#define SYSTEM_HALT_HOOK() {                                                \

+  /* System halt code here.*/                                               \

+}

+#endif

+

+/** @} */

+

+/*===========================================================================*/

+/* Port-specific settings (override port settings defaulted in chcore.h).    */

+/*===========================================================================*/

+

+#endif  /* _CHCONF_H_ */

+

+/** @} */

diff --git a/testhal/STM32F1xx/USB_CDC_F107/halconf.h b/testhal/STM32F1xx/USB_CDC_F107/halconf.h
new file mode 100644
index 000000000..7d1f492f8
--- /dev/null
+++ b/testhal/STM32F1xx/USB_CDC_F107/halconf.h
@@ -0,0 +1,342 @@
+/*

+    ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,

+                 2011,2012 Giovanni Di Sirio.

+

+    This file is part of ChibiOS/RT.

+

+    ChibiOS/RT is free software; you can redistribute it and/or modify

+    it under the terms of the GNU General Public License as published by

+    the Free Software Foundation; either version 3 of the License, or

+    (at your option) any later version.

+

+    ChibiOS/RT is distributed in the hope that it will be useful,

+    but WITHOUT ANY WARRANTY; without even the implied warranty of

+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

+    GNU General Public License for more details.

+

+    You should have received a copy of the GNU General Public License

+    along with this program.  If not, see <http://www.gnu.org/licenses/>.

+*/

+

+/**

+ * @file    templates/halconf.h

+ * @brief   HAL configuration header.

+ * @details HAL configuration file, this file allows to enable or disable the

+ *          various device drivers from your application. You may also use

+ *          this file in order to override the device drivers default settings.

+ *

+ * @addtogroup HAL_CONF

+ * @{

+ */

+

+#ifndef _HALCONF_H_

+#define _HALCONF_H_

+

+#include "mcuconf.h"

+

+/**

+ * @brief   Enables the TM subsystem.

+ */

+#if !defined(HAL_USE_TM) || defined(__DOXYGEN__)

+#define HAL_USE_TM                  TRUE

+#endif

+

+/**

+ * @brief   Enables the PAL subsystem.

+ */

+#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)

+#define HAL_USE_PAL                 TRUE

+#endif

+

+/**

+ * @brief   Enables the ADC subsystem.

+ */

+#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)

+#define HAL_USE_ADC                 FALSE

+#endif

+

+/**

+ * @brief   Enables the CAN subsystem.

+ */

+#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)

+#define HAL_USE_CAN                 FALSE

+#endif

+

+/**

+ * @brief   Enables the EXT subsystem.

+ */

+#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)

+#define HAL_USE_EXT                 FALSE

+#endif

+

+/**

+ * @brief   Enables the GPT subsystem.

+ */

+#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)

+#define HAL_USE_GPT                 FALSE

+#endif

+

+/**

+ * @brief   Enables the I2C subsystem.

+ */

+#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)

+#define HAL_USE_I2C                 FALSE

+#endif

+

+/**

+ * @brief   Enables the ICU subsystem.

+ */

+#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)

+#define HAL_USE_ICU                 FALSE

+#endif

+

+/**

+ * @brief   Enables the MAC subsystem.

+ */

+#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)

+#define HAL_USE_MAC                 FALSE

+#endif

+

+/**

+ * @brief   Enables the MMC_SPI subsystem.

+ */

+#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)

+#define HAL_USE_MMC_SPI             FALSE

+#endif

+

+/**

+ * @brief   Enables the PWM subsystem.

+ */

+#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)

+#define HAL_USE_PWM                 FALSE

+#endif

+

+/**

+ * @brief   Enables the RTC subsystem.

+ */

+#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)

+#define HAL_USE_RTC                 FALSE

+#endif

+

+/**

+ * @brief   Enables the SDC subsystem.

+ */

+#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)

+#define HAL_USE_SDC                 FALSE

+#endif

+

+/**

+ * @brief   Enables the SERIAL subsystem.

+ */

+#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)

+#define HAL_USE_SERIAL              FALSE

+#endif

+

+/**

+ * @brief   Enables the SERIAL over USB subsystem.

+ */

+#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)

+#define HAL_USE_SERIAL_USB          TRUE

+#endif

+

+/**

+ * @brief   Enables the SPI subsystem.

+ */

+#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)

+#define HAL_USE_SPI                 FALSE

+#endif

+

+/**

+ * @brief   Enables the UART subsystem.

+ */

+#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)

+#define HAL_USE_UART                FALSE

+#endif

+

+/**

+ * @brief   Enables the USB subsystem.

+ */

+#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)

+#define HAL_USE_USB                 TRUE

+#endif

+

+/*===========================================================================*/

+/* ADC driver related settings.                                              */

+/*===========================================================================*/

+

+/**

+ * @brief   Enables synchronous APIs.

+ * @note    Disabling this option saves both code and data space.

+ */

+#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)

+#define ADC_USE_WAIT                TRUE

+#endif

+

+/**

+ * @brief   Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.

+ * @note    Disabling this option saves both code and data space.

+ */

+#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)

+#define ADC_USE_MUTUAL_EXCLUSION    TRUE

+#endif

+

+/*===========================================================================*/

+/* CAN driver related settings.                                              */

+/*===========================================================================*/

+

+/**

+ * @brief   Sleep mode related APIs inclusion switch.

+ */

+#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)

+#define CAN_USE_SLEEP_MODE          TRUE

+#endif

+

+/*===========================================================================*/

+/* I2C driver related settings.                                              */

+/*===========================================================================*/

+

+/**

+ * @brief   Enables the mutual exclusion APIs on the I2C bus.

+ */

+#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)

+#define I2C_USE_MUTUAL_EXCLUSION    TRUE

+#endif

+

+/*===========================================================================*/

+/* MAC driver related settings.                                              */

+/*===========================================================================*/

+

+/**

+ * @brief   Enables an event sources for incoming packets.

+ */

+#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)

+#define MAC_USE_EVENTS              TRUE

+#endif

+

+/*===========================================================================*/

+/* MMC_SPI driver related settings.                                          */

+/*===========================================================================*/

+

+/**

+ * @brief   Block size for MMC transfers.

+ */

+#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__)

+#define MMC_SECTOR_SIZE             512

+#endif

+

+/**

+ * @brief   Delays insertions.

+ * @details If enabled this options inserts delays into the MMC waiting

+ *          routines releasing some extra CPU time for the threads with

+ *          lower priority, this may slow down the driver a bit however.

+ *          This option is recommended also if the SPI driver does not

+ *          use a DMA channel and heavily loads the CPU.

+ */

+#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)

+#define MMC_NICE_WAITING            TRUE

+#endif

+

+/**

+ * @brief   Number of positive insertion queries before generating the

+ *          insertion event.

+ */

+#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__)

+#define MMC_POLLING_INTERVAL        10

+#endif

+

+/**

+ * @brief   Interval, in milliseconds, between insertion queries.

+ */

+#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__)

+#define MMC_POLLING_DELAY           10

+#endif

+

+/**

+ * @brief   Uses the SPI polled API for small data transfers.

+ * @details Polled transfers usually improve performance because it

+ *          saves two context switches and interrupt servicing. Note

+ *          that this option has no effect on large transfers which

+ *          are always performed using DMAs/IRQs.

+ */

+#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__)

+#define MMC_USE_SPI_POLLING         TRUE

+#endif

+

+/*===========================================================================*/

+/* SDC driver related settings.                                              */

+/*===========================================================================*/

+

+/**

+ * @brief   Number of initialization attempts before rejecting the card.

+ * @note    Attempts are performed at 10mS intervals.

+ */

+#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)

+#define SDC_INIT_RETRY              100

+#endif

+

+/**

+ * @brief   Include support for MMC cards.

+ * @note    MMC support is not yet implemented so this option must be kept

+ *          at @p FALSE.

+ */

+#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)

+#define SDC_MMC_SUPPORT             FALSE

+#endif

+

+/**

+ * @brief   Delays insertions.

+ * @details If enabled this options inserts delays into the MMC waiting

+ *          routines releasing some extra CPU time for the threads with

+ *          lower priority, this may slow down the driver a bit however.

+ */

+#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)

+#define SDC_NICE_WAITING            TRUE

+#endif

+

+/*===========================================================================*/

+/* SERIAL driver related settings.                                           */

+/*===========================================================================*/

+

+/**

+ * @brief   Default bit rate.

+ * @details Configuration parameter, this is the baud rate selected for the

+ *          default configuration.

+ */

+#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)

+#define SERIAL_DEFAULT_BITRATE      38400

+#endif

+

+/**

+ * @brief   Serial buffers size.

+ * @details Configuration parameter, you can change the depth of the queue

+ *          buffers depending on the requirements of your application.

+ * @note    The default is 64 bytes for both the transmission and receive

+ *          buffers.

+ */

+#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)

+#define SERIAL_BUFFERS_SIZE         16

+#endif

+

+/*===========================================================================*/

+/* SPI driver related settings.                                              */

+/*===========================================================================*/

+

+/**

+ * @brief   Enables synchronous APIs.

+ * @note    Disabling this option saves both code and data space.

+ */

+#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)

+#define SPI_USE_WAIT                TRUE

+#endif

+

+/**

+ * @brief   Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.

+ * @note    Disabling this option saves both code and data space.

+ */

+#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)

+#define SPI_USE_MUTUAL_EXCLUSION    TRUE

+#endif

+

+#endif /* _HALCONF_H_ */

+

+/** @} */

diff --git a/testhal/STM32F1xx/USB_CDC_F107/main.c b/testhal/STM32F1xx/USB_CDC_F107/main.c
new file mode 100644
index 000000000..b54d2e686
--- /dev/null
+++ b/testhal/STM32F1xx/USB_CDC_F107/main.c
@@ -0,0 +1,504 @@
+/*

+    ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,

+                 2011,2012 Giovanni Di Sirio.

+

+    This file is part of ChibiOS/RT.

+

+    ChibiOS/RT is free software; you can redistribute it and/or modify

+    it under the terms of the GNU General Public License as published by

+    the Free Software Foundation; either version 3 of the License, or

+    (at your option) any later version.

+

+    ChibiOS/RT is distributed in the hope that it will be useful,

+    but WITHOUT ANY WARRANTY; without even the implied warranty of

+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

+    GNU General Public License for more details.

+

+    You should have received a copy of the GNU General Public License

+    along with this program.  If not, see <http://www.gnu.org/licenses/>.

+*/

+

+#include <stdio.h>

+#include <string.h>

+

+#include "ch.h"

+#include "hal.h"

+#include "test.h"

+

+#include "usb_cdc.h"

+#include "shell.h"

+#include "chprintf.h"

+

+/*===========================================================================*/

+/* USB related stuff.                                                        */

+/*===========================================================================*/

+

+/*

+ * Serial over USB Driver structure.

+ */

+static SerialUSBDriver SDU1;

+

+/*

+ * USB Device Descriptor.

+ */

+static const uint8_t vcom_device_descriptor_data[18] = {

+  USB_DESC_DEVICE       (0x0110,        /* bcdUSB (1.1).                    */

+                         0x02,          /* bDeviceClass (CDC).              */

+                         0x00,          /* bDeviceSubClass.                 */

+                         0x00,          /* bDeviceProtocol.                 */

+                         0x40,          /* bMaxPacketSize.                  */

+                         0x0483,        /* idVendor (ST).                   */

+                         0x5740,        /* idProduct.                       */

+                         0x0200,        /* bcdDevice.                       */

+                         1,             /* iManufacturer.                   */

+                         2,             /* iProduct.                        */

+                         3,             /* iSerialNumber.                   */

+                         1)             /* bNumConfigurations.              */

+};

+

+/*

+ * Device Descriptor wrapper.

+ */

+static const USBDescriptor vcom_device_descriptor = {

+  sizeof vcom_device_descriptor_data,

+  vcom_device_descriptor_data

+};

+

+/* Configuration Descriptor tree for a CDC.*/

+static const uint8_t vcom_configuration_descriptor_data[67] = {

+  /* Configuration Descriptor.*/

+  USB_DESC_CONFIGURATION(67,            /* wTotalLength.                    */

+                         0x02,          /* bNumInterfaces.                  */

+                         0x01,          /* bConfigurationValue.             */

+                         0,             /* iConfiguration.                  */

+                         0xC0,          /* bmAttributes (self powered).     */

+                         50),           /* bMaxPower (100mA).               */

+  /* Interface Descriptor.*/

+  USB_DESC_INTERFACE    (0x00,          /* bInterfaceNumber.                */

+                         0x00,          /* bAlternateSetting.               */

+                         0x01,          /* bNumEndpoints.                   */

+                         0x02,          /* bInterfaceClass (Communications

+                                           Interface Class, CDC section

+                                           4.2).                            */

+                         0x02,          /* bInterfaceSubClass (Abstract

+                                         Control Model, CDC section 4.3).   */

+                         0x01,          /* bInterfaceProtocol (AT commands,

+                                           CDC section 4.4).                */

+                         0),            /* iInterface.                      */

+  /* Header Functional Descriptor (CDC section 5.2.3).*/

+  USB_DESC_BYTE         (5),            /* bLength.                         */

+  USB_DESC_BYTE         (0x24),         /* bDescriptorType (CS_INTERFACE).  */

+  USB_DESC_BYTE         (0x00),         /* bDescriptorSubtype (Header

+                                           Functional Descriptor.           */

+  USB_DESC_BCD          (0x0110),       /* bcdCDC.                          */

+  /* Call Management Functional Descriptor. */

+  USB_DESC_BYTE         (5),            /* bFunctionLength.                 */

+  USB_DESC_BYTE         (0x24),         /* bDescriptorType (CS_INTERFACE).  */

+  USB_DESC_BYTE         (0x01),         /* bDescriptorSubtype (Call Management

+                                           Functional Descriptor).          */

+  USB_DESC_BYTE         (0x00),         /* bmCapabilities (D0+D1).          */

+  USB_DESC_BYTE         (0x01),         /* bDataInterface.                  */

+  /* ACM Functional Descriptor.*/

+  USB_DESC_BYTE         (4),            /* bFunctionLength.                 */

+  USB_DESC_BYTE         (0x24),         /* bDescriptorType (CS_INTERFACE).  */

+  USB_DESC_BYTE         (0x02),         /* bDescriptorSubtype (Abstract

+                                           Control Management Descriptor).  */

+  USB_DESC_BYTE         (0x02),         /* bmCapabilities.                  */

+  /* Union Functional Descriptor.*/

+  USB_DESC_BYTE         (5),            /* bFunctionLength.                 */

+  USB_DESC_BYTE         (0x24),         /* bDescriptorType (CS_INTERFACE).  */

+  USB_DESC_BYTE         (0x06),         /* bDescriptorSubtype (Union

+                                           Functional Descriptor).          */

+  USB_DESC_BYTE         (0x00),         /* bMasterInterface (Communication

+                                           Class Interface).                */

+  USB_DESC_BYTE         (0x01),         /* bSlaveInterface0 (Data Class

+                                           Interface).                      */

+  /* Endpoint 2 Descriptor.*/

+  USB_DESC_ENDPOINT     (USB_CDC_INTERRUPT_REQUEST_EP|0x80,

+                         0x03,          /* bmAttributes (Interrupt).        */

+                         0x0008,        /* wMaxPacketSize.                  */

+                         0xFF),         /* bInterval.                       */

+  /* Interface Descriptor.*/

+  USB_DESC_INTERFACE    (0x01,          /* bInterfaceNumber.                */

+                         0x00,          /* bAlternateSetting.               */

+                         0x02,          /* bNumEndpoints.                   */

+                         0x0A,          /* bInterfaceClass (Data Class

+                                           Interface, CDC section 4.5).     */

+                         0x00,          /* bInterfaceSubClass (CDC section

+                                           4.6).                            */

+                         0x00,          /* bInterfaceProtocol (CDC section

+                                           4.7).                            */

+                         0x00),         /* iInterface.                      */

+  /* Endpoint 3 Descriptor.*/

+  USB_DESC_ENDPOINT     (USB_CDC_DATA_AVAILABLE_EP,     /* bEndpointAddress.*/

+                         0x02,          /* bmAttributes (Bulk).             */

+                         0x0040,        /* wMaxPacketSize.                  */

+                         0x00),         /* bInterval.                       */

+  /* Endpoint 1 Descriptor.*/

+  USB_DESC_ENDPOINT     (USB_CDC_DATA_REQUEST_EP|0x80,  /* bEndpointAddress.*/

+                         0x02,          /* bmAttributes (Bulk).             */

+                         0x0040,        /* wMaxPacketSize.                  */

+                         0x00)          /* bInterval.                       */

+};

+

+/*

+ * Configuration Descriptor wrapper.

+ */

+static const USBDescriptor vcom_configuration_descriptor = {

+  sizeof vcom_configuration_descriptor_data,

+  vcom_configuration_descriptor_data

+};

+

+/*

+ * U.S. English language identifier.

+ */

+static const uint8_t vcom_string0[] = {

+  USB_DESC_BYTE(4),                     /* bLength.                         */

+  USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType.                 */

+  USB_DESC_WORD(0x0409)                 /* wLANGID (U.S. English).          */

+};

+

+/*

+ * Vendor string.

+ */

+static const uint8_t vcom_string1[] = {

+  USB_DESC_BYTE(38),                    /* bLength.                         */

+  USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType.                 */

+  'S', 0, 'T', 0, 'M', 0, 'i', 0, 'c', 0, 'r', 0, 'o', 0, 'e', 0,

+  'l', 0, 'e', 0, 'c', 0, 't', 0, 'r', 0, 'o', 0, 'n', 0, 'i', 0,

+  'c', 0, 's', 0

+};

+

+/*

+ * Device Description string.

+ */

+static const uint8_t vcom_string2[] = {

+  USB_DESC_BYTE(56),                    /* bLength.                         */

+  USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType.                 */

+  'C', 0, 'h', 0, 'i', 0, 'b', 0, 'i', 0, 'O', 0, 'S', 0, '/', 0,

+  'R', 0, 'T', 0, ' ', 0, 'V', 0, 'i', 0, 'r', 0, 't', 0, 'u', 0,

+  'a', 0, 'l', 0, ' ', 0, 'C', 0, 'O', 0, 'M', 0, ' ', 0, 'P', 0,

+  'o', 0, 'r', 0, 't', 0

+};

+

+/*

+ * Serial Number string.

+ */

+static const uint8_t vcom_string3[] = {

+  USB_DESC_BYTE(8),                     /* bLength.                         */

+  USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType.                 */

+  '0' + CH_KERNEL_MAJOR, 0,

+  '0' + CH_KERNEL_MINOR, 0,

+  '0' + CH_KERNEL_PATCH, 0

+};

+

+/*

+ * Strings wrappers array.

+ */

+static const USBDescriptor vcom_strings[] = {

+  {sizeof vcom_string0, vcom_string0},

+  {sizeof vcom_string1, vcom_string1},

+  {sizeof vcom_string2, vcom_string2},

+  {sizeof vcom_string3, vcom_string3}

+};

+

+/*

+ * Handles the GET_DESCRIPTOR callback. All required descriptors must be

+ * handled here.

+ */

+static const USBDescriptor *get_descriptor(USBDriver *usbp,

+                                           uint8_t dtype,

+                                           uint8_t dindex,

+                                           uint16_t lang) {

+

+  (void)usbp;

+  (void)lang;

+  switch (dtype) {

+  case USB_DESCRIPTOR_DEVICE:

+    return &vcom_device_descriptor;

+  case USB_DESCRIPTOR_CONFIGURATION:

+    return &vcom_configuration_descriptor;

+  case USB_DESCRIPTOR_STRING:

+    if (dindex < 4)

+      return &vcom_strings[dindex];

+  }

+  return NULL;

+}

+

+/**

+ * @brief   IN EP1 state.

+ */

+static USBInEndpointState ep1instate;

+

+/**

+ * @brief   OUT EP1 state.

+ */

+static USBOutEndpointState ep1outstate;

+

+/**

+ * @brief   EP1 initialization structure (both IN and OUT).

+ */

+static const USBEndpointConfig ep1config = {

+  USB_EP_MODE_TYPE_BULK,

+  NULL,

+  sduDataTransmitted,

+  sduDataReceived,

+  0x0040,

+  0x0040,

+  &ep1instate,

+  &ep1outstate,

+  1,

+  NULL

+};

+

+/**

+ * @brief   IN EP2 state.

+ */

+static USBInEndpointState ep2instate;

+

+/**

+ * @brief   EP2 initialization structure (IN only).

+ */

+static const USBEndpointConfig ep2config = {

+  USB_EP_MODE_TYPE_INTR,

+  NULL,

+  sduInterruptTransmitted,

+  NULL,

+  0x0010,

+  0x0000,

+  &ep2instate,

+  NULL,

+  1,

+  NULL

+};

+

+/*

+ * Handles the USB driver global events.

+ */

+static void usb_event(USBDriver *usbp, usbevent_t event) {

+

+  switch (event) {

+  case USB_EVENT_RESET:

+    return;

+  case USB_EVENT_ADDRESS:

+    return;

+  case USB_EVENT_CONFIGURED:

+    chSysLockFromIsr();

+

+    /* Enables the endpoints specified into the configuration.

+       Note, this callback is invoked from an ISR so I-Class functions

+       must be used.*/

+    usbInitEndpointI(usbp, USB_CDC_DATA_REQUEST_EP, &ep1config);

+    usbInitEndpointI(usbp, USB_CDC_INTERRUPT_REQUEST_EP, &ep2config);

+

+    /* Resetting the state of the CDC subsystem.*/

+    sduConfigureHookI(usbp);

+

+    chSysUnlockFromIsr();

+    return;

+  case USB_EVENT_SUSPEND:

+    return;

+  case USB_EVENT_WAKEUP:

+    return;

+  case USB_EVENT_STALLED:

+    return;

+  }

+  return;

+}

+

+/*

+ * USB driver configuration.

+ */

+static const USBConfig usbcfg = {

+  usb_event,

+  get_descriptor,

+  sduRequestsHook,

+  NULL

+};

+

+/*

+ * Serial over USB driver configuration.

+ */

+static const SerialUSBConfig serusbcfg = {

+  &USBD1

+};

+

+/*===========================================================================*/

+/* Command line related.                                                     */

+/*===========================================================================*/

+

+#define SHELL_WA_SIZE   THD_WA_SIZE(2048)

+#define TEST_WA_SIZE    THD_WA_SIZE(256)

+

+static void cmd_mem(BaseSequentialStream *chp, int argc, char *argv[]) {

+  size_t n, size;

+

+  (void)argv;

+  if (argc > 0) {

+    chprintf(chp, "Usage: mem\r\n");

+    return;

+  }

+  n = chHeapStatus(NULL, &size);

+  chprintf(chp, "core free memory : %u bytes\r\n", chCoreStatus());

+  chprintf(chp, "heap fragments   : %u\r\n", n);

+  chprintf(chp, "heap free total  : %u bytes\r\n", size);

+}

+

+static void cmd_threads(BaseSequentialStream *chp, int argc, char *argv[]) {

+  static const char *states[] = {THD_STATE_NAMES};

+  Thread *tp;

+

+  (void)argv;

+  if (argc > 0) {

+    chprintf(chp, "Usage: threads\r\n");

+    return;

+  }

+  chprintf(chp, "    addr    stack prio refs     state time\r\n");

+  tp = chRegFirstThread();

+  do {

+    chprintf(chp, "%.8lx %.8lx %4lu %4lu %9s %lu\r\n",

+            (uint32_t)tp, (uint32_t)tp->p_ctx.r13,

+            (uint32_t)tp->p_prio, (uint32_t)(tp->p_refs - 1),

+            states[tp->p_state], (uint32_t)tp->p_time);

+    tp = chRegNextThread(tp);

+  } while (tp != NULL);

+}

+

+static void cmd_test(BaseSequentialStream *chp, int argc, char *argv[]) {

+  Thread *tp;

+

+  (void)argv;

+  if (argc > 0) {

+    chprintf(chp, "Usage: test\r\n");

+    return;

+  }

+  tp = chThdCreateFromHeap(NULL, TEST_WA_SIZE, chThdGetPriority(),

+                           TestThread, chp);

+  if (tp == NULL) {

+    chprintf(chp, "out of memory\r\n");

+    return;

+  }

+  chThdWait(tp);

+}

+

+static void cmd_write(BaseSequentialStream *chp, int argc, char *argv[]) {

+  static uint8_t buf[] =

+      "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef"

+      "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef"

+      "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef"

+      "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef"

+      "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef"

+      "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef"

+      "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef"

+      "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef"

+      "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef"

+      "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef"

+      "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef"

+      "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef"

+      "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef"

+      "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef"

+      "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef"

+      "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef";

+

+  (void)argv;

+  if (argc > 0) {

+    chprintf(chp, "Usage: write\r\n");

+    return;

+  }

+

+  while (chnGetTimeout((BaseChannel *)chp, TIME_IMMEDIATE) == Q_TIMEOUT) {

+    chSequentialStreamWrite(&SDU1, buf, sizeof buf - 1);

+  }

+  chprintf(chp, "\r\n\nstopped\r\n");

+}

+

+static const ShellCommand commands[] = {

+  {"mem", cmd_mem},

+  {"threads", cmd_threads},

+  {"test", cmd_test},

+  {"write", cmd_write},

+  {NULL, NULL}

+};

+

+static const ShellConfig shell_cfg1 = {

+  (BaseSequentialStream *)&SDU1,

+  commands

+};

+

+/*===========================================================================*/

+/* Generic code.                                                             */

+/*===========================================================================*/

+

+/*

+ * Red LED blinker thread, times are in milliseconds.

+ */

+static WORKING_AREA(waThread1, 128);

+static msg_t Thread1(void *arg) {

+

+  (void)arg;

+  chRegSetThreadName("blinker");

+  while (TRUE) {

+    systime_t time = serusbcfg.usbp->state == USB_ACTIVE ? 250 : 500;

+    palClearPad(IOPORT3, GPIOC_LED_STATUS1);

+    chThdSleepMilliseconds(time);

+    palSetPad(IOPORT3, GPIOC_LED_STATUS1);

+    chThdSleepMilliseconds(time);

+  }

+}

+

+/*

+ * Application entry point.

+ */

+int main(void) {

+  Thread *shelltp = NULL;

+

+  /*

+   * System initializations.

+   * - HAL initialization, this also initializes the configured device drivers

+   *   and performs the board-specific initializations.

+   * - Kernel initialization, the main() function becomes a thread and the

+   *   RTOS is active.

+   */

+  halInit();

+  chSysInit();

+

+  /*

+   * Initializes a serial-over-USB CDC driver.

+   */

+  sduObjectInit(&SDU1);

+  sduStart(&SDU1, &serusbcfg);

+

+  /*

+   * Activates the USB driver and then the USB bus pull-up on D+.

+   * Note, a delay is inserted in order to not have to disconnect the cable

+   * after a reset.

+   */

+  usbDisconnectBus(serusbcfg.usbp);

+  chThdSleepMilliseconds(1000);

+  usbStart(serusbcfg.usbp, &usbcfg);

+  usbConnectBus(serusbcfg.usbp);

+

+  /*

+   * Shell manager initialization.

+   */

+  shellInit();

+

+  /*

+   * Creates the blinker thread.

+   */

+  chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL);

+

+  /*

+   * Normal main() thread activity, in this demo it does nothing except

+   * sleeping in a loop and check the button state.

+   */

+  while (TRUE) {

+    if (!shelltp && (SDU1.config->usbp->state == USB_ACTIVE))

+      shelltp = shellCreate(&shell_cfg1, SHELL_WA_SIZE, NORMALPRIO);

+    else if (chThdTerminated(shelltp)) {

+      chThdRelease(shelltp);    /* Recovers memory of the previous shell.   */

+      shelltp = NULL;           /* Triggers spawning of a new shell.        */

+    }

+    chThdSleepMilliseconds(1000);

+  }

+}

diff --git a/testhal/STM32F1xx/USB_CDC_F107/mcuconf.h b/testhal/STM32F1xx/USB_CDC_F107/mcuconf.h
new file mode 100644
index 000000000..a3c88dbc6
--- /dev/null
+++ b/testhal/STM32F1xx/USB_CDC_F107/mcuconf.h
@@ -0,0 +1,211 @@
+/*

+    ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,

+                 2011,2012 Giovanni Di Sirio.

+

+    This file is part of ChibiOS/RT.

+

+    ChibiOS/RT is free software; you can redistribute it and/or modify

+    it under the terms of the GNU General Public License as published by

+    the Free Software Foundation; either version 3 of the License, or

+    (at your option) any later version.

+

+    ChibiOS/RT is distributed in the hope that it will be useful,

+    but WITHOUT ANY WARRANTY; without even the implied warranty of

+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

+    GNU General Public License for more details.

+

+    You should have received a copy of the GNU General Public License

+    along with this program.  If not, see <http://www.gnu.org/licenses/>.

+*/

+

+/*

+ * STM32F107 drivers configuration.

+ * The following settings override the default settings present in

+ * the various device driver implementation headers.

+ * Note that the settings for each driver only have effect if the whole

+ * driver is enabled in halconf.h.

+ *

+ * IRQ priorities:

+ * 15...0       Lowest...Highest.

+ *

+ * DMA priorities:

+ * 0...3        Lowest...Highest.

+ */

+

+#define STM32F107_MCUCONF

+

+/*

+ * HAL driver system settings.

+ */

+#define STM32_NO_INIT                       FALSE

+#define STM32_HSI_ENABLED                   TRUE

+#define STM32_LSI_ENABLED                   FALSE

+#define STM32_HSE_ENABLED                   TRUE

+#define STM32_LSE_ENABLED                   FALSE

+#define STM32_SW                            STM32_SW_PLL

+#define STM32_PLLSRC                        STM32_PLLSRC_PREDIV1

+#define STM32_PREDIV1SRC                    STM32_PREDIV1SRC_PLL2

+#define STM32_PREDIV1_VALUE                 5

+#define STM32_PLLMUL_VALUE                  9

+#define STM32_PREDIV2_VALUE                 5

+#define STM32_PLL2MUL_VALUE                 8

+#define STM32_PLL3MUL_VALUE                 10

+#define STM32_HPRE                          STM32_HPRE_DIV1

+#define STM32_PPRE1                         STM32_PPRE1_DIV2

+#define STM32_PPRE2                         STM32_PPRE2_DIV2

+#define STM32_ADCPRE                        STM32_ADCPRE_DIV4

+#define STM32_OTG_CLOCK_REQUIRED            TRUE

+#define STM32_OTGFSPRE                      STM32_OTGFSPRE_DIV3

+#define STM32_I2S_CLOCK_REQUIRED            FALSE

+#define STM32_MCOSEL                        STM32_MCOSEL_PLL3

+#define STM32_RTCSEL                        STM32_RTCSEL_HSEDIV

+#define STM32_PVD_ENABLE                    FALSE

+#define STM32_PLS                           STM32_PLS_LEV0

+

+/*

+ * ADC driver system settings.

+ */

+#define STM32_ADC_USE_ADC1                  FALSE

+#define STM32_ADC_ADC1_DMA_PRIORITY         2

+#define STM32_ADC_ADC1_IRQ_PRIORITY         6

+

+/*

+ * CAN driver system settings.

+ */

+#define STM32_CAN_USE_CAN1                  FALSE

+#define STM32_CAN_USE_CAN2                  FALSE

+#define STM32_CAN_CAN1_IRQ_PRIORITY         11

+#define STM32_CAN_CAN2_IRQ_PRIORITY         11

+

+/*

+ * EXT driver system settings.

+ */

+#define STM32_EXT_EXTI0_IRQ_PRIORITY        6

+#define STM32_EXT_EXTI1_IRQ_PRIORITY        6

+#define STM32_EXT_EXTI2_IRQ_PRIORITY        6

+#define STM32_EXT_EXTI3_IRQ_PRIORITY        6

+#define STM32_EXT_EXTI4_IRQ_PRIORITY        6

+#define STM32_EXT_EXTI5_9_IRQ_PRIORITY      6

+#define STM32_EXT_EXTI10_15_IRQ_PRIORITY    6

+#define STM32_EXT_EXTI16_IRQ_PRIORITY       6

+#define STM32_EXT_EXTI17_IRQ_PRIORITY       6

+#define STM32_EXT_EXTI18_IRQ_PRIORITY       6

+#define STM32_EXT_EXTI19_IRQ_PRIORITY       6

+

+/*

+ * GPT driver system settings.

+ */

+#define STM32_GPT_USE_TIM1                  FALSE

+#define STM32_GPT_USE_TIM2                  FALSE

+#define STM32_GPT_USE_TIM3                  FALSE

+#define STM32_GPT_USE_TIM4                  FALSE

+#define STM32_GPT_USE_TIM5                  FALSE

+#define STM32_GPT_USE_TIM8                  FALSE

+#define STM32_GPT_TIM1_IRQ_PRIORITY         7

+#define STM32_GPT_TIM2_IRQ_PRIORITY         7

+#define STM32_GPT_TIM3_IRQ_PRIORITY         7

+#define STM32_GPT_TIM4_IRQ_PRIORITY         7

+#define STM32_GPT_TIM5_IRQ_PRIORITY         7

+#define STM32_GPT_TIM8_IRQ_PRIORITY         7

+

+/*

+ * I2C driver system settings.

+ */

+#define STM32_I2C_USE_I2C1                  FALSE

+#define STM32_I2C_USE_I2C2                  FALSE

+#define STM32_I2C_I2C1_IRQ_PRIORITY         5

+#define STM32_I2C_I2C2_IRQ_PRIORITY         5

+#define STM32_I2C_I2C1_DMA_PRIORITY         3

+#define STM32_I2C_I2C2_DMA_PRIORITY         3

+#define STM32_I2C_I2C1_DMA_ERROR_HOOK()     chSysHalt()

+#define STM32_I2C_I2C2_DMA_ERROR_HOOK()     chSysHalt()

+

+/*

+ * ICU driver system settings.

+ */

+#define STM32_ICU_USE_TIM1                  FALSE

+#define STM32_ICU_USE_TIM2                  FALSE

+#define STM32_ICU_USE_TIM3                  FALSE

+#define STM32_ICU_USE_TIM4                  FALSE

+#define STM32_ICU_USE_TIM5                  FALSE

+#define STM32_ICU_USE_TIM8                  FALSE

+#define STM32_ICU_TIM1_IRQ_PRIORITY         7

+#define STM32_ICU_TIM2_IRQ_PRIORITY         7

+#define STM32_ICU_TIM3_IRQ_PRIORITY         7

+#define STM32_ICU_TIM4_IRQ_PRIORITY         7

+#define STM32_ICU_TIM5_IRQ_PRIORITY         7

+#define STM32_ICU_TIM8_IRQ_PRIORITY         7

+

+/*

+ * PWM driver system settings.

+ */

+#define STM32_PWM_USE_ADVANCED              FALSE

+#define STM32_PWM_USE_TIM1                  FALSE

+#define STM32_PWM_USE_TIM2                  FALSE

+#define STM32_PWM_USE_TIM3                  FALSE

+#define STM32_PWM_USE_TIM4                  FALSE

+#define STM32_PWM_USE_TIM5                  FALSE

+#define STM32_PWM_USE_TIM8                  FALSE

+#define STM32_PWM_TIM1_IRQ_PRIORITY         7

+#define STM32_PWM_TIM2_IRQ_PRIORITY         7

+#define STM32_PWM_TIM3_IRQ_PRIORITY         7

+#define STM32_PWM_TIM4_IRQ_PRIORITY         7

+#define STM32_PWM_TIM5_IRQ_PRIORITY         7

+#define STM32_PWM_TIM8_IRQ_PRIORITY         7

+

+/*

+ * RTC driver system settings.

+ */

+#define STM32_RTC_IRQ_PRIORITY              15

+

+/*

+ * SERIAL driver system settings.

+ */

+#define STM32_SERIAL_USE_USART1             FALSE

+#define STM32_SERIAL_USE_USART2             FALSE

+#define STM32_SERIAL_USE_USART3             FALSE

+#define STM32_SERIAL_USE_UART4              FALSE

+#define STM32_SERIAL_USE_UART5              FALSE

+#define STM32_SERIAL_USART1_PRIORITY        12

+#define STM32_SERIAL_USART2_PRIORITY        12

+#define STM32_SERIAL_USART3_PRIORITY        12

+#define STM32_SERIAL_UART4_PRIORITY         12

+#define STM32_SERIAL_UART5_PRIORITY         12

+

+/*

+ * SPI driver system settings.

+ */

+#define STM32_SPI_USE_SPI1                  FALSE

+#define STM32_SPI_USE_SPI2                  FALSE

+#define STM32_SPI_USE_SPI3                  FALSE

+#define STM32_SPI_SPI1_DMA_PRIORITY         1

+#define STM32_SPI_SPI2_DMA_PRIORITY         1

+#define STM32_SPI_SPI3_DMA_PRIORITY         1

+#define STM32_SPI_SPI1_IRQ_PRIORITY         10

+#define STM32_SPI_SPI2_IRQ_PRIORITY         10

+#define STM32_SPI_SPI3_IRQ_PRIORITY         10

+#define STM32_SPI_DMA_ERROR_HOOK(spip)      chSysHalt()

+

+/*

+ * UART driver system settings.

+ */

+#define STM32_UART_USE_USART1               FALSE

+#define STM32_UART_USE_USART2               FALSE

+#define STM32_UART_USE_USART3               FALSE

+#define STM32_UART_USART1_IRQ_PRIORITY      12

+#define STM32_UART_USART2_IRQ_PRIORITY      12

+#define STM32_UART_USART3_IRQ_PRIORITY      12

+#define STM32_UART_USART1_DMA_PRIORITY      0

+#define STM32_UART_USART2_DMA_PRIORITY      0

+#define STM32_UART_USART3_DMA_PRIORITY      0

+#define STM32_UART_DMA_ERROR_HOOK(uartp)    chSysHalt()

+

+/*

+ * USB driver system settings.

+ */

+#define STM32_USB_USE_OTG1                  TRUE

+#define STM32_USB_OTG1_IRQ_PRIORITY         14

+#define STM32_USB_OTG1_RX_FIFO_SIZE         512

+#define STM32_USB_OTG_THREAD_PRIO           LOWPRIO

+#define STM32_USB_OTG_THREAD_STACK_SIZE     128

+#define STM32_USB_OTGFIFO_FILL_BASEPRI      0

diff --git a/testhal/STM32F1xx/USB_CDC_F107/readme.txt b/testhal/STM32F1xx/USB_CDC_F107/readme.txt
new file mode 100644
index 000000000..43098d8ac
--- /dev/null
+++ b/testhal/STM32F1xx/USB_CDC_F107/readme.txt
@@ -0,0 +1,26 @@
+*****************************************************************************

+** ChibiOS/RT HAL - USB-CDC driver demo for STM32.                         **

+*****************************************************************************

+

+** TARGET **

+

+The demo runs on an Olimex STM32-P107 board.

+

+** The Demo **

+

+The application demonstrates the use of the STM32 USB (OTG) driver.

+

+** Build Procedure **

+

+The demo has been tested using the free Codesourcery GCC-based toolchain

+and YAGARTO.

+Just modify the TRGT line in the makefile in order to use different GCC ports.

+

+** Notes **

+

+Some files used by the demo are not part of ChibiOS/RT but are copyright of

+ST Microelectronics and are licensed under a different license.

+Also note that not all the files present in the ST library are distributed

+with ChibiOS/RT, you can find the whole library on the ST web site:

+

+                             http://www.st.com