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| author | Rocco Marco Guglielmi <roccomarco.guglielmi@live.com> | 2016-06-21 20:50:04 +0000 |
|---|---|---|
| committer | Rocco Marco Guglielmi <roccomarco.guglielmi@live.com> | 2016-06-21 20:50:04 +0000 |
| commit | 759c55de0fed1d66338d7836bc8ce223b2ad4f6f (patch) | |
| tree | 6c12da85b0961dc57fbf49f3d29218546e49dd5d /testhal | |
| parent | c6cad23bd99a78148063b88a3f9957cb9a5cb7de (diff) | |
| download | ChibiOS-759c55de0fed1d66338d7836bc8ce223b2ad4f6f.tar.gz ChibiOS-759c55de0fed1d66338d7836bc8ce223b2ad4f6f.tar.bz2 ChibiOS-759c55de0fed1d66338d7836bc8ce223b2ad4f6f.zip | |
Improvements to L3GD20
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@9647 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'testhal')
| -rw-r--r-- | testhal/STM32/STM32F3xx/SPI-L3GD20/Makefile | 3 | ||||
| -rw-r--r-- | testhal/STM32/STM32F3xx/SPI-L3GD20/main.c | 10 |
2 files changed, 11 insertions, 2 deletions
diff --git a/testhal/STM32/STM32F3xx/SPI-L3GD20/Makefile b/testhal/STM32/STM32F3xx/SPI-L3GD20/Makefile index bf9a4190a..3679b008a 100644 --- a/testhal/STM32/STM32F3xx/SPI-L3GD20/Makefile +++ b/testhal/STM32/STM32F3xx/SPI-L3GD20/Makefile @@ -200,7 +200,8 @@ CPPWARN = -Wall -Wextra -Wundef #
# List all user C define here, like -D_DEBUG=1
-UDEFS = -DCHPRINTF_USE_FLOAT=1 -DSHELL_CMD_TEST_ENABLED=0
+UDEFS = -DCHPRINTF_USE_FLOAT=1 -DSHELL_CMD_TEST_ENABLED=0 \
+ -DL3GD20_USE_ADVANCED=0
# Define ASM defines here
UADEFS =
diff --git a/testhal/STM32/STM32F3xx/SPI-L3GD20/main.c b/testhal/STM32/STM32F3xx/SPI-L3GD20/main.c index 804f3522b..b37a16d5a 100644 --- a/testhal/STM32/STM32F3xx/SPI-L3GD20/main.c +++ b/testhal/STM32/STM32F3xx/SPI-L3GD20/main.c @@ -51,9 +51,17 @@ static L3GD20Config l3gd20cfg = { &spicfg, /* Pointer to SPI Configuration */
{0, 0, 0}, /* Use default sensitivity */
{0, 0, 0}, /* Use default bias */
+ L3GD20_UNIT_DPS, /* Measurement unit DPS */
L3GD20_FS_250DPS, /* Full scale value */
L3GD20_ODR_760HZ, /* Output data rate */
- L3GD20_UNIT_DPS,
+#if L3GD20_USE_ADVANCED || defined(__DOXYGEN__)
+ L3GD20_BDU_CONTINUOUS,
+ L3GD20_END_LITTLE,
+ L3GD20_BW3,
+ L3GD20_HPM_REFERENCE,
+ L3GD20_HPCF_8,
+ L3GD20_LP2M_ON,
+#endif
};
/*===========================================================================*/
|