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| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2011-09-17 15:50:29 +0000 | 
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2011-09-17 15:50:29 +0000 | 
| commit | eefe7fbc1bd9cf3f50e580ff44f977a08dafa107 (patch) | |
| tree | ebab7b90d54e034df560ba0379a7f0720c7d1a78 /testhal/STM32L1xx/UART/main.c | |
| parent | 68a4911f7341c86752e50d1d2498698fa2c466db (diff) | |
| download | ChibiOS-eefe7fbc1bd9cf3f50e580ff44f977a08dafa107.tar.gz ChibiOS-eefe7fbc1bd9cf3f50e580ff44f977a08dafa107.tar.bz2 ChibiOS-eefe7fbc1bd9cf3f50e580ff44f977a08dafa107.zip | |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3328 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'testhal/STM32L1xx/UART/main.c')
| -rw-r--r-- | testhal/STM32L1xx/UART/main.c | 147 | 
1 files changed, 147 insertions, 0 deletions
| diff --git a/testhal/STM32L1xx/UART/main.c b/testhal/STM32L1xx/UART/main.c new file mode 100644 index 000000000..87efcab74 --- /dev/null +++ b/testhal/STM32L1xx/UART/main.c @@ -0,0 +1,147 @@ +/*
 +    ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
 +                 2011 Giovanni Di Sirio.
 +
 +    This file is part of ChibiOS/RT.
 +
 +    ChibiOS/RT is free software; you can redistribute it and/or modify
 +    it under the terms of the GNU General Public License as published by
 +    the Free Software Foundation; either version 3 of the License, or
 +    (at your option) any later version.
 +
 +    ChibiOS/RT is distributed in the hope that it will be useful,
 +    but WITHOUT ANY WARRANTY; without even the implied warranty of
 +    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 +    GNU General Public License for more details.
 +
 +    You should have received a copy of the GNU General Public License
 +    along with this program.  If not, see <http://www.gnu.org/licenses/>.
 +*/
 +
 +#include "ch.h"
 +#include "hal.h"
 +
 +static VirtualTimer vt1, vt2;
 +
 +static void restart(void *p) {
 +
 +  (void)p;
 +  uartStartSendI(&UARTD1, 14, "Hello World!\r\n");
 +}
 +
 +static void ledoff(void *p) {
 +
 +  (void)p;
 +  palSetPad(GPIOB, GPIOB_LED4);
 +}
 +
 +/*
 + * This callback is invoked when a transmission buffer has been completely
 + * read by the driver.
 + */
 +static void txend1(UARTDriver *uartp) {
 +
 +  (void)uartp;
 +  palClearPad(GPIOB, GPIOB_LED4);
 +}
 +
 +/*
 + * This callback is invoked when a transmission has physically completed.
 + */
 +static void txend2(UARTDriver *uartp) {
 +
 +  (void)uartp;
 +  palSetPad(GPIOB, GPIOB_LED4);
 +  chSysLockFromIsr();
 +  if (chVTIsArmedI(&vt1))
 +    chVTResetI(&vt1);
 +  chVTSetI(&vt1, MS2ST(5000), restart, NULL);
 +  chSysUnlockFromIsr();
 +}
 +
 +/*
 + * This callback is invoked on a receive error, the errors mask is passed
 + * as parameter.
 + */
 +static void rxerr(UARTDriver *uartp, uartflags_t e) {
 +
 +  (void)uartp;
 +  (void)e;
 +}
 +
 +/*
 + * This callback is invoked when a character is received but the application
 + * was not ready to receive it, the character is passed as parameter.
 + */
 +static void rxchar(UARTDriver *uartp, uint16_t c) {
 +
 +  (void)uartp;
 +  (void)c;
 +  /* Flashing the LED each time a character is received.*/
 +  palClearPad(GPIOB, GPIOB_LED4);
 +  chSysLockFromIsr();
 +  if (chVTIsArmedI(&vt2))
 +    chVTResetI(&vt2);
 +  chVTSetI(&vt2, MS2ST(200), ledoff, NULL);
 +  chSysUnlockFromIsr();
 +}
 +
 +/*
 + * This callback is invoked when a receive buffer has been completely written.
 + */
 +static void rxend(UARTDriver *uartp) {
 +
 +  (void)uartp;
 +}
 +
 +/*
 + * UART driver configuration structure.
 + */
 +static UARTConfig uart_cfg_1 = {
 +  txend1,
 +  txend2,
 +  rxend,
 +  rxchar,
 +  rxerr,
 +  38400,
 +  0,
 +  USART_CR2_LINEN,
 +  0
 +};
 +
 +/*
 + * Application entry point.
 + */
 +int main(void) {
 +
 +  /*
 +   * System initializations.
 +   * - HAL initialization, this also initializes the configured device drivers
 +   *   and performs the board-specific initializations.
 +   * - Kernel initialization, the main() function becomes a thread and the
 +   *   RTOS is active.
 +   */
 +  halInit();
 +  chSysInit();
 +
 +  /*
 +   * Activates the serial driver 2 using the driver default configuration.
 +   * PA9 and PA10 are routed to USART1.
 +   */
 +  uartStart(&UARTD1, &uart_cfg_1);
 +  palSetPadMode(GPIOA, 9, PAL_MODE_ALT_OUTPUT_PUSHPULL(7));
 +  palSetPadMode(GPIOA, 10, PAL_MODE_ALT_INPUT(7));
 +
 +  /*
 +   * Starts the transmission, it will be handled entirely in background.
 +   */
 +  uartStartSend(&UARTD1, 13, "Starting...\r\n");
 +
 +  /*
 +   * Normal main() thread activity, in this demo it does nothing.
 +   */
 +  while (TRUE) {
 +    chThdSleepMilliseconds(500);
 +  }
 +  return 0;
 +}
 | 
