Fixed some forgotten details.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3621 35acf78f-673a-0410-8e92-d51de3d6d3f4

8 files changed, 213 insertions, 19 deletions

diff --git a/testhal/STM32F4xx/ADC/mcuconf.h b/testhal/STM32F4xx/ADC/mcuconf.h
index b0611f1e6..3799aa3d3 100644
--- a/testhal/STM32F4xx/ADC/mcuconf.h
+++ b/testhal/STM32F4xx/ADC/mcuconf.h
@@ -37,6 +37,8 @@
  */

 #define STM32_NO_INIT                       FALSE

 #define STM32_VOS                           STM32_VOS_HIGH

+#define STM32_PLS                           STM32_PLS_LEV0

+#define STM32_PVD_ENABLE                    TRUE

 #define STM32_HSI_ENABLED                   TRUE

 #define STM32_LSI_ENABLED                   TRUE

 #define STM32_HSE_ENABLED                   TRUE

@@ -96,9 +98,12 @@
 #define STM32_EXT_EXTI5_9_IRQ_PRIORITY      6

 #define STM32_EXT_EXTI10_15_IRQ_PRIORITY    6

 #define STM32_EXT_EXTI16_IRQ_PRIORITY       6

-#define STM32_EXT_EXTI17_IRQ_PRIORITY       6

+#define STM32_EXT_EXTI17_IRQ_PRIORITY       15

 #define STM32_EXT_EXTI18_IRQ_PRIORITY       6

 #define STM32_EXT_EXTI19_IRQ_PRIORITY       6

+#define STM32_EXT_EXTI20_IRQ_PRIORITY       6

+#define STM32_EXT_EXTI21_IRQ_PRIORITY       15

+#define STM32_EXT_EXTI22_IRQ_PRIORITY       15

 

 /*

  * GPT driver system settings.

@@ -204,3 +209,27 @@
 #define STM32_UART_USART2_DMA_PRIORITY      0

 #define STM32_UART_USART3_DMA_PRIORITY      0

 #define STM32_UART_DMA_ERROR_HOOK(uartp)    chSysHalt()

+

+

+/*

+ * I2C driver system settings.

+ */

+#define STM32_I2C_USE_I2C1                  FALSE

+#define STM32_I2C_USE_I2C2                  FALSE

+#define STM32_I2C_USE_I2C3                  FALSE

+#define STM32_I2C_I2C1_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 0)

+#define STM32_I2C_I2C1_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 6)

+#define STM32_I2C_I2C2_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 2)

+#define STM32_I2C_I2C2_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 7)

+#define STM32_I2C_I2C3_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 2)

+#define STM32_I2C_I2C3_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 4)

+#define STM32_I2C_I2C1_IRQ_PRIORITY         6

+#define STM32_I2C_I2C2_IRQ_PRIORITY         6

+#define STM32_I2C_I2C3_IRQ_PRIORITY         6

+#define STM32_I2C_I2C1_DMA_PRIORITY         1

+#define STM32_I2C_I2C2_DMA_PRIORITY         1

+#define STM32_I2C_I2C3_DMA_PRIORITY         1

+#define STM32_I2C_I2C1_DMA_ERROR_HOOK()     chSysHalt()

+#define STM32_I2C_I2C2_DMA_ERROR_HOOK()     chSysHalt()

+#define STM32_I2C_I2C3_DMA_ERROR_HOOK()     chSysHalt()

+

diff --git a/testhal/STM32F4xx/EXT/mcuconf.h b/testhal/STM32F4xx/EXT/mcuconf.h
index b0611f1e6..3799aa3d3 100644
--- a/testhal/STM32F4xx/EXT/mcuconf.h
+++ b/testhal/STM32F4xx/EXT/mcuconf.h
@@ -37,6 +37,8 @@
  */

 #define STM32_NO_INIT                       FALSE

 #define STM32_VOS                           STM32_VOS_HIGH

+#define STM32_PLS                           STM32_PLS_LEV0

+#define STM32_PVD_ENABLE                    TRUE

 #define STM32_HSI_ENABLED                   TRUE

 #define STM32_LSI_ENABLED                   TRUE

 #define STM32_HSE_ENABLED                   TRUE

@@ -96,9 +98,12 @@
 #define STM32_EXT_EXTI5_9_IRQ_PRIORITY      6

 #define STM32_EXT_EXTI10_15_IRQ_PRIORITY    6

 #define STM32_EXT_EXTI16_IRQ_PRIORITY       6

-#define STM32_EXT_EXTI17_IRQ_PRIORITY       6

+#define STM32_EXT_EXTI17_IRQ_PRIORITY       15

 #define STM32_EXT_EXTI18_IRQ_PRIORITY       6

 #define STM32_EXT_EXTI19_IRQ_PRIORITY       6

+#define STM32_EXT_EXTI20_IRQ_PRIORITY       6

+#define STM32_EXT_EXTI21_IRQ_PRIORITY       15

+#define STM32_EXT_EXTI22_IRQ_PRIORITY       15

 

 /*

  * GPT driver system settings.

@@ -204,3 +209,27 @@
 #define STM32_UART_USART2_DMA_PRIORITY      0

 #define STM32_UART_USART3_DMA_PRIORITY      0

 #define STM32_UART_DMA_ERROR_HOOK(uartp)    chSysHalt()

+

+

+/*

+ * I2C driver system settings.

+ */

+#define STM32_I2C_USE_I2C1                  FALSE

+#define STM32_I2C_USE_I2C2                  FALSE

+#define STM32_I2C_USE_I2C3                  FALSE

+#define STM32_I2C_I2C1_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 0)

+#define STM32_I2C_I2C1_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 6)

+#define STM32_I2C_I2C2_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 2)

+#define STM32_I2C_I2C2_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 7)

+#define STM32_I2C_I2C3_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 2)

+#define STM32_I2C_I2C3_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 4)

+#define STM32_I2C_I2C1_IRQ_PRIORITY         6

+#define STM32_I2C_I2C2_IRQ_PRIORITY         6

+#define STM32_I2C_I2C3_IRQ_PRIORITY         6

+#define STM32_I2C_I2C1_DMA_PRIORITY         1

+#define STM32_I2C_I2C2_DMA_PRIORITY         1

+#define STM32_I2C_I2C3_DMA_PRIORITY         1

+#define STM32_I2C_I2C1_DMA_ERROR_HOOK()     chSysHalt()

+#define STM32_I2C_I2C2_DMA_ERROR_HOOK()     chSysHalt()

+#define STM32_I2C_I2C3_DMA_ERROR_HOOK()     chSysHalt()

+

diff --git a/testhal/STM32F4xx/GPT/mcuconf.h b/testhal/STM32F4xx/GPT/mcuconf.h
index b0611f1e6..3799aa3d3 100644
--- a/testhal/STM32F4xx/GPT/mcuconf.h
+++ b/testhal/STM32F4xx/GPT/mcuconf.h
@@ -37,6 +37,8 @@
  */

 #define STM32_NO_INIT                       FALSE

 #define STM32_VOS                           STM32_VOS_HIGH

+#define STM32_PLS                           STM32_PLS_LEV0

+#define STM32_PVD_ENABLE                    TRUE

 #define STM32_HSI_ENABLED                   TRUE

 #define STM32_LSI_ENABLED                   TRUE

 #define STM32_HSE_ENABLED                   TRUE

@@ -96,9 +98,12 @@
 #define STM32_EXT_EXTI5_9_IRQ_PRIORITY      6

 #define STM32_EXT_EXTI10_15_IRQ_PRIORITY    6

 #define STM32_EXT_EXTI16_IRQ_PRIORITY       6

-#define STM32_EXT_EXTI17_IRQ_PRIORITY       6

+#define STM32_EXT_EXTI17_IRQ_PRIORITY       15

 #define STM32_EXT_EXTI18_IRQ_PRIORITY       6

 #define STM32_EXT_EXTI19_IRQ_PRIORITY       6

+#define STM32_EXT_EXTI20_IRQ_PRIORITY       6

+#define STM32_EXT_EXTI21_IRQ_PRIORITY       15

+#define STM32_EXT_EXTI22_IRQ_PRIORITY       15

 

 /*

  * GPT driver system settings.

@@ -204,3 +209,27 @@
 #define STM32_UART_USART2_DMA_PRIORITY      0

 #define STM32_UART_USART3_DMA_PRIORITY      0

 #define STM32_UART_DMA_ERROR_HOOK(uartp)    chSysHalt()

+

+

+/*

+ * I2C driver system settings.

+ */

+#define STM32_I2C_USE_I2C1                  FALSE

+#define STM32_I2C_USE_I2C2                  FALSE

+#define STM32_I2C_USE_I2C3                  FALSE

+#define STM32_I2C_I2C1_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 0)

+#define STM32_I2C_I2C1_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 6)

+#define STM32_I2C_I2C2_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 2)

+#define STM32_I2C_I2C2_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 7)

+#define STM32_I2C_I2C3_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 2)

+#define STM32_I2C_I2C3_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 4)

+#define STM32_I2C_I2C1_IRQ_PRIORITY         6

+#define STM32_I2C_I2C2_IRQ_PRIORITY         6

+#define STM32_I2C_I2C3_IRQ_PRIORITY         6

+#define STM32_I2C_I2C1_DMA_PRIORITY         1

+#define STM32_I2C_I2C2_DMA_PRIORITY         1

+#define STM32_I2C_I2C3_DMA_PRIORITY         1

+#define STM32_I2C_I2C1_DMA_ERROR_HOOK()     chSysHalt()

+#define STM32_I2C_I2C2_DMA_ERROR_HOOK()     chSysHalt()

+#define STM32_I2C_I2C3_DMA_ERROR_HOOK()     chSysHalt()

+

diff --git a/testhal/STM32F4xx/IRQ_STORM/mcuconf.h b/testhal/STM32F4xx/IRQ_STORM/mcuconf.h
index eeeffb742..6c4baff94 100644
--- a/testhal/STM32F4xx/IRQ_STORM/mcuconf.h
+++ b/testhal/STM32F4xx/IRQ_STORM/mcuconf.h
@@ -37,6 +37,8 @@
  */

 #define STM32_NO_INIT                       FALSE

 #define STM32_VOS                           STM32_VOS_HIGH

+#define STM32_PLS                           STM32_PLS_LEV0

+#define STM32_PVD_ENABLE                    TRUE

 #define STM32_HSI_ENABLED                   TRUE

 #define STM32_LSI_ENABLED                   TRUE

 #define STM32_HSE_ENABLED                   TRUE

@@ -96,9 +98,12 @@
 #define STM32_EXT_EXTI5_9_IRQ_PRIORITY      6

 #define STM32_EXT_EXTI10_15_IRQ_PRIORITY    6

 #define STM32_EXT_EXTI16_IRQ_PRIORITY       6

-#define STM32_EXT_EXTI17_IRQ_PRIORITY       6

+#define STM32_EXT_EXTI17_IRQ_PRIORITY       15

 #define STM32_EXT_EXTI18_IRQ_PRIORITY       6

 #define STM32_EXT_EXTI19_IRQ_PRIORITY       6

+#define STM32_EXT_EXTI20_IRQ_PRIORITY       6

+#define STM32_EXT_EXTI21_IRQ_PRIORITY       15

+#define STM32_EXT_EXTI22_IRQ_PRIORITY       15

 

 /*

  * GPT driver system settings.

@@ -204,3 +209,27 @@
 #define STM32_UART_USART2_DMA_PRIORITY      0

 #define STM32_UART_USART3_DMA_PRIORITY      0

 #define STM32_UART_DMA_ERROR_HOOK(uartp)    chSysHalt()

+

+

+/*

+ * I2C driver system settings.

+ */

+#define STM32_I2C_USE_I2C1                  FALSE

+#define STM32_I2C_USE_I2C2                  FALSE

+#define STM32_I2C_USE_I2C3                  FALSE

+#define STM32_I2C_I2C1_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 0)

+#define STM32_I2C_I2C1_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 6)

+#define STM32_I2C_I2C2_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 2)

+#define STM32_I2C_I2C2_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 7)

+#define STM32_I2C_I2C3_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 2)

+#define STM32_I2C_I2C3_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 4)

+#define STM32_I2C_I2C1_IRQ_PRIORITY         6

+#define STM32_I2C_I2C2_IRQ_PRIORITY         6

+#define STM32_I2C_I2C3_IRQ_PRIORITY         6

+#define STM32_I2C_I2C1_DMA_PRIORITY         1

+#define STM32_I2C_I2C2_DMA_PRIORITY         1

+#define STM32_I2C_I2C3_DMA_PRIORITY         1

+#define STM32_I2C_I2C1_DMA_ERROR_HOOK()     chSysHalt()

+#define STM32_I2C_I2C2_DMA_ERROR_HOOK()     chSysHalt()

+#define STM32_I2C_I2C3_DMA_ERROR_HOOK()     chSysHalt()

+

diff --git a/testhal/STM32F4xx/PWM-ICU/mcuconf.h b/testhal/STM32F4xx/PWM-ICU/mcuconf.h
index df92209ae..975d7ecbb 100644
--- a/testhal/STM32F4xx/PWM-ICU/mcuconf.h
+++ b/testhal/STM32F4xx/PWM-ICU/mcuconf.h
@@ -37,6 +37,8 @@
  */

 #define STM32_NO_INIT                       FALSE

 #define STM32_VOS                           STM32_VOS_HIGH

+#define STM32_PLS                           STM32_PLS_LEV0

+#define STM32_PVD_ENABLE                    TRUE

 #define STM32_HSI_ENABLED                   TRUE

 #define STM32_LSI_ENABLED                   TRUE

 #define STM32_HSE_ENABLED                   TRUE

@@ -96,9 +98,12 @@
 #define STM32_EXT_EXTI5_9_IRQ_PRIORITY      6

 #define STM32_EXT_EXTI10_15_IRQ_PRIORITY    6

 #define STM32_EXT_EXTI16_IRQ_PRIORITY       6

-#define STM32_EXT_EXTI17_IRQ_PRIORITY       6

+#define STM32_EXT_EXTI17_IRQ_PRIORITY       15

 #define STM32_EXT_EXTI18_IRQ_PRIORITY       6

 #define STM32_EXT_EXTI19_IRQ_PRIORITY       6

+#define STM32_EXT_EXTI20_IRQ_PRIORITY       6

+#define STM32_EXT_EXTI21_IRQ_PRIORITY       15

+#define STM32_EXT_EXTI22_IRQ_PRIORITY       15

 

 /*

  * GPT driver system settings.

@@ -204,3 +209,27 @@
 #define STM32_UART_USART2_DMA_PRIORITY      0

 #define STM32_UART_USART3_DMA_PRIORITY      0

 #define STM32_UART_DMA_ERROR_HOOK(uartp)    chSysHalt()

+

+

+/*

+ * I2C driver system settings.

+ */

+#define STM32_I2C_USE_I2C1                  FALSE

+#define STM32_I2C_USE_I2C2                  FALSE

+#define STM32_I2C_USE_I2C3                  FALSE

+#define STM32_I2C_I2C1_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 0)

+#define STM32_I2C_I2C1_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 6)

+#define STM32_I2C_I2C2_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 2)

+#define STM32_I2C_I2C2_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 7)

+#define STM32_I2C_I2C3_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 2)

+#define STM32_I2C_I2C3_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 4)

+#define STM32_I2C_I2C1_IRQ_PRIORITY         6

+#define STM32_I2C_I2C2_IRQ_PRIORITY         6

+#define STM32_I2C_I2C3_IRQ_PRIORITY         6

+#define STM32_I2C_I2C1_DMA_PRIORITY         1

+#define STM32_I2C_I2C2_DMA_PRIORITY         1

+#define STM32_I2C_I2C3_DMA_PRIORITY         1

+#define STM32_I2C_I2C1_DMA_ERROR_HOOK()     chSysHalt()

+#define STM32_I2C_I2C2_DMA_ERROR_HOOK()     chSysHalt()

+#define STM32_I2C_I2C3_DMA_ERROR_HOOK()     chSysHalt()

+

diff --git a/testhal/STM32F4xx/RTC/mcuconf.h b/testhal/STM32F4xx/RTC/mcuconf.h
index 80f6c3866..010afe8fd 100644
--- a/testhal/STM32F4xx/RTC/mcuconf.h
+++ b/testhal/STM32F4xx/RTC/mcuconf.h
@@ -62,8 +62,6 @@
 #define STM32_I2SSRC                        STM32_I2CSRC_CKIN

 #define STM32_PLLI2SN_VALUE                 192

 #define STM32_PLLI2SR_VALUE                 5

-#define STM32_RTC                           STM32_RTC_LSE

-

 

 /*

  * ADC driver system settings.

@@ -100,12 +98,12 @@
 #define STM32_EXT_EXTI5_9_IRQ_PRIORITY      6

 #define STM32_EXT_EXTI10_15_IRQ_PRIORITY    6

 #define STM32_EXT_EXTI16_IRQ_PRIORITY       6

-#define STM32_EXT_EXTI17_IRQ_PRIORITY       15 // RTC alarm

+#define STM32_EXT_EXTI17_IRQ_PRIORITY       15

 #define STM32_EXT_EXTI18_IRQ_PRIORITY       6

 #define STM32_EXT_EXTI19_IRQ_PRIORITY       6

 #define STM32_EXT_EXTI20_IRQ_PRIORITY       6

-#define STM32_EXT_EXTI21_IRQ_PRIORITY       15 // RTC tamper-timestamp

-#define STM32_EXT_EXTI22_IRQ_PRIORITY       15 // RTC wakeup

+#define STM32_EXT_EXTI21_IRQ_PRIORITY       15

+#define STM32_EXT_EXTI22_IRQ_PRIORITY       15

 

 /*

  * GPT driver system settings.

@@ -116,13 +114,6 @@
 #define STM32_GPT_USE_TIM4                  FALSE

 #define STM32_GPT_USE_TIM5                  FALSE

 #define STM32_GPT_USE_TIM8                  FALSE

-#define STM32_GPT_USE_TIM9                  FALSE

-#define STM32_GPT_USE_TIM10                 FALSE

-#define STM32_GPT_USE_TIM11                 FALSE

-#define STM32_GPT_USE_TIM12                 FALSE

-#define STM32_GPT_USE_TIM12                 FALSE

-#define STM32_GPT_USE_TIM14                 FALSE

-

 #define STM32_GPT_TIM1_IRQ_PRIORITY         7

 #define STM32_GPT_TIM2_IRQ_PRIORITY         7

 #define STM32_GPT_TIM3_IRQ_PRIORITY         7

diff --git a/testhal/STM32F4xx/SPI/mcuconf.h b/testhal/STM32F4xx/SPI/mcuconf.h
index 5f7e3f024..40f8182db 100644
--- a/testhal/STM32F4xx/SPI/mcuconf.h
+++ b/testhal/STM32F4xx/SPI/mcuconf.h
@@ -37,6 +37,8 @@
  */

 #define STM32_NO_INIT                       FALSE

 #define STM32_VOS                           STM32_VOS_HIGH

+#define STM32_PLS                           STM32_PLS_LEV0

+#define STM32_PVD_ENABLE                    TRUE

 #define STM32_HSI_ENABLED                   TRUE

 #define STM32_LSI_ENABLED                   TRUE

 #define STM32_HSE_ENABLED                   TRUE

@@ -96,9 +98,12 @@
 #define STM32_EXT_EXTI5_9_IRQ_PRIORITY      6

 #define STM32_EXT_EXTI10_15_IRQ_PRIORITY    6

 #define STM32_EXT_EXTI16_IRQ_PRIORITY       6

-#define STM32_EXT_EXTI17_IRQ_PRIORITY       6

+#define STM32_EXT_EXTI17_IRQ_PRIORITY       15

 #define STM32_EXT_EXTI18_IRQ_PRIORITY       6

 #define STM32_EXT_EXTI19_IRQ_PRIORITY       6

+#define STM32_EXT_EXTI20_IRQ_PRIORITY       6

+#define STM32_EXT_EXTI21_IRQ_PRIORITY       15

+#define STM32_EXT_EXTI22_IRQ_PRIORITY       15

 

 /*

  * GPT driver system settings.

@@ -204,3 +209,27 @@
 #define STM32_UART_USART2_DMA_PRIORITY      0

 #define STM32_UART_USART3_DMA_PRIORITY      0

 #define STM32_UART_DMA_ERROR_HOOK(uartp)    chSysHalt()

+

+

+/*

+ * I2C driver system settings.

+ */

+#define STM32_I2C_USE_I2C1                  FALSE

+#define STM32_I2C_USE_I2C2                  FALSE

+#define STM32_I2C_USE_I2C3                  FALSE

+#define STM32_I2C_I2C1_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 0)

+#define STM32_I2C_I2C1_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 6)

+#define STM32_I2C_I2C2_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 2)

+#define STM32_I2C_I2C2_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 7)

+#define STM32_I2C_I2C3_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 2)

+#define STM32_I2C_I2C3_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 4)

+#define STM32_I2C_I2C1_IRQ_PRIORITY         6

+#define STM32_I2C_I2C2_IRQ_PRIORITY         6

+#define STM32_I2C_I2C3_IRQ_PRIORITY         6

+#define STM32_I2C_I2C1_DMA_PRIORITY         1

+#define STM32_I2C_I2C2_DMA_PRIORITY         1

+#define STM32_I2C_I2C3_DMA_PRIORITY         1

+#define STM32_I2C_I2C1_DMA_ERROR_HOOK()     chSysHalt()

+#define STM32_I2C_I2C2_DMA_ERROR_HOOK()     chSysHalt()

+#define STM32_I2C_I2C3_DMA_ERROR_HOOK()     chSysHalt()

+

diff --git a/testhal/STM32F4xx/UART/mcuconf.h b/testhal/STM32F4xx/UART/mcuconf.h
index b0611f1e6..3799aa3d3 100644
--- a/testhal/STM32F4xx/UART/mcuconf.h
+++ b/testhal/STM32F4xx/UART/mcuconf.h
@@ -37,6 +37,8 @@
  */

 #define STM32_NO_INIT                       FALSE

 #define STM32_VOS                           STM32_VOS_HIGH

+#define STM32_PLS                           STM32_PLS_LEV0

+#define STM32_PVD_ENABLE                    TRUE

 #define STM32_HSI_ENABLED                   TRUE

 #define STM32_LSI_ENABLED                   TRUE

 #define STM32_HSE_ENABLED                   TRUE

@@ -96,9 +98,12 @@
 #define STM32_EXT_EXTI5_9_IRQ_PRIORITY      6

 #define STM32_EXT_EXTI10_15_IRQ_PRIORITY    6

 #define STM32_EXT_EXTI16_IRQ_PRIORITY       6

-#define STM32_EXT_EXTI17_IRQ_PRIORITY       6

+#define STM32_EXT_EXTI17_IRQ_PRIORITY       15

 #define STM32_EXT_EXTI18_IRQ_PRIORITY       6

 #define STM32_EXT_EXTI19_IRQ_PRIORITY       6

+#define STM32_EXT_EXTI20_IRQ_PRIORITY       6

+#define STM32_EXT_EXTI21_IRQ_PRIORITY       15

+#define STM32_EXT_EXTI22_IRQ_PRIORITY       15

 

 /*

  * GPT driver system settings.

@@ -204,3 +209,27 @@
 #define STM32_UART_USART2_DMA_PRIORITY      0

 #define STM32_UART_USART3_DMA_PRIORITY      0

 #define STM32_UART_DMA_ERROR_HOOK(uartp)    chSysHalt()

+

+

+/*

+ * I2C driver system settings.

+ */

+#define STM32_I2C_USE_I2C1                  FALSE

+#define STM32_I2C_USE_I2C2                  FALSE

+#define STM32_I2C_USE_I2C3                  FALSE

+#define STM32_I2C_I2C1_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 0)

+#define STM32_I2C_I2C1_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 6)

+#define STM32_I2C_I2C2_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 2)

+#define STM32_I2C_I2C2_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 7)

+#define STM32_I2C_I2C3_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 2)

+#define STM32_I2C_I2C3_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 4)

+#define STM32_I2C_I2C1_IRQ_PRIORITY         6

+#define STM32_I2C_I2C2_IRQ_PRIORITY         6

+#define STM32_I2C_I2C3_IRQ_PRIORITY         6

+#define STM32_I2C_I2C1_DMA_PRIORITY         1

+#define STM32_I2C_I2C2_DMA_PRIORITY         1

+#define STM32_I2C_I2C3_DMA_PRIORITY         1

+#define STM32_I2C_I2C1_DMA_ERROR_HOOK()     chSysHalt()

+#define STM32_I2C_I2C2_DMA_ERROR_HOOK()     chSysHalt()

+#define STM32_I2C_I2C3_DMA_ERROR_HOOK()     chSysHalt()

+