git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3520 35acf78f-673a-0410-8e92-d51de3d6d3f4

1 files changed, 19 insertions, 2 deletions

diff --git a/testhal/STM32F4xx/GPT/mcuconf.h b/testhal/STM32F4xx/GPT/mcuconf.h
index 4f0647db3..b0611f1e6 100644
--- a/testhal/STM32F4xx/GPT/mcuconf.h
+++ b/testhal/STM32F4xx/GPT/mcuconf.h
@@ -64,9 +64,20 @@
 /*

  * ADC driver system settings.

  */

+#define STM32_ADC_ADCPRE                    ADC_CCR_ADCPRE_DIV2

 #define STM32_ADC_USE_ADC1                  TRUE

+#define STM32_ADC_USE_ADC2                  TRUE

+#define STM32_ADC_USE_ADC3                  TRUE

+#define STM32_ADC_ADC1_DMA_STREAM           STM32_DMA_STREAM_ID(2, 4)

+#define STM32_ADC_ADC2_DMA_STREAM           STM32_DMA_STREAM_ID(2, 2)

+#define STM32_ADC_ADC3_DMA_STREAM           STM32_DMA_STREAM_ID(2, 1)

 #define STM32_ADC_ADC1_DMA_PRIORITY         2

-#define STM32_ADC_ADC1_IRQ_PRIORITY         5

+#define STM32_ADC_ADC2_DMA_PRIORITY         2

+#define STM32_ADC_ADC3_DMA_PRIORITY         2

+#define STM32_ADC_IRQ_PRIORITY              5

+#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     5

+#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY     5

+#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY     5

 

 /*

  * CAN driver system settings.

@@ -165,7 +176,7 @@
 #define STM32_SPI_SPI2_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 3)

 #define STM32_SPI_SPI2_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 4)

 #define STM32_SPI_SPI3_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 0)

-#define STM32_SPI_SPI3_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 5)

+#define STM32_SPI_SPI3_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 7)

 #define STM32_SPI_SPI1_DMA_PRIORITY         1

 #define STM32_SPI_SPI2_DMA_PRIORITY         1

 #define STM32_SPI_SPI3_DMA_PRIORITY         1

@@ -180,6 +191,12 @@
 #define STM32_UART_USE_USART1               FALSE

 #define STM32_UART_USE_USART2               TRUE

 #define STM32_UART_USE_USART3               FALSE

+#define STM32_UART_USART1_RX_DMA_STREAM     STM32_DMA_STREAM_ID(2, 5)

+#define STM32_UART_USART1_TX_DMA_STREAM     STM32_DMA_STREAM_ID(2, 7)

+#define STM32_UART_USART2_RX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 5)

+#define STM32_UART_USART2_TX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 6)

+#define STM32_UART_USART3_RX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 1)

+#define STM32_UART_USART3_TX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 3)

 #define STM32_UART_USART1_IRQ_PRIORITY      12

 #define STM32_UART_USART2_IRQ_PRIORITY      12

 #define STM32_UART_USART3_IRQ_PRIORITY      12